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CN101751312A - Test device for simulating multiple storage devices and test method thereof - Google Patents

Test device for simulating multiple storage devices and test method thereof Download PDF

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Publication number
CN101751312A
CN101751312A CN200810178095A CN200810178095A CN101751312A CN 101751312 A CN101751312 A CN 101751312A CN 200810178095 A CN200810178095 A CN 200810178095A CN 200810178095 A CN200810178095 A CN 200810178095A CN 101751312 A CN101751312 A CN 101751312A
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China
Prior art keywords
access
test
commands
mentioned
connectors
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CN200810178095A
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Chinese (zh)
Inventor
胡建明
马志东
许彬
尹国煌
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Maintek Computer Suzhou Co Ltd
Pegatron Corp
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Maintek Computer Suzhou Co Ltd
Pegatron Corp
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Priority to CN200810178095A priority Critical patent/CN101751312A/en
Publication of CN101751312A publication Critical patent/CN101751312A/en
Pending legal-status Critical Current

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Abstract

The invention provides a test device for simulating a plurality of storage devices and a test method thereof, which are used for testing a plurality of first storage device connectors of a computer device, wherein the computer device sends a plurality of first access instructions to the test device through the first storage device connectors so as to simulate to execute access operation on a plurality of access sections of the storage devices. The test device comprises a control unit and a test access section. The control unit is coupled to the test access section and receives the first access instructions. The test access section is used for simulating the access sections, so that the control unit responds to the first access instructions and executes the access operation of the first access instructions to the test access section. The invention adopts the memory to provide an access section, and the memory has the characteristic of high read-write speed relative to the hard disk, so the test speed is high. Compared with a hard disk, the memory has small volume, good vibration resistance and difficult damage, thereby reducing the production and test cost.

Description

Simulate the proving installation and the method for testing thereof of a plurality of memory storages
Technical field
The present invention relates to a kind of proving installation, and be particularly related to a kind of proving installation and method of testing thereof of simulating a plurality of memory storages.
Background technology
In the motherboard production run of computer installation, serial memory interface (Serial Advanced Technology Attachment for the Test Host plate, SATA) whether the hard disk connector function is normal, can use many equipment and consumptive material that the SATA hard disk connector of motherboard is tested.
As shown in Figure 1, motherboard 101 is provided with four SATA hard disk connector 102a～102d.When testing SA TA hard disk connector 102a～102d, need to connect the SATA hard disk connector 102a～102d of 4 SATA hard disk 103a～103d to motherboard 101.
Certainly, the element of necessity when motherboard 101 also is connected with test is such as essential elements of operation test procedure such as CPU, internal memory, hard disks.
Yet present method of testing has many shortcomings.For example: (1) when test, the connector of SATA hard disk damages easily because of frequent plug wearing and tearing, and then the SATA hard disk that must more renew, and so will significantly improve testing cost.(2) move and the plug process in, the SATA hard disk causes hard disk corruptions easily because of collision.(3) the SATA physical hard disk is a magnetic medium, if sudden power or be in easily causes magnetic track to damage in the high-intensity magnetic field, and is difficult for repairing.(4) when test, what SATA connectors motherboard has, what just need with physical hard disks, and each physical hard disk all can take certain space, therefore if motherboard has a plurality of SATA connectors, need bigger space to carry out in the time of then can making test, and need to buy a plurality of SATA hard disks, and then improve testing cost.
Summary of the invention
The invention provides a kind of proving installation and method of testing thereof of simulating a plurality of memory storages, can address the above problem.
The invention provides a kind of proving installation of simulating a plurality of memory storages, a plurality of first memory storage connectors in order to the test computer device, computer installation sends a plurality of first access instructions to proving installation by above-mentioned these first memory storage connectors, with simulation a plurality of access sections of above-mentioned these memory storages is carried out an accessing operation.Proving installation comprises a plurality of second memory storage connectors, control module and test access zone.A plurality of second memory storage connectors are in order to coupling above-mentioned these first memory storage connectors, and receive above-mentioned these first access instructions.Control module couples above-mentioned these second memory storage connectors respectively.Test access zone couples control module, and in order to simulate above-mentioned these access sections, makes control module respond above-mentioned these first access instructions, and test access zone is carried out the accessing operation of above-mentioned these first access instructions.
The present invention also provides a kind of method of testing, a plurality of first memory storage connectors in order to the test computer device, computer installation sends a plurality of first access instructions by above-mentioned these first memory storage connectors, with simulation a plurality of access sections of above-mentioned these memory storages is carried out an accessing operation.Method of testing comprises: receive above-mentioned these first access instructions; And respond above-mentioned these first access instructions, to carry out the accessing operation of above-mentioned these first access instructions in order to the test access zone of simulating above-mentioned these access sections to one.
Beneficial effect of the present invention is: adopt internal memory that one access section is provided, internal memory has the fast characteristics of read or write speed with respect to hard disk, and therefore test speed of the present invention is fast.In addition, internal memory is compared to hard disk, and its volume is little, vibration resistance is good, not fragile, so can reduce the production test cost.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Figure 1 shows that the proving installation synoptic diagram of prior art.
Figure 2 shows that the synoptic diagram of the proving installation of the preferred embodiment of the present invention.
Figure 3 shows that the process flow diagram of the method for testing of the preferred embodiment of the present invention.
Embodiment
Figure 2 shows that the synoptic diagram of the proving installation of the preferred embodiment of the present invention.
The proving installation 200 that present embodiment provided is in order to a plurality of first memory storage connector 302a, the 302b of the motherboard 301 of test computer device 300.In theory, when test, a plurality of first memory storage connector 302a, 302b should be connected with a plurality of corresponding memory storages.In the present embodiment, memory storage is a hard disk, and preferably, memory storage is the SATA hard disk, but the present invention is not as restriction.In the present embodiment, the above-mentioned first memory storage connector 302a, 302b are the SATA hard disk connector, are suitable for connecting the SATA hard disk.The SATA signal that motherboard 301 is sent can be sent to the SATA hard disk that is connected with the SATA hard disk connector via the SATA hard disk connector.
In the present embodiment, on the motherboard 301 to be tested except being provided with the first memory storage connector 302a, 302b, motherboard 301 is provided with CPU (central processing unit) (CPU), internal memory, video card etc. and moves the needed element of test, in addition, motherboard 301 has also connected power supply unit, display and hard disk, wherein aforementioned hard-disc storage has test procedure, sends access instruction with control computer device 300 and judges with collocation proving installation 200 whether the first memory storage connector 302a, 302b be good.In other embodiments, test procedure also can be stored in the internal memory on the motherboard 301, and the present invention is not limited this.
In the present embodiment, above-mentioned a plurality of first memory storage connector 302a, 302b is connected with the proving installation 200 that present embodiment is provided, proving installation 200 at this in order to simulate a plurality of memory storages, make computer installation 300 still think oneself to send a plurality of first access instructions and can pass through the first memory storage connector 302a, 302b delivers to a plurality of memory storages, carry out accessing operation with a plurality of access sections to a plurality of memory storages, but in fact, a plurality of first access instructions that computer installation 300 sends are by the first memory storage connector 302a, 302b delivers to proving installation 200, with simulation a plurality of access sections of those memory storages is carried out accessing operation.
In the present embodiment, first access instruction comprises a plurality of instruction or a plurality of reading command of writing, and also, first access instruction can be and writes instruction and also can be reading command.In the present embodiment, above-mentioned accessing operation can be write operation, also can be read operation.
In addition, each access instruction can be that (for example: hard disk) an access section (sector) or a plurality of access section carry out accessing operation to a specific physical storage device, and each access section has a corresponding access address, and also have access address (comprising start address and end address) in each access instruction, make the controller of memory storage (hard disk) to come the particular access section is carried out accessing operation according to the access address of above-mentioned access instruction.In the present embodiment, for convenience of description, the address of the access section of the access address of above-mentioned first access instruction and specific physical storage device is referred to as first access address.
The proving installation 200 that present embodiment provided comprises a plurality of second memory storage connector 201a, 201b, interface conversion unit 202, control module 203 and internal memory 204.In the present embodiment, control module 203 is incorporated in the programmable gate array chip (FPGA) 205 with internal memory 204, and in other embodiments, control module 203 also can be independent component out of the ordinary with internal memory 204.In addition, the second memory storage connector 201a, 201b, interface conversion unit 202 and programmable gate array chip 205 are arranged on same the circuit board 206.
Above-mentioned a plurality of second memory storage connector 201a, 201b be in order to coupling the first memory storage connector 302a, 302b, and can receive one or more first access instructions that sent by computer installation 300.Can utilize connecting line (for example: SATA connecting line (Cable)) coupled between the second memory storage connector 201a, 201b and the first memory storage connector 302a, the 302b.
In the present embodiment, the second memory storage connector 201a, whether 201b can distinguish and side by side connect the first memory storage connector 302a, 302b, good to detect the first memory storage connector 302a, 302b simultaneously.In the present embodiment, the second memory storage connector 201a, 201b are the SATA connector, and in other embodiments, the second memory storage connector 201a, 201b also can be the connector of SAS connector or other memory storage.
Interface conversion unit 202 couples the second memory storage connector 201a, 201b and control module 203 respectively, and 203 of control modules couple interface conversion unit 202 and internal memory 204 respectively.In the present embodiment, internal memory 204 is static RAM (SRAM), and in other embodiments, internal memory 204 also can be nonvolatile RAM, but the present invention is not limited this.Have a test access zone 2041 in the internal memory 204, and this test access zone 2041 can be used to simulate the one or more access sections at least one memory storage, wherein test access zone 2041 has one second access address.
Above-mentioned interface conversion unit 202 comes from a plurality of first access instructions of the second memory storage connector 201a, 201b in order to reception, and in order to a plurality of first access instructions are converted to a plurality of second access instructions, wherein first access instruction is that (for example be: the SATA interface instruction), second access instruction is that the parallel interface instruction (for example is: the ata interface instruction) in the serial line interface instruction.In other embodiments, interface conversion unit 202 can be included in the control module 203, and the present invention is not limited this.
First access instruction that control module 203 is sent in order to RESPONSE CALCULATION machine 300 is to simulate the accessing operation of test access zone being carried out first access instruction.
As mentioned above, first access instruction that sends of computer installation 300 to specific physical storage device (for example: hard disk) carry out accessing operation is.Though above-mentioned interface conversion unit 202 is converted to second access instruction with first access instruction, first access address in first access instruction is still kept.
Second access instruction that control module 203 receiving interface converting units 202 are provided, and first access address in control module 203 mappings second access instruction is to second access address of test access zone 2041, make computer installation 300 will carry out accessing operation to the access section of memory storage originally, make into to come test access zone 2041 is carried out accessing operation according to second access address.
Figure 3 shows that the process flow diagram of the method for testing of preferred embodiment.The explanation of relevant Fig. 3 please be in the lump with reference to Fig. 2.
In step S305, computer installation 300 is carried out the test procedure that is stored in the main hard disk, and sends first access instruction to proving installation 200 by the first memory storage connector 302a.
In step S310, interface conversion unit 202 comes from first access instruction of the second memory storage connector 201a in order to reception, and first access instruction is converted to a plurality of form differences but the second identical access instruction of content.
In step S315, control module 203 is carried out second access instruction, and first access address in second access instruction is mapped to second access address, so that test access zone 2041 is carried out accessing operation, for example: write a test data.
In step S320, computer installation 300 by the first memory storage connector 302a send again one for example for first access instruction of reading of data to proving installation 200, to read the data that before are written into test access zone 2041.Computer installation 300 is after reading data, whether the data that computer installation 300 can relatively be read are consistent with the previous data that write, if it is consistent, then represent the first memory storage connector 302a good, if inconsistent, then represent the first memory storage connector 302a well to have problem.
Test and the above-mentioned way of other first memory storage connector 302b are similar.
In sum, the proving installation that the preferred embodiment of the present invention provided is according to the principle of work of hard disk, the storage space of an access section of use internal memory is simulated all storage spaces of true hard disk, is about to the access section mapping (Map) of all different addresses in hard disk particular access section to above-mentioned internal memory.So, to the write-read comparison of the access section of different addresses, be actually same particular access section is moved during the memory storage connector test of computer installation.Thus, test speed of the present invention is fast, and required space is less when testing, and need not to purchase too much hard disk and can reduce the production test cost.
Though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; any those of ordinary skill in the art; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the scope that claims define.

Claims (12)

1.一种模拟多个存储装置的测试装置，用以测试计算机装置的多个第一存储装置连接器，上述计算机装置通过上述这些第一存储装置连接器发出多个第一存取指令至上述测试装置，以模拟对上述这些存储装置的多个存取区段执行存取操作，其特征是，上述测试装置包括：1. A test device simulating multiple storage devices, used to test multiple first storage device connectors of a computer device, the computer device sends a plurality of first access commands to the above-mentioned first storage device connectors through the above-mentioned first storage device connectors The test device is used to simulate the access operations performed on a plurality of access segments of the above-mentioned storage devices, wherein the above-mentioned test device includes: 多个第二存储装置连接器，用以耦接上述这些第一存储装置连接器，且接收上述这些第一存取指令；a plurality of second storage device connectors for coupling the first storage device connectors and receiving the first access commands; 控制单元，分别耦接上述这些第二存储装置连接器；以及a control unit, respectively coupled to the above-mentioned second storage device connectors; and 测试存取区段，耦接上述控制单元，且用以模拟上述这些存取区段，使得上述控制单元响应上述这些第一存取指令，并对上述测试存取区段执行上述这些第一存取指令的存取操作。The test access section is coupled to the control unit and used to simulate the access sections, so that the control unit responds to the first access commands and executes the first storage on the test access section. Instruction fetch operation. 2.根据权利要求1所述的测试装置，其特征是，上述这些存取区段分别具有第一存取地址，上述测试存取区段具有第二存取地址，上述控制单元映射上述这些第一存取指令的上述第一存取地址至上述第二存取地址，以于上述测试存取区段执行上述这些第一存取指令的存取操作。2. The test device according to claim 1, wherein said access sections have first access addresses respectively, said test access sections have second access addresses, and said control unit maps said first access addresses The first access address to the second access address of an access command, so as to execute the access operations of the first access command in the test access section. 3.根据权利要求1所述的测试装置，其特征是，上述测试装置还包括接口转换单元，分别耦接上述这些第二存储装置连接器与上述控制单元，且用以转换上述这些第一存取指令为多个第二存取指令。3. The test device according to claim 1, characterized in that, the test device further comprises an interface conversion unit, which is respectively coupled to the connectors of the second storage devices and the control unit, and is used to convert the first storage devices The instruction fetch is a plurality of second access instructions. 4.根据权利要求3所述的测试装置，其特征是，上述这些第一存取指令为串行接口指令，上述这些第二存取指令为并行接口指令。4. The testing device according to claim 3, wherein the first access commands are serial interface commands, and the second access commands are parallel interface commands. 5.根据权利要求1所述的测试装置，其特征是，上述这些第一存取指令包括多个写入指令或多个读取指令。5. The testing device according to claim 1, wherein the first access commands include multiple write commands or multiple read commands. 6.根据权利要求1所述的测试装置，其特征是，上述测试存取区段与上述控制单元整合在可编程逻辑门阵列芯片中。6. The test device according to claim 1, wherein the test access section and the control unit are integrated in a programmable logic gate array chip. 7.一种测试方法，用以测试计算机装置的多个第一存储装置连接器，上述计算机装置通过上述这些第一存储装置连接器发出多个第一存取指令，以模拟对上述这些存储装置的多个存取区段执行存取操作，其特征是，上述测试方法包括：7. A testing method, used for testing a plurality of first storage device connectors of a computer device, the above-mentioned computer device sends a plurality of first access commands through the above-mentioned first storage device connectors to simulate the above-mentioned storage devices A plurality of access sections perform access operations, and it is characterized in that the above-mentioned test method includes: 接收上述这些第一存取指令；以及receiving the above-mentioned first access commands; and 响应上述这些第一存取指令，以对用以模拟上述这些存取区段的测试存取区段执行上述这些第一存取指令的存取操作。In response to the above-mentioned first access commands, the access operations of the above-mentioned first access commands are executed on the test access section for simulating the above-mentioned access sections. 8.根据权利要求7所述的测试方法，其特征是，上述这些存取区段分别具有第一存取地址，上述测试存取区段具有第二存取地址。8 . The testing method according to claim 7 , wherein each of the access sections has a first access address, and the test access section has a second access address. 9.根据权利要求8所述的测试方法，其特征是，于上述响应上述这些第一存取指令，以对用以模拟上述这些存取区段的测试存取区段执行上述这些第一存取指令的存取操作的步骤中还包括：9. The testing method according to claim 8, wherein, in response to the first access commands, the first memory blocks are executed for the test access blocks used to simulate the access blocks. The steps of the access operation of fetching instructions also include: 映射上述这些第一存取指令的上述第一存取地址至上述第二存取地址，以于上述测试存取区段执行上述这些第一存取指令的存取操作。mapping the first access addresses of the first access commands to the second access addresses, so as to execute the access operations of the first access commands in the test access section. 10.根据权利要求7所述的测试方法，其特征是，上述测试方法还包括：10. testing method according to claim 7, is characterized in that, above-mentioned testing method also comprises: 转换上述这些第一存取指令为多个第二存取指令，其中上述这些第一存取指令为串行接口指令，上述这些第二存取指令为并行接口指令。converting the above-mentioned first access commands into a plurality of second access commands, wherein the above-mentioned first access commands are serial interface commands, and the above-mentioned second access commands are parallel interface commands. 11.根据权利要求7所述的测试方法，其特征是，上述这些第一存取指令包括多个写入指令或多个读取指令。11. The testing method according to claim 7, wherein the first access commands include multiple write commands or multiple read commands. 12.根据权利要求7所述的测试方法，其特征是，上述测试方法还包括：12. testing method according to claim 7, is characterized in that, above-mentioned testing method also comprises: 判断写入的数据与读出的数据是否一致，以判断上述这些第一存储装置连接器是否正常。It is judged whether the written data is consistent with the read data, so as to judge whether the above-mentioned first storage device connectors are normal.
CN200810178095A 2008-12-19 2008-12-19 Test device for simulating multiple storage devices and test method thereof Pending CN101751312A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102778933A (en) * 2011-05-13 2012-11-14 鸿富锦精密工业（深圳）有限公司 Computer case and hard disk module thereof
CN102843712A (en) * 2011-06-21 2012-12-26 智邦科技股份有限公司 Method for testing communication efficiency of more than two wireless signal access devices
CN103119564A (en) * 2010-07-16 2013-05-22 西门子公司 Method and apparatus for checking a main memory of a processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103119564A (en) * 2010-07-16 2013-05-22 西门子公司 Method and apparatus for checking a main memory of a processor
CN102778933A (en) * 2011-05-13 2012-11-14 鸿富锦精密工业（深圳）有限公司 Computer case and hard disk module thereof
CN102843712A (en) * 2011-06-21 2012-12-26 智邦科技股份有限公司 Method for testing communication efficiency of more than two wireless signal access devices
CN102843712B (en) * 2011-06-21 2016-08-24 智邦科技股份有限公司 Method for testing the communication performance of two or more wireless signal access devices

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Open date: 20100623