CN101739937B

CN101739937B - Gate drive circuit

Info

Publication number: CN101739937B
Application number: CN2010100006940A
Authority: CN
Inventors: 黄文江; 汪志松; 何宇玺
Original assignee: AU Optronics Corp
Current assignee: AUO Corp
Priority date: 2010-01-15
Filing date: 2010-01-15
Publication date: 2012-02-15
Anticipated expiration: 2030-01-15
Also published as: CN101739937A

Abstract

The invention discloses a grid driving circuit, which is suitable for receiving an external grid power supply voltage and an external control signal, sequentially generating a plurality of internal shift data signal groups, and sequentially outputting a plurality of grid signals according to the external grid power supply voltage, the external control signal and the internal shift data signal groups, wherein each internal shift data signal group comprises a plurality of sequentially generated internal shift data signals; the grid driving circuit comprises a plurality of grid signal generating modules, and each grid signal generating module comprises a voltage modulation circuit and a grid output buffer circuit. The voltage modulation circuit modulates the external grid power supply voltage by using a corresponding one of the internal shift data signal groups and an external control signal to obtain a modulation voltage signal; the grid output buffer circuit comprises a plurality of output stages which are coupled in parallel, and the output stages are enabled in sequence to output the modulation voltage signal to obtain part of the grid signals. The gate drive circuit of the embodiment of the invention can effectively inhibit large peak current from occurring, and avoid redundant power loss and/or avoid circuit burnout.

Description

Gate driver circuit

Technical field

The present invention relates to the display technique field, relate in particular to a kind of gate driver circuit, be suitable for being applied to active matrix display device.

Background technology

Referring to Fig. 1, it illustrates the structured flowchart into existing active matrix display device.As shown in Figure 1, active matrix display device 100 comprises display base plate 110, printed circuit board (PCB) 130, be electrically coupled to a plurality of source electrode driven integrated circuits (indicating) between display panel 110 and the printed circuit board (PCB) 130 and comprise grid-driving integrated circuit Y1 that a plurality of cascades couple and the gate driver circuit of Y2.Wherein, be formed with thin film transistor (TFT) array (not illustrating) on the display base plate 110, grid-driving integrated circuit Y1 in the gate driver circuit and Y2 are electrically coupled to the thin film transistor (TFT) array of display base plate 110 with the switch as each thin film transistor (TFT); Printed circuit board (PCB) 130 is provided with PWM circuit 132; Its control that receives control signal CS is modulated grid power supply voltage VGH; For example top rake is modulated and is got modulated voltage signal VGG, and modulated voltage signal VGG inputs to grid-driving integrated circuit Y1 and the Y2 in the gate driver circuit afterwards.At this; After grid power supply voltage VGH modulates via PWM circuit 132; The waveform of waveform in the time of can making its control front film transistor of the follow-up signal of being exported in regular turn by gate driver circuit during with control tail end thin film transistor (TFT) is more consistent, and then can obtain than uniform display effect.

Yet; Be modulated in the process of modulated voltage signal VGG at grid power supply voltage VGH top rake; Because the modulated voltage signal VGG that the grid-driving integrated circuit Y1 that couples of cascade and Y2 provide with same PWM circuit 132 is as supply voltage; And the current potential of modulated voltage signal VGG is periodically variable; When the current potential of modulated voltage signal VGG when grid power supply voltage VGH top rake is returned to grid power supply voltage VGH after than low level again, discharge currents that form in the PWM circuit 132 can sharply increase and big peak point current (high peak current) occur, cause bigger power loss even can cause circuit burnout.

Summary of the invention

The object of the invention is providing a kind of gate driver circuit exactly, and the peak point current big with effective inhibition occurs, and avoids redundant power loss and/or avoids circuit burnout.

A kind of gate driver circuit that the embodiment of the invention proposes; Be suitable for receiving external gate supply voltage and external control signal, produce a plurality of internal displacement data signal group in regular turn; And export a plurality of signals in regular turn according to external gate supply voltage, external control signal and internal displacement data signal group, each internal displacement data signal group comprises a plurality of internal displacement data-signals that produce in regular turn; The gate driver circuit of present embodiment comprises a plurality of gate signal generation module, and each gate signal generation module comprises voltage modulation circuit and gate output buffer.Wherein, voltage modulation circuit utilize corresponding person and external control signal in the internal displacement data signal group external gate supply voltage that inputs to voltage modulation circuit is modulated and modulated voltage signal; Gate output buffer comprises the output stage of a plurality of coupled in parallel, and these output stages are enabled so that modulated voltage signal output is got the part person in the above-mentioned signal in regular turn.

In one embodiment of this invention, above-mentioned a plurality of gate signal generation module are arranged in the single gate drive integrated circult, so that above-mentioned gate driver circuit comprises the single gate drive integrated circult; Or above-mentioned a plurality of gate signal generation module are arranged in two grid-driving integrated circuits at least, so that above-mentioned gate driver circuit comprises at least two grid-driving integrated circuits.

In one embodiment of this invention, above-mentioned voltage modulation circuit comprises the first transistor, transistor seconds and control module; First source/drain electrode of the first transistor receives the external gate supply voltage because of the electric property coupling relation; First source/drain electrode of transistor seconds is electrically coupled to preset potential; Second source/drain electrode of transistor seconds is electrically coupled to second source/drain electrode of the first transistor and as the output terminal of modulated voltage signal, and the grid of transistor seconds and the grid of the first transistor be electric property coupling mutually; Control module is controlled first and second transistorized grid voltage to determine first and second transistorized conduction and cut-off state, the conduction and cut-off opposite states of the first transistor and transistor seconds according to corresponding person in these internal displacement data signal group and external control signal.

In one embodiment of this invention, the output stage of above-mentioned grid output buffer is enabled through the corresponding person in the internal displacement data signal group in regular turn.

The another kind of gate driver circuit that the embodiment of the invention proposes is applied to comprise the active matrix display device of printed circuit board (PCB), and printed circuit board (PCB) is in order to provide grid power supply voltage, control signal and preset potential; Gate driver circuit in the present embodiment comprises: grid power supply voltage input line, control signal incoming line, preset potential incoming line, a plurality of internal displacement data output channel groups and a plurality of gate signal generation module.Wherein, the grid power supply voltage input line receives the grid supply voltage because of the electric property coupling relation, and the control signal incoming line receives control signal because of the electric property coupling relation, and the preset potential incoming line is electrically coupled to preset potential.Each gate signal generation module comprises voltage modulation circuit and gate output buffer; Voltage modulation circuit is electrically coupled between grid power supply voltage input line and the preset potential incoming line and comprises output terminal and a plurality of input end, and these input ends are electrically coupled to corresponding person and the control signal incoming line in the internal displacement data output channel group; Gate output buffer is electrically coupled to the output terminal of voltage modulation circuit and modulates back and modulated voltage signal that get to receive voltage modulation circuit to grid power supply voltage, and it is further in order to export a plurality of signals according to modulated voltage signal in regular turn.

In one embodiment of this invention, above-mentioned a plurality of gate signal generation module are arranged in the single gate drive integrated circult, so that gate driver circuit comprises the single gate drive integrated circult; Or above-mentioned a plurality of gate signal generation module are arranged in two grid-driving integrated circuits at least, so that gate driver circuit comprises at least two grid-driving integrated circuits.

In one embodiment of this invention, above-mentioned voltage modulation circuit comprises first conductivity type of transistor, second conductivity type of transistor and control module; Wherein, first of first conductivity type of transistor source/drain electrode is electrically coupled to the grid power supply voltage input line; First source/drain electrode of second conductivity type of transistor is electrically coupled to the preset potential incoming line; Second source/drain electrode of second conductivity type of transistor is electrically coupled to second source/drain electrode of first conductivity type of transistor and as the output terminal of voltage modulation circuit, and the grid of the grid of second conductivity type of transistor and first conductivity type of transistor is electric property coupling mutually; Corresponding person in control module and the above-mentioned a plurality of internal displacement data output channel groups and control signal incoming line be electric property coupling mutually; In order to control the conduction and cut-off state of first and second conductivity type of transistor, to make the conduction and cut-off opposite states of the conductivity type of transistor and second conductivity type of transistor of winning.

In one embodiment of this invention; Above-mentioned gate output buffer comprises the output stage of a plurality of coupled in parallel, and these output stages are electrically coupled to a plurality of internal displacement data output channels of the corresponding person in above-mentioned a plurality of internal displacement data output channels respectively and are enabled in regular turn and export above-mentioned a plurality of signals.

In one embodiment of this invention, above-mentioned preset potential incoming line sees through the resistance that is arranged on the printed circuit board (PCB) and preset potential electric property coupling mutually.

The embodiment of the invention is through dividing into gate driver circuit a plurality of gate signal generation module and making these gate signal generation module all have independently voltage modulation circuit (for example being used for the top rake modulation); So that the modulated voltage signal that each gate signal generation module employing different voltages with different modulation circuit provides is as its supply voltage; Therefore can effectively suppress big peak point current and occur, avoid redundant power loss and/or avoid circuit burnout.

Description of drawings

Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, does not constitute qualification of the present invention.In the accompanying drawings:

Fig. 1 shows the structured flowchart of existing active matrix display device;

Fig. 2 shows the circuit block diagram of the gate driver circuit that is relevant to the embodiment of the invention;

Fig. 3 shows the sequential chart of a plurality of internal displacement data signal group of the shift cache circuit generation in the gate driver circuit shown in Figure 2;

Fig. 4 shows the particular circuit configurations of the gate signal generation module in the gate driver circuit shown in Figure 2;

Fig. 5 shows the annexation of output stage shown in Figure 4 and gate line;

Fig. 6 shows the sequential chart of a plurality of signals that are relevant to gate signal generation module shown in Figure 4.

Drawing reference numeral:

100: active matrix display device

110: display base plate

130: printed circuit board (PCB)

132: the PWM circuit

Y1, Y2: grid-driving integrated circuit

VGH: grid power supply voltage

CS: control signal

VGG: modulated voltage signal

R _E: resistance

I (VGH): electric current

VEE: supply voltage

20: gate driver circuit

201: the grid power supply voltage input line

203: the control signal incoming line

205: the preset potential incoming line

GND: earthing potential

230: printed circuit board (PCB)

21: gate signal generation module

212: voltage modulation circuit

214: gate output buffer

23: shift cache circuit

2120: control module

P transistor npn npn: MPy

N transistor npn npn: MNy

Y1～Ym: internal displacement data output channel

Embodiment

For let above-mentioned and other purposes of the present invention, feature and advantage can be more obviously understandable, hereinafter is special lifts preferred embodiment, and conjunction with figs., elaborates as follows.

Referring to Fig. 2, a kind of gate driver circuit 20 that the embodiment of the invention proposes and printed circuit board (PCB) 230 be electric property coupling mutually.Wherein, printed circuit board (PCB) 230 is in order to provide for example earthing potential GND of grid power supply voltage VGH, control signal CS and preset potential to gate driver circuit 20.Gate driver circuit 20 comprises grid power supply voltage input line 201, control signal incoming line 203, preset potential incoming line 205, a plurality of gate signal generation module 21 and shift cache circuit 23; Grid power supply voltage input line 201 receives grid supply voltage VGH because of the electric property coupling relation, and control signal incoming line 203 receives control signal CS because of the electric property coupling relation, and preset potential incoming line 205 sees through and is arranged at the resistance R on the printed circuit board (PCB) 230 _EBe electrically coupled to earthing potential GND.

Hold above-mentionedly, each gate signal generation module 21 comprises voltage modulation circuit 212 and gate output buffer 214.Voltage modulation circuit 212 is electrically coupled between grid power supply voltage input line 201 and the preset potential incoming line 205, and a plurality of input ends of voltage modulation circuit 212 are electrically coupled to the corresponding person among a plurality of internal displacement data output channel group 1～N of control signal incoming line 203 and shift cache circuit 23.Gate output buffer 214 is electrically coupled to the output terminal of voltage modulation circuit 212 and modulates back and modulated voltage signal VGG that get to receive 212 pairs of grid power supply voltage of voltage modulation circuit VGH; At this, gate output buffer 214 is in order to export a plurality of signals according to modulated voltage signal VGG in regular turn.In the present embodiment, gate output buffer 214 also is electrically coupled to the corresponding person among a plurality of internal displacement data output channel group 1～N of shift cache circuit 23.

Referring to Fig. 3; The internal displacement data output channel group 1～N of the shift cache circuit 23 in the present embodiment comprises that respectively a plurality of internal displacement data output channels are to produce a plurality of internal displacement data-signals in regular turn; Thereby internal displacement data output channel group 1～N then can produce N internal displacement data signal group in regular turn, and each internal displacement data signal group comprises a plurality of internal displacement data-signals that produce in regular turn.

Referring to Fig. 4, it shows the particular circuit configurations figure of the gate signal generation module 21 that is relevant to the embodiment of the invention.As shown in Figure 4, voltage modulation circuit 212 comprises P transistor npn npn MPy, N transistor npn npn MNy and control module 2120.The source electrode of P transistor npn npn MPy is electrically coupled to grid power supply voltage input line 201 to receive grid supply voltage VGH, and the drain electrode of P transistor npn npn MPy is as the output terminal of modulated voltage signal VGG.The grid of the grid of N transistor npn npn MNy and P transistor npn npn MPy is electric property coupling mutually, and the source electrode of N transistor npn npn MNy is electrically coupled to preset potential incoming line 205, and the drain electrode of N transistor npn npn MNy is electrically coupled to the drain electrode of P transistor npn npn MPy.Control module 2120 comprises phase inverter or door and Sheffer stroke gate; Wherein, phase inverter in order to control signal CS is carried out operated in anti-phase the control signal after the anti-phase; Or door is electrically coupled to internal displacement data output channel Y1～Ym of the internal displacement data output channel group Y among the internal displacement data output channel group 1～N of shift cache circuit 23, in order to internal displacement data signal group actuating logic or (OR) operation that inner shifted data output channel Y1～Ym is provided; Sheffer stroke gate is carried out the conduction and cut-off state that P transistor npn npn MPy and N transistor npn npn MNy are controlled in logical and non-(NAND) operation in order to the result to control signal after the anti-phase and logical OR operation.At this, the conduction and cut-off opposite states of P transistor npn npn MPy and N transistor npn npn MNy.

Gate output buffer 214 comprises the output stage of a plurality of coupled in parallel; These output stages electric property coupling internal displacement data output channel Y1～Ym are respectively enabled with the control that receives the internal displacement data signal group that is produced by internal displacement data output channel Y1～Ym in regular turn, thereby export a plurality of signals.Further, each output stage comprises and is connected in series and is electrically connected at P transistor npn npn and the N transistor npn npn between modulated voltage signal VGG and the supply voltage VEE and is electrically connected to the P transistor npn npn and the RC series circuit of the drain electrode of N transistor npn npn; Wherein, the grid of the grid of P transistor npn npn and N transistor npn npn is electrically connected and accepts the control of internal displacement data-signal.At this, the RC series circuit is represented the equivalent load of the gate line of output stage phase electric property coupling therewith, and practical circuit diagram can be with reference to figure 5; As shown in Figure 5, the output of the drain electrode of P transistor npn npn and N transistor npn npn is as the output of gate line.

Referring to Fig. 6, it shows the sequential chart of a plurality of signals that are relevant to gate signal generation module 21.Can learn in conjunction with Fig. 4 and Fig. 6; During internal displacement data output channel Y1～Ym produced the internal displacement data-signal in regular turn, when control signal CS was high levels, MPy conducting of P transistor npn npn and N transistor npn npn MNy ended; This moment, the current potential of modulated voltage signal VGG equaled grid power supply voltage VGH; When control signal CS became low level by high levels, P transistor npn npn MPy ended and N transistor npn npn MNy conducting, and this moment, the current potential of modulated voltage signal VGG will be via N transistor npn npn MNy and resistance R _EThe butt joint ground potential GND is discharged and is reduced, and forms current i (VGH) (shown in solid line among Fig. 6).Afterwards, when the current potential of modulated voltage signal VGG was returned to grid power supply voltage VGH again, current i (VGH) was understood sharply increase and a peak point current occurred.Yet the peak value of current i (VGH) is relevant to prior art relatively and by the big peak point current of dotted lines among Fig. 6, has reduced significantly, and then made that the object of the invention is able to reach.

Need to prove at this; Each output stage of the gate output buffer 214 of each gate signal generation module 21 in the gate driver circuit 20 of the embodiment of the invention is not limited to enabled by the internal displacement data-signal, and it also can adopt other frequency signals to enable.In addition, each gate signal generation module 21 in the gate driver circuit 20 of the embodiment of the invention can be arranged in the single gate drive integrated circult, also can be arranged at least two grid-driving integrated circuits; In other words, the gate driver circuit 20 of the embodiment of the invention comprises single gate drive integrated circult or at least two grid-driving integrated circuits.

In sum; The embodiment of the invention is through dividing into gate driver circuit a plurality of gate signal generation module and making these gate signal generation module all have independently voltage modulation circuit; So that the modulated voltage signal that each gate signal generation module employing different voltages with different modulation circuit provides is as its supply voltage; Therefore the gate driver circuit in the prior art only adopts the circuit design of single voltage modulation circuit (for example PM circuit); Can effectively suppress big peak point current and occur, avoid redundant power loss and/or avoid circuit burnout.

In addition; Any those skilled in the art also can do suitably change to the grid electrode drive circuit structure that the above embodiment of the present invention proposes; For example suitably change the circuit design of control module; Change the quantity of shift cache circuit, and/or the electrical connection of each transistorized source electrode and drain electrode is exchanged or the like.

Though the present invention discloses as above with preferred embodiment; Right its is not that any those skilled in the art are not breaking away from the spirit and scope of the present invention in order to qualification the present invention; When can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim scope person of defining.

Claims

1. A gate drive circuit, characterized in that the gate drive circuit is suitable for receiving an external gate power supply voltage and an external control signal, sequentially generating a plurality of internal shift data signal groups, and according to the The external gate power supply voltage, the external control signal and the internal shift data signal group output a plurality of gate signals in sequence, and each of the internal shift data signal groups includes a plurality of sequentially generated internal shift data signals; The gate drive circuit includes a plurality of gate signal generation modules, and each of the gate signal generation modules includes:

A voltage modulation circuit, using a corresponding one of the internal shift data signal group and the external control signal to modulate the external grid power supply voltage input to the voltage modulation circuit to obtain a modulated voltage signal; as well as

A gate output buffer circuit includes a plurality of output stages coupled in parallel, and the output stages are sequentially enabled to output the modulated voltage signal to obtain a part of the gate signal.

2. The gate drive circuit according to claim 1, wherein the gate signal generating module is arranged in a single gate drive circuit, so that the gate drive circuit includes a single gate drive circuit body circuit.

3. The gate drive circuit according to claim 1, wherein the gate signal generation module is arranged in at least two gate drive integrated circuits, so that the gate drive circuit comprises at least two gate pole driver integrated circuit.

4. The gate drive circuit according to claim 1, wherein the voltage modulation circuit comprises:

a first transistor, the first source/drain of the first transistor receives the external gate power supply voltage due to an electrical coupling relationship;

A second transistor, the first source/drain of the second transistor is electrically coupled to a preset potential, the second source/drain of the second transistor is electrically coupled to the first transistor a second source/drain serving as an output terminal of the modulated voltage signal, the gate of the second transistor is electrically coupled to the gate of the first transistor; and

a control unit, controlling the gate voltages of the first and second transistors according to the corresponding one of the internal shift data signal group and the external control signal to determine the conduction of the first and second transistors on/off state;

Wherein, the on/off state of the first transistor is opposite to that of the second transistor.

5. The gate driving circuit according to claim 1, wherein the output stages of the gate output buffer circuit are sequentially activated by the corresponding ones of the internal shift data signal groups able.

6. A gate drive circuit, characterized in that the gate drive circuit is applied to a liquid crystal display comprising a printed circuit board, and the printed circuit board is used to provide a grid power supply voltage, a control signal and a preset potential; the gate drive circuit includes:

a gate power supply voltage input line, which receives the gate power supply voltage due to an electrical coupling relationship;

a control signal input line, which receives the control signal due to the electrical coupling relationship;

a preset potential input line electrically coupled to the preset potential;

multiple sets of internal shifted data output channels; and

A plurality of gate signal generation modules, each of which includes:

A voltage modulation circuit, electrically coupled between the gate power supply voltage input line and the preset potential input line, and includes a plurality of input terminals and an output terminal, the input terminal is electrically coupled to the a corresponding one of the set of internal shift data output channels and the control signal input line; and

a gate output buffer circuit electrically coupled to the output end of the voltage modulation circuit to receive a modulated voltage signal obtained by modulating the gate supply voltage by the voltage modulation circuit, the gate The pole output buffer circuit is used for sequentially outputting a plurality of gate signals according to the modulation voltage signal.

7. The gate drive circuit according to claim 6, wherein the gate signal generating module is arranged in a single gate drive integrated circuit, so that the gate drive circuit comprises a single gate drive integrated circuit .

8. The gate drive circuit according to claim 6, wherein the gate signal generating module is arranged in at least two gate drive integrated circuits, so that the gate drive circuit comprises at least two gate pole driver integrated circuit.

9. The gate drive circuit according to claim 6, wherein the voltage modulation circuit comprises:

a first conductivity type transistor, the first source/drain of the first conductivity type transistor is electrically coupled to the gate power supply voltage input line;

A second conductivity type transistor, the first source/drain of the second conductivity type transistor is electrically coupled to the preset potential input line, the second source/drain of the second conductivity type transistor is electrically Coupled to the second source/drain of the transistor of the first conductivity type and used as the output terminal of the voltage modulation circuit, the gate of the transistor of the second conductivity type is in phase with the gate of the transistor of the first conductivity type electrically coupled; and

a control unit, electrically coupled to the corresponding one of the internal shift data output channel group and the control signal input line, and used to control the conduction/conduction of the first and second conductivity type transistors The off state makes the on/off state of the transistor of the first conductivity type opposite to that of the transistor of the second conductivity type.

10. The gate drive circuit according to claim 6, wherein the gate output buffer circuit comprises a plurality of output stages coupled in parallel, the output stages are respectively electrically coupled to the internal shift The plurality of internal shifted data output channels of the corresponding one in the data output channel group are sequentially enabled to output the gate signal.

11. The gate driving circuit according to claim 6, wherein the preset potential input line is electrically coupled to the preset potential through a resistor disposed on the printed circuit board.