CN101692617A - Multipath signal carrier phase error estimation device - Google Patents

Abstract

A multipath signal carrier phase error estimation device is used to realize the coherent demodulation of down rake receiver. The expressions of the multipath received signal carrier wave and the local carrier phase error theta can be exported according to the expression of multipath received signal and the following instruction book provides the exporting process; the multipath signal carrier phase error estimation device is provided according to the expressions. The device separately sends the outputs of QAM coherent demodulator to six multiplier units of In-phase and Quadrature, the outputs of three multiplier units of In-phase are sent to three processors and then sent to the other three multiplier units to be multiplied by the three outputs of three multiplier units of Quadrature, and finally the phase error tracking signal of signal in each path can be obtained; the phase error tracking signal control phase shifter adjusts the phase of local coherent carriers and recovers the local coherent carriers which are separately synchronous with three-path received signal carriers, the local coherent carriers are used to demodulate three-path signals and finally the In-phase and Quadrature of the three-path signals are separately combined and descrambled.

Description

Multipath Signal Carrier Phase Error Estimation Device

technical field

The invention relates to a device for estimating carrier phase error of a multipath receiving signal used for coherent demodulation of a multipath receiving signal in a downlink rake receiver, which can greatly improve the efficiency of multipath diversity reception of a rake receiver and improve multipath receiving signal The power utilization ratio belongs to the technical field of mobile communication.

Background technique

The CDMA mobile phone receiving equipment using RAKE receiver is a high-tech product in the field of mobile communication. The multipath signal carrier phase error estimation device is a high-tech device used in the downlink rake receiver of the CDMA system, which can improve the power utilization rate of the multipath received signal of the downlink channel in the code division multiple access system and the received signal-to-noise ratio of the receiver. Although there are many materials mentioning that traditional RAKE receivers can be used to achieve carrier coherent demodulation, according to the applicant's research, the "carrier coherent demodulation" commonly used in traditional downlink RAKE receivers is actually very important for multipath receiving signals. Completely coherent, due to the phase difference between the received multipath signal carriers, the coherent carrier C _1L (t)=cosw _1L t recovered in the receiver can only be combined with the received signal carrier S ₁ (t)=S ₁ cosw ₁ t is kept synchronous, the phase difference θ between these two signals is 0, coherent demodulation can be realized, but it will lead to the introduction of their respective received signal carriers and C _1L (t ) Demodulated signal amplitude loss, polarity change and interference related to the phase difference θ. When there is a phase difference θ between the other receiving signal carrier S ₂ (t)=S ₂ cosw ₂ t and C _1L (t), the demodulated signal can be simply expressed as S ₂ cosθ, obviously the phase difference θ will affect the resolved Adjust the polarity and amplitude of the signal. This phase difference loss will greatly reduce the power utilization rate of multipath receiving signals, and cosθ can be defined as the coherent demodulation loss factor. So far, there is no material to provide a specific realization of fully coherent demodulation of multipath signals, and the principle of multipath signal carrier phase error estimation methods and corresponding devices that can eliminate the influence of the coherent demodulation loss factor cosθ. Compared with the traditional rake receiver method, this method can accurately estimate the phase error θ between the multipath received signal carrier and the local carrier, thereby eliminating the influence of the coherent demodulation loss factor cosθ, and greatly improving the rake receiver The efficiency of multipath diversity reception improves the power utilization rate of multipath receiving signals. Since this method is to estimate the carrier phase error of multipath receiving signals in the baseband, its usability is increased, and the application cost is reduced, so that the popularization of rake receivers become possible.

Contents of the invention

Technical problem: the technical problem to be solved in the present invention is: for the multipath signal carrier phase error estimation method that does not have relevant technical data explanation above, propose a kind of multipath receiving signal carrier phase error estimation device that we initiate, this device can be used In order to accurately estimate the phase error θ between the multipath signal carrier and the local carrier, eliminate the uncertain influence brought by the coherent demodulation loss factor cosθ, and realize the coherent demodulation of the multipath received signal, it can greatly increase the RAKE receiver The usability of the system improves the receiving signal-to-noise ratio of the downlink receiver, and greatly improves the downlink power utilization rate of the CDMA system.

Technical solution: The multipath signal carrier phase error estimation method of the present invention is to derive the phase error tracking signals tgθ ₁ , tgθ ₂ , tgθ ₃ corresponding to each path signal according to the multipath signal receiving expression and the traditional rake receiver expression, Under the control of the phase error tracking signal, the phase of the local coherent carrier is adjusted through the phase shifter, so that the phase error θ between the local coherent carrier and the received signal carrier tends to zero, and the local coherence synchronized with the carriers of the three received signals is restored carrier. The QAM coherent demodulator has a dual function here. When the phase error tracking signal tgθ of the corresponding path is not equal to 0, the local carrier signal generated by the phase shifter is not synchronized with the received signal carrier of the corresponding path, and its QAM coherent demodulator is Equivalent to a quadrature down-converter; when the corresponding path phase error tracking signal tgθ is equal to 0, the carrier signal generated by the phase shifter will be fully synchronized with the corresponding path carrier receiving signal, and the QAM coherent demodulator will achieve coherence demodulation. These two functions of the QAM coherent demodulator do not interfere with each other.

The multipath signal carrier phase error estimation device includes an eleventh multiplier, a twelfth multiplier, a thirteenth multiplier, a fourteenth multiplier, and a tenth multiplier for multiplying two-way baseband signals and multiple local PN sequences. The fifth multiplier and the sixteenth multiplier are used to process the baseband signals output by the eleventh multiplier, the twelfth multiplier, and the thirteenth multiplier respectively. The eleventh processor and the twelfth processing A device, a thirteenth processor, a seventeenth multiplier for multiplying the baseband signal output by the processor with the output signal of the fourteenth multiplier, the fifteenth multiplier, and the sixteenth multiplier , the eighteenth multiplier, the nineteenth multiplier; the I _t1 road signal that the twenty-first QAM coherent demodulator demodulates enters respectively the eleventh multiplier, the twelfth multiplier, and the thirteenth multiplier multiplier with the corresponding first local PN sequence, the second local PN sequence and the third local PN sequence, and the Q _t1 road signal enters the fourteenth multiplier, the fifteenth multiplier, the sixteenth multiplier and the Corresponding to multiplying the first local PN sequence, the second local PN sequence and the third local PN sequence, the output terminals of the eleventh multiplier, the twelfth multiplier, and the thirteenth multiplier are respectively connected to the eleventh multiplier The input ends of the processor, the twelfth processor, and the thirteenth processor, the output end of the eleventh processor and the output end of the fourteenth multiplier are connected to the two input ends of the seventeenth multiplier , the output end of the twelfth processor and the output end of the fifteenth multiplier are connected to the two input ends of the eighteenth multiplier, and the output end of the thirteenth processor is connected to the output end of the sixteenth multiplier The two input terminals of the nineteenth multiplier, the seventeenth multiplier, the eighteenth multiplier and the nineteenth multiplier will respectively output the phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ of the three-way received signal carrier, The phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ will be sent to the coherent demodulation circuit in the multipath signal carrier phase error estimation device.

In the coherent demodulation circuit, the input signal S _AD (t) of the three-path received signal is respectively sent to the twenty-first QAM coherent demodulator, the twenty-second QAM coherent demodulator, the twenty-third QAM coherent demodulator, and the twenty-third QAM coherent demodulator. The modulator is used for coherent demodulation with the local coherent carrier generated by the twenty-fourth phase shifter, the twenty-fifth phase shifter, and the twenty-sixth phase shifter respectively, and the twenty-fourth phase shifter, the twenty-first phase shifter The fifth phase shifter and the twenty-sixth phase shifter use the input phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ to adjust the phase of each path corresponding to the local coherent carrier, so that they are in phase with the corresponding received signal carrier; The two-way output signals I _t1 and Q _t1 of the twenty-first QAM coherent demodulator are respectively connected to the two-way input terminals of the twenty-seventh delay circuit, and the two-way output signals of the twenty-second QAM coherent demodulator The output signals I _t2 and Q _t2 are respectively connected to the two input ends of the twenty-eighth delay circuit, the delay control signal C _d1 is connected to the control signal input end of the twenty-seventh delay circuit, and the delay control signal C _d2 Connect the control signal input terminal of the twenty-eighth delay circuit, the output signal I _t1 ' of the twenty-seventh delay circuit and the output signal I _t2 ' of the twenty-eighth delay circuit are respectively connected to the twenty-first addition The two input terminals of the device, the output signal Q _t1 ' of the twenty-seventh delay circuit and the output signal Q _t2 ' of the twenty-eighth delay circuit are respectively connected to the two input terminals of the twenty-second adder, and the second The output I _t3 of the thirteenth QAM coherent demodulator is connected to another input end of the twenty-first adder, and the output Q _t3 of the twenty-third QAM coherent demodulator is connected to another input of the twenty-second adder terminal, the output terminal of the twenty-first adder is connected to one input terminal of the twenty-third multiplier of the descrambling code, and the output terminal of the twenty-second adder is connected to one input terminal of the twenty-fourth multiplier of the descrambling code, The third local PN sequence PN _I3L and PN _Q3L are respectively input to the other two input terminals of the twenty-third multiplier and the twenty-fourth multiplier for descrambling of the I-channel and Q-channel combined signals.

When the QAM coherent demodulator is used to realize coherent demodulation, if the 6 local coherent carriers finally generated by the three phase shifters in Figure 2 are the same frequency and phase as the three-path receiving signal carrier, according to Figure 2, it can be given:

I _t1 ＝I ₁ +I ₂ cosθ ₂ +I ₃ cosθ ₃ +Q ₂ sinθ ₂ +Q ₃ sinθ ₃ (1)

Q _t1 ＝Q ₁ +Q ₂ cosθ ₂ +Q ₃ cosθ ₃ -I ₂ sinθ ₂ -I ₃ sinθ ₃ (2)

I _t2 ＝I ₂ +I ₁ cosθ ₁ +I ₃ cosθ ₃ +Q ₁ sinθ ₁ +Q ₃ sinθ ₃ (3)

Q _t2 ＝Q ₂ +Q ₁ cosθ ₁ +Q ₃ cosθ ₃ -I ₁ sinθ ₁ -I ₃ sinθ ₃ (4)

I _t3 ＝I ₃ +I ₁ cosθ ₁ +I ₂ cosθ ₂ +Q ₁ sinθ ₁ +Q ₂ sinθ ₂ (5)

Q _t3 ＝Q ₃ +Q ₁ cosθ ₁ +Q ₂ cosθ ₂ -I ₁ sinθ ₁ -I ₂ sinθ ₂ (6)

Since PN _I1L , PN _I2L and PN _I3L can be used to determine the due time delay of _It1 and _It2 , the addition process can be completed before despreading, and then PN _I3L is used for despreading. A similar method can be used to derive the receiving part of the Q path, which is omitted here to avoid repetition.

If the 6 local coherent carriers generated by the three phase shifters in Figure 2 do not reach the same frequency and phase as the three received signal carriers, the output of the QAM coherent demodulator is:

I＝I ₁ cosθ ₁ +I ₂ cosθ ₂ +I ₃ cosθ ₃ +Q ₁ sinθ ₁ +Q ₂ sinθ ₂ +Q ₃ sinθ ₃ (7)

Q＝Q ₁ cosθ ₁ +Q ₂ cosθ ₂ +Q ₃ cosθ ₃ -I ₁ sinθ ₁ -I ₂ sinθ ₂ -I ₃ sinθ ₃ (8)

However, the I and Q output signals are processed as follows:

I ₁ ＝PN _I1L ·I＝D ₁ (t)W ₁ (t)cosθ ₁ +PN _I1L ·[I ₂ cosθ ₂ +I ₃ cosθ ₃ +Q ₁ sinθ ₁ +Q ₂ sinθ ₂ +Q ₃ sinQ ₃ ]

(9)

I ₂ =PN _I2L ·I

＝D ₁ (tt _d1 )W ₁ (tt _d1 )cosθ ₂ +PN _I2L ·[I ₁ cosθ ₁ +I ₃ cosθ ₃ +Q ₁ sinθ ₁ +Q ₂ sinθ ₂ +Q ₃ sinθ ₃ ]

(10)

I ₃ =PN _I3L ·I

＝D ₁ (tt _d1 -t _d2 )W ₁ (tt _d1 -t _d2 )cosθ ₃ +PN _I3L [I ₁ cosθ ₁ +I ₂ cosθ ₂ +Q ₁ sinθ ₁ +Q ₃ sinθ ₃ +Q ₂ sinθ ₂ ]

                        

In formula (9), since PN _I1L is asynchronous to the short PN sequences in I ₂ , I ₃ , Q ₁ , Q ₂ and Q ₃ , these five signals cannot be solved, and it will appear as signal I ₁ composed of multiple The CDMA self-interference noise introduced by the path will be limited by the low-pass filter connected after the multiplier. Here, the corresponding low-pass filter is omitted for a simplified block diagram. Do similar processing for I ₂ and I ₃ .

PN _I2L Q＝-I ₂ sinθ ₂ +PN _I2L [Q ₁ cosθ ₁ +Q ₂ cosθ ₂ +Q ₃ cosθ ₃ -I ₁ sinθ ₁ -I ₃ sinθ ₃ ]

                          

The last item in formula (12) is noise, and -I ₂ sinθ ₂ can be solved after passing through a low-pass filter. Doing similar processing can also get -I ₁ sinθ ₁ , -I ₃ sinθ ₃ .

Therefore, according to the above formulas (7) to (12), the block diagram of the circuit for generating multipath carrier phase error tracking signals of received signals can be derived, as shown in Fig. 1 .

Beneficial effects: Since the invention utilizes the given multipath receiving signal phase error estimation method to accurately estimate the phase error θ between each multipath receiving signal carrier and the local coherent carrier, it can eliminate the inconvenience caused by the coherent demodulation loss factor cosθ Determining the influence, realizing coherent demodulation of multipath signals, can construct a new type of multipath receiving signal carrier coherent demodulation rake receiver, which improves the receiving signal-to-noise ratio of the downlink receiving end, and greatly improves the downlink performance of the CDMA system. power utilization. Since the method for estimating the phase error of multipath received signals is implemented in the baseband, its usability is increased and its application cost is reduced.

Description of drawings

FIG. 1 is a schematic diagram of a phase error tracking signal generation circuit in a multipath signal carrier phase error estimation device. It includes the eleventh multiplier M ₁₁ , the twelfth multiplier M ₁₂ , the thirteenth multiplier M ₁₃ , the fourteenth multiplier M ₁₄ , the th The fifteenth multiplier M ₁₅ and the sixteenth multiplier M ₁₆ are used to process the baseband signals output by the eleventh multiplier M ₁₁ , the twelfth multiplier M ₁₂ , and the thirteenth multiplier M ₁₃ respectively The eleventh processor 11, the twelfth processor 12, and the thirteenth processor 13 are used to compare the baseband signal output by the processor with the corresponding fourteenth multiplier M ₁₄ and fifteenth multiplier M ₁₅ , the seventeenth multiplier M _{17 ,} the eighteenth multiplier M ₁₈ , and the nineteenth multiplier M ₁₉ for multiplying the output signals of the sixteenth multiplier M 16 .

Fig. 2 is the schematic diagram of the part of the coherent demodulation circuit in the multipath signal carrier phase error estimation device, which includes three twenty-first QAM coherent demodulators 21, the second Twelve QAM coherent demodulators 22, twenty-third QAM coherent demodulators 23, three twenty-fourth phase shifters 24 that use phase error tracking signals to recover local coherent carriers that are synchronized with the three-path received signal carriers, The twenty-fifth phase shifter 25, the twenty-sixth phase shifter 26, the twenty-seventh delay circuit 27, the twenty-eighth delay circuit 28 for adjusting the multipath time delay, for the I path three-path The 21st adder M ₂₁ for signal superposition, the 22nd adder M ₂₂ for Q-path three-path signal superposition, the 23rd multiplier M ₃₃ for I-path combined signal descrambling, using The twenty-fourth multiplier M ₂₄ for descrambling the Q-way combined signal.

Detailed ways

Embodiment one

In this embodiment, a baseband signal is used to generate a multipath carrier phase error tracking signal to realize phase error estimation. See Figure 1 for the schematic diagram of the phase error tracking signal generation circuit in the multipath signal carrier phase error estimation device. It mainly consists of the following parts: including the eleventh multiplier M ₁₁ , the twelfth multiplier M ₁₂ , the thirteenth multiplier M ₁₃ , and the fourteenth multiplier for multiplying two baseband signals by multiple local PN sequences The multiplier M ₁₄ , the fifteenth multiplier M ₁₅ , and the sixteenth multiplier M ₁₆ are used to respectively provide the eleventh multiplier M ₁₁ , the twelfth multiplier M ₁₂ , and the thirteenth multiplier M ₁₃ The eleventh processor 11, the twelfth processor 12, and the thirteenth processor 13 that process the output baseband signal are used to combine the baseband signal output by the processor with the corresponding fourteenth multiplier M ₁₄ , the 17th multiplier M ₁₇ , the 18th multiplier M ₁₈ , and the 19th multiplier M _{19 for multiplying the output signals of the fifteenth multiplier M 15 and} the sixteenth multiplier M ₁₆ .

First, the I _t1 road signal demodulated by the twenty-first QAM coherent demodulator 21 in Fig. 2 enters the eleventh multiplier M ₁₁ , the twelfth multiplier M ₁₂ and the thirteenth multiplier respectively M ₁₃ is multiplied by the corresponding first local PN sequence PN _I1L , the second local PN sequence PN _I2L and the third local PN sequence PN _I3L , and the Q _t1 signal enters the fourteenth multiplier M ₁₄ and the fifteenth multiplier respectively. The multiplier M ₁₅ and the sixteenth multiplier M ₁₆ multiply the corresponding first local PN sequence PN _I1L , the second local PN sequence PN _I2L and the third local PN sequence PN _I3L , the eleventh multiplier M ₁₁ The output signals of the twelfth multiplier M ₁₂ and the thirteenth multiplier M ₁₃ are respectively I ₂₁ cosθ ₁ , I ₂₂ cosθ ₂ , and I ₂₃ cosθ ₃ , the fourteenth multiplier M ₁₄ , the fifteenth multiplier The output signals of the multiplier M ₁₅ and the sixteenth multiplier M ₁₆ are respectively -I ₂₁ sinθ ₁ , -I ₂₂ sinθ ₂ , -I ₂₃ sinθ ₃ . The output signal I ₂₁ cosθ ₁ of the eleventh multiplier M ₁₁ is sent to the eleventh processor 11 to obtain the output signal -1/I ₂₁ cosθ ₁ of the eleventh processor 11, and the The output signal -1/I ₂₁ cosθ ₁ of the eleventh processor 11 and the output signal -I ₂₁ sinθ ₁ of the fourteenth multiplier M ₁₄ are sent to the seventeenth multiplier M ₁₇ for multiplication, so The output signal of the seventeenth multiplier M ₁₇ is the phase error tracking signal tgθ ₁ of this signal, and the output signals of the twelfth multiplier M ₁₂ and the thirteenth multiplier M ₁₃ have undergone the above-mentioned similar processing The corresponding phase error tracking signals tgθ ₂ and tgθ ₃ can be obtained. The phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ will be sent to the coherent demodulation circuit in the multipath signal carrier phase error estimation device.

In the coherent demodulation circuit of the multipath signal carrier phase error estimation device, the phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ are respectively input into the twenty-fourth phase shifter 24 and the twenty-fourth phase shifter in Fig. 2 The phaser 25 and the twenty-fourth phase shifter 26 adjust the phase of the local coherent carrier through the mover, so that the phase error θ between the local coherent carrier and the carrier of the received signal tends to zero, and restore the carrier synchronization with the three received signals respectively The recovered local coherent carrier can be used in the QAM coherent demodulator to realize the carrier separation of the multi-path signal and demodulate the three-path signals respectively. The two-way output signals I _t1 and Q _t1 of the twenty-first QAM coherent demodulator 21 are respectively connected to the two-way input terminals of the twenty-seventh delay circuit 27, and the twenty-second QAM coherent demodulator 22 The two-way output signals I _t2 and Q _t2 are respectively connected to the two input ends of the twenty-eighth delay circuit 28, and the delay control signal C _d1 is connected to the control signal input end of the twenty-seventh delay circuit 27. When the control signal C _d2 is connected to the control signal input end of the twenty-eighth delay circuit 28, the output signal I _t1 ' of the twenty-seventh delay circuit 27 and the output signal of the twenty-eighth delay circuit 28 The output signal I _t2 ' is respectively connected to the two input ends of the twenty-first adder M ₂₁ , the output signal Q _t1 ' of the twenty-seventh delay circuit 27 and the output signal Q _t2 ' of the delay circuit 28 Connect the two input ends of the adder M ₂₂ respectively, the output I _t3 of the twenty-three QAM coherent demodulator 23 is connected to the other input end of the twenty-first adder M ₂₁ , the twenty-third The output Q _t3 of the QAM coherent demodulator 23 is connected to another input terminal of the twenty-second adder M ₂₂ , and the output terminal of the twenty-first adder M ₂₁ is connected to the descrambling code twenty-third multiplier One input terminal of M ₂₃ , the output terminal of the twenty-second adder M ₂₂ is connected to one input terminal of the twenty-fourth multiplier M ₂₄ of the descrambling code, and PN _I3L and PN _Q2L respectively input the twenty-third The other two input terminals of the multiplier M ₂₃ and the twenty-fourth multiplier M ₂₄ perform descrambling of the I-channel and Q-channel combined signals.

Except above-mentioned embodiment, this patent also can have other embodiment. All technical solutions formed by equivalent replacement or equivalent transformation fall within the scope of protection required by this patent.

Claims (2)

1. A multipath signal carrier phase error estimation device is characterized in that the device includes the eleventh multiplier (M ₁₁ ), the twelfth multiplier ( M ₁₂ ), the thirteenth multiplier (M ₁₃ ), the fourteenth multiplier (M ₁₄ ), the fifteenth multiplier (M ₁₅ ), and the sixteenth multiplier (M ₁₆ ), are used to respectively The eleventh processor ( ₁₁ ), the twelfth processor for processing the baseband signals output by the eleventh multiplier (M ₁₁ ), the twelfth multiplier (M 12 ), and the thirteenth multiplier (M ₁₃ ) (12), the thirteenth processor (13), used for the baseband signal output by the processor and corresponding to the fourteenth multiplier (M ₁₄ ), the fifteenth multiplier (M ₁₅ ), the tenth multiplier The seventeenth multiplier (M ₁₇ ), the eighteenth multiplier (M ₁₈ ), and the nineteenth multiplier (M ₁₉ ) for multiplying the output signals of the six multipliers (M ₁₆ ); the twenty-first QAM coherent demodulation The I _t1 road signal demodulated by the device (21) enters the eleventh multiplier (M ₁₁ ), the twelfth multiplier (M ₁₂ ), the thirteenth multiplier (M ₁₃ ) and the corresponding first multiplier respectively. The local PN sequence (PN _I1L ), the second local PN sequence (PN _I2L ) and the third local PN sequence (PN _I3L ) are multiplied, and the Q _t1 signal enters the fourteenth multiplier (M ₁₄ ), the tenth multiplier respectively The five multipliers (M ₁₅ ), the sixteenth multiplier (M ₁₆ ) multiply the corresponding first local PN sequence (PN _I1L ), the second local PN sequence (PN _I2L ) and the third local PN sequence (PN _I3L ) , the output terminals of the eleventh multiplier (M ₁₁ ), the twelfth multiplier (M ₁₂ ), and the thirteenth multiplier (M ₁₃ ) are respectively connected to the eleventh processor (11), the tenth The input terminals of the second processor (12), the thirteenth processor (13), the output terminal of the eleventh processor (11) and the output terminal of the fourteenth multiplier (M ₁₄ ) are connected to the tenth The two input terminals of the seven multipliers (M ₁₇ ), the output terminals of the twelfth processor (12) and the output terminals of the fifteenth multiplier (M ₁₅ ) are connected to the eighteenth multiplier (M ₁₈ ) Two input ends, the output end of the thirteenth processor (13) and the output end of the sixteenth multiplier (M ₁₆ ) are connected to the two input ends of the nineteenth multiplier (M ₁₉ ), the seventeenth multiplier (M ₁₇ ), the eighteenth multiplier (M ₁₈ ) and the nineteenth multiplier (M ₁₉ ) will respectively output the phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ of the three received signal carriers, and the phase error tracking signal tgθ ₁ , tgω ₂ and tgθ ₃ will be sent to the coherent demodulation circuit in the multipath signal carrier phase error estimation device. 2. multi-path signal carrier phase error estimation device as claimed in claim 1, it is characterized in that in the described coherent demodulation circuit, the input signal S _AD (t) of three-path receiving signal is sent into the twenty-first QAM coherent solution respectively The modulator (21), the twenty-second QAM coherent demodulator (22), the twenty-third QAM coherent demodulator (23), and the twenty-fourth phase shifter (24), the twenty-fifth The local coherent carrier wave produced by the phase shifter (25), the twenty-sixth phase shifter (26) carries out coherent demodulation, and the twenty-fourth phase shifter (24), the twenty-fifth phase shifter (25) and the first Twenty-six phase shifters (26) use the input phase error tracking signals tgθ ₁ , tgθ ₂ and tgθ ₃ to adjust the phases of the corresponding local coherent carriers in each path, so that they are in phase with the corresponding received signal carriers respectively; the first The two-way output signals I _t1 and Q _t1 of the twenty-first QAM coherent demodulator (21) are respectively connected to the two-way input terminals of the twenty-seventh delay circuit (27), and the twenty-second QAM coherent demodulator The two output signals I _t2 and Q _t2 of (22) are respectively connected to the two input ends of the twenty-eighth delay circuit (28), and the delay control signal C _d1 is connected to the twenty-seventh delay circuit (27) The control signal input terminal of the control signal, the delay control signal C _d2 is connected to the control signal input terminal of the twenty-eighth delay circuit (28), the output signal I _t1 ' of the twenty-seventh delay circuit (27) and the second The output signal I _t2 ' of the eighteenth delay circuit (28) is connected to two input terminals of the twenty-first adder (M ₂₁ ) respectively, and the output signal Q _t1 ' of the twenty-seventh delay circuit (27) and the first The output signal Q _t2 ' of the twenty-eight time delay circuit (28) is connected to two input terminals of the twenty-second adder (M ₂₂ ) respectively, and the output I _t3 of the twenty-third QAM coherent demodulator (23) is connected The other input end of the twenty-first adder (M ₂₁ ), the output Q _t3 of the twenty-third QAM coherent demodulator (23) is connected to the other input end of the twenty-second adder (M ₂₂ ) , the output terminal of the twenty-first adder (M ₂₁ ) is connected to the descrambling code input terminal of the twenty-third multiplier (M ₂₃ ), and the output terminal of the twenty-second adder (M ₂₂ ) is connected to the descrambling code One input terminal of the twenty-fourth multiplier (M ₂₄ ), the third local PN sequence PN _13L and PN _Q3L respectively input the twenty-third multiplier (M ₂₃ ) and the twenty-fourth multiplier (M ₂₄ ) The other two input terminals are used for descrambling of combined signals of the I channel and the Q channel.

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