CN101553919A - Recyclying faulty multi-die packages - Google Patents
Recyclying faulty multi-die packages Download PDFInfo
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- CN101553919A CN101553919A CN 200780002176 CN200780002176A CN101553919A CN 101553919 A CN101553919 A CN 101553919A CN 200780002176 CN200780002176 CN 200780002176 CN 200780002176 A CN200780002176 A CN 200780002176A CN 101553919 A CN101553919 A CN 101553919A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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Abstract
The present invention teaches the recycling of a faulty multi-die memory package by isolating the functional part of the package and using it as a smaller memory package.
Description
Technical field
The present invention relates to be used to reuse the system and method for polycrystalline unit (multi-die) encapsulation that comprises defective brilliant unit.Reuse it by effective (functional) part of insulation package and with underproof polycrystalline metamemory encapsulation as less memory package.
Background technology
It is well-known that polycrystalline unit is encapsulated in digital storage manufacturing field.When because the restriction that brilliant unit makes and often use the encapsulation of polycrystalline unit when can't be in practice providing required memory span with single chip.
Because the brilliant unit self that uses in polycrystalline unit encapsulation is very big, their output is limited and be restricted.Sometimes, in uncut wafer, can find defective brilliant unit in " selection of brilliant unit " process of the brilliant unit of test.But some defective brilliant unit just is detected after wafer is cut and assembles brilliant unit.In this stage, if in encapsulation the underproof words of phase vincial faces unit, then can't utilize effective brilliant unit.This causes output significantly to reduce, and the profit of manufacturer is subjected to very big loss.
Mode by numerical example, if find just that after assembling brilliant first underproof probability is 10%, then the underproof probability of twin crystal unit encapsulation is 19%, and draws from expression formula: 1-(0.9*0.9+0.1*0.1), and the probability that encapsulation has an effectively brilliant unit is 18%.
These percentages can cause the appreciable impact quality of production.The first encapsulation of underproof polycrystalline can not be used as single-die package by reality, and is defective because it is marked as usually.In other words, do not pick out effective brilliant unit, and under many circumstances, the existence of defective brilliant unit has hindered the use of effective brilliant unit.This just need provide a kind of method and apparatus, is used for the first encapsulation of this underproof polycrystalline as single-die package.
Problem described above is particularly remarkable under the very general situation of megacryst unit lamination.Typically, these situations mainly come across in the production process of the production of high density flash memory device (current mainly is nand type memory) and big DRAM device.The memory die of lamination is popular in practice, because this process provides bigger brilliant first density with identical package area.
The cost of making megacryst unit is very high.In addition, there is high relatively disqualification rate in megacryst unit.In the time can't utilizing element a part of in the integrated digital circuit in other type, memory chip is the function homogeneity.Therefore, the part of memory device in principle can be as the memory chip than low capacity.For the using method of the memory chip that is subjected to partial destruction in process of production, there is not prior art to be described at present.
Need a kind of method to reuse the encapsulation that (that is conversion) underproof polycrystalline unit is encapsulated as the active brilliant unit with lesser amt that can actually use.
Summary of the invention
For the sake of clarity, a plurality of terms below are specifically defined to use in the application's context.Use term " polycrystalline unit " to represent to comprise encapsulation more than the memory die of a similar type (being also referred to as the encapsulation of polycrystalline unit) in this application.Use term " SDP " to represent single-die package among the application.Use term " DDP " to represent to comprise the polycrystalline unit of two similar brilliant units (being the encapsulation of twin crystal unit) among the application.Use term " QDP " to represent to comprise the polycrystalline unit of four similar brilliant units (i.e. four brilliant units encapsulation) among the application.
Use term " the brilliant unit in top " to represent to be chosen as among the DDP the brilliant unit of layer crystal unit among the application.Use term " the brilliant unit in the end " to represent to be chosen as down among the DDP the brilliant unit of layer crystal unit among the application.Use term " effectively brilliant unit " to represent qualified brilliant unit among the application.
In addition, use term " brilliant first weld pad (die pad) " to represent that brilliant first periphery is used for typically by welding and pin brilliant unit being connected to the conducting region of external system among the application.Use term " packaging body " to represent the solid section that encapsulates among the application, do not comprise the connection pin.Use term " self-isolation design " to represent to be designed to when voltage source or VCC disconnection, not load the I/O circuit of other InterWorking Equipment among the application.Use term " active " to represent the brilliant unit that has power supply to supply with among the application.Similarly, passive brilliant unit refers to that the crystalline substance that does not have power supply to supply with is first.
The purpose of this invention is to provide the method and apparatus that is used to design the encapsulation of polycrystalline unit, make when detecting defective brilliant unit, be easy to it is improved to become and have active in a small amount brilliant first available encapsulation.
For the sake of clarity, will describe according to the general introduction that is used for underproof DDP is become the method and apparatus of available SDP of the present invention.These methods can comprise: some pin in (1) separate packages makes when needed can the underproof brilliant unit of external isolation; (2) in brilliant unit, embed when needed and can its fuse that blows be connected by surge; And known other similar fashion in (3) electronic engineering field.
When two similar brilliant units were used as brilliant unit in top among the DDP and the brilliant unit in the end, each in them all must specify it as pushing up or the state at the end, makes host computer system can be addressed to each in them respectively.In the prior art, this realizes with some kinds of alternative.In order to understand the present invention better, some kinds of feasible alternative for realizing have been described at this.The representative embodiment of these modes comprises:
(1) permanent (that is, hardwired) distinguishes brilliant unit, can form the brilliant first difference that distinguishes from the manufactured brilliant unit that is used for the brilliant unit in the end that is used as the brilliant unit in top with manufactured in brilliant unit;
(2) have the fact of non-volatile memories according to brilliant unit, the brilliant unit of indication can be assigned with as the brilliant unit in top still be that the data bit of the brilliant unit in the end is programmed in manufacture process in the brilliant unit.The realization of the method makes that brilliant unit is physically identical in their manufacture process, and is marked as " top " or " end " by software.Because it only is 1 bit information that this mode of use is wanted data quantity stored, so can use simple fuse as this data-bit memory.The permission of the method is specified one type brilliant unit by blowing such fuse, and does not blow the brilliant unit that this fuse is specified another kind of type;
(3) unique sequence number can be programmed in each brilliant unit, sequence number can be read and decoded by host computer, as using ISA Plug ﹠amp; Play equipment is finished.The realization of the method allows sequence number is interpreted as the index of suitable address location;
(4) binary system control input is provided can for each brilliant unit, indicating each brilliant unit is the top or the state at the end.The realization of the method allows to determine according to the installation in host computer system the appointment of brilliant unit; And
(5) can be for each the brilliant unit brilliant unit bunch of (or use one of above method) provide independent " sheet choosing " signal, thus indication is brilliant one of first become and can operate making on the basis of signaling encapsulation.The realization of the method allows the effect of brilliant unit to be provided with flexibly, and allow two brilliant units its make with installation process in all identical.
Specify the correlation method of selecting according to brilliant unit, embodiments of the invention make encapsulation connect host computer system and effectively brilliant unit.Use five kinds of first specific modes of crystalline substance described above as an example, carry out in the following manner to the connection of effective brilliant unit from host computer system:
(a) if brilliant unit specifies (as above in (1) that joint is described) that is hardwired in the brilliant unit, the available brilliant unit that then is used to reuse will be two types inherently: " the effectively brilliant unit in top " and " the effectively brilliant unit in the end ".Use the host computer system of the DDP of recycling then can be two types, each type has:
(i) a pair of position on the host computer system: one is wired to the brilliant unit in effective top and is wired to the brilliant unit in the effective end.Only there is a position to comprise the brilliant unit of recycling in the above-mentioned position, corresponding to the first type of crystalline substance, its can be effectively the brilliant unit in top also can be the brilliant unit in the effective end (host computer system can be on the basis of power supply in two brilliant units of checking which exist, and suitably be addressed to this crystalline substance unit according to its specified state.Another dummy receptacle will not influence this process.); Or
The (ii) host computer system of two versions, they are identical on function, but (version is wired to the brilliant unit in effective top to brilliant first type difference of the recycling that they adapted to, and ignores the brilliant unit in the end, and another version is wired to the brilliant unit in the effective end, ignores the brilliant unit in top).The host computer system of first version is used with the brilliant unit of the recycling with the brilliant unit in effective top, and second version uses with the brilliant unit with the first recycling of crystalline substance of the effective end;
(b) if during the manufacturing of brilliant unit the appointment of brilliant unit is programmed into (as above (2) and (3) described in the joint) in the brilliant unit, the solution in then aforesaid (a) can be suitable for.
(c) if brilliant unit specifies the aerial lug control (as above (4) described in the joint) by brilliant unit, then host computer system can have a socket, and the brilliant unit that can be programmed reusing treats as the brilliant unit in top all the time, send two kinds of brilliant metainstructions with as the top work as the brilliant unit, and by for underproof brilliant unit power (being VCC) do not make it invalid.Clearly, also can design host computer system with the brilliant unit of any recycling of using this type of as the brilliant unit in the end.Both can realize negatively also energetically that this optionally VCC used, as follows:
(i) energetically---the VCC of defective brilliant unit can be do not connected, and the VCC of effective brilliant unit can be connected; Or
(ii) negatively---can connect two VCC circuits in advance, and the VCC of the defective brilliant unit that can cut off, destroys or insulate; And
(d) specify (as above (5) described in the joint) if use " sheet choosing " signal to carry out brilliant unit, then can use the solution in above-mentioned (c), specify to be used for outside wiring.Host computer system can be indicated two brilliant units conduct " the brilliant unit in top " all the time and only be provided VCC to effective brilliant unit.
More than description has been explained and can have been realized four kinds of possibility methods of the present invention.These four kinds of methods are not exhaustive.Select them only in order to represent that " 2 * 2 " plant combination, that is: hardware mode (method (a) and (c)), software mode (method (b) and (d)), built-in mode (method (a) and (b)) and external control mode (method (c) and (d)).
In above-described all embodiment, needs in two weld pads are connected to an independent source, and one means in the connection that is used for disconnecting in two connections of line in advance or connects two disconnections are provided.The exemplary means that is used to disconnect the connection of line in advance is: machine cuts, blow and use nonconducting coating to insulate by overcurrent.All these methods all are as known in the art.The exemplary means that is used to connect two weld pads that do not connect is that conduction connects (for example, soldered wires).These modes also are as known in the art.
Therefore, according to the present invention, provide a kind of polycrystalline metamemory encapsulation for the first time, this encapsulation comprises: (a) a plurality of memory dies; (b) be used at least one outside connection from described encapsulation of each brilliant unit of a plurality of memory dies, at least one in described outside the connection is used for providing specially the single brilliant unit of voltage supply line road to described a plurality of memory dies.
Preferably, described a plurality of memory die comprises flash memory dies.
Preferably, described a plurality of memory die comprises NAND type flash memory dies.
Preferably, described a plurality of memory die has outside a connection with the self-isolation design configurations.
Preferably, outside a connection is configured to provide the voltage supply line road that is exclusively used in the I/O circuit of one in a plurality of memory dies single brilliant unit.
According to the present invention, a kind of polycrystalline metamemory encapsulation is provided for the first time, this encapsulation comprises: (a) a plurality of memory dies are passive when the brilliant unit of the second memory in described a plurality of memory dies of the brilliant unit of the first memory in described a plurality of memory dies is active.
Preferably, described a plurality of memory die comprises flash memory dies.
Preferably, described a plurality of memory die comprises NAND type flash memory dies.
Preferably, the brilliant unit of described first memory is underproof.
According to the present invention, provide a kind of memory product line for the first time, described production line comprises: (a) at least two memory products, they have: (i) the available memory size that equates basically; (ii) different interface specification for each memory product; And (iii) at least two memory dies, wherein each memory product has the different subclass of passive memory die.
Preferably, described memory die comprises flash memory dies.
Preferably, described memory die comprises NAND type flash memory dies.
According to the present invention, a kind of method of using the encapsulation of polycrystalline metamemory is provided for the first time, this method may further comprise the steps: (a) make the encapsulation of polycrystalline metamemory to comprise a plurality of memory dies; (b) in the brilliant unit of the first memory of a plurality of memory dies, detect fault; (c) second memory that activates in a plurality of memory dies is brilliant first, makes the brilliant unit of first memory passive simultaneously.
Preferably, make the encapsulation of polycrystalline metamemory and comprise a plurality of flash memory dies of manufacturing with the step that comprises a plurality of memory dies.
Preferably, make the encapsulation of polycrystalline metamemory and comprise a plurality of NAND type flash memory dies of manufacturing with the step that comprises a plurality of memory dies.
These and other embodiment will become more clear from following specific descriptions and example.
Description of drawings
Only the present invention is described with reference to the accompanying drawings at this by the mode of example, wherein:
Fig. 1 illustrates the rough schematic view of the DDP example with typical prior art design;
Fig. 2 illustrates the rough schematic view of the DDP example of the VCC circuit with modification;
Fig. 3 illustrates the rough schematic view of the DDP example of VCC circuit with modification and VCC_I/O circuit.
Embodiment
The present invention is the system and method that is used to reuse the polycrystalline unit encapsulation that comprises defective brilliant unit.Can understand principle and the operation that is used to reuse the polycrystalline unit encapsulation that comprises defective brilliant unit according to of the present invention better with corresponding description with reference to the accompanying drawings.
Fig. 1 illustrates the rough schematic view of the typical twin crystal unit's package example 20 (or DDP example 20) that comprises brilliant unit 22 in top and the brilliant unit 24 in the end.As shown in fig. 1, DDP example 20 is used to illustrate typical prior art DDP and how designs.From this structure, can know and find out, if top brilliant first 22 is defective, then the brilliant unit 24 in the end and therefore the performance of whole DDP example 20 all can be affected because the brilliant unit 22 in top still remains connected to all package contacts (that is, VCC 25, CS 26, I/O 27 and GND 28).VCC 25 is dc voltage sources, and CS 26 is " sheet choosing " (are used for individually selecting the encapsulation of chip on bus, cancel the selection to other encapsulation simultaneously), and I/O 27 is input/output signals, and GND 28 is the ground of DDP example 20.We also describe as the example of polycrystalline unit encapsulation not only with the example of Fig. 1 as the prior art design.When shown in Fig. 1 be designed for DDP the time, also can use similar design to polycrystalline unit encapsulation.
Fig. 2 illustrates the rough schematic view of the amended twin crystal unit's encapsulation 30 (or DDP 30) that comprises brilliant unit 32 in top and the brilliant unit 34 in the end.DDP 30 comprises and is used for each independent DC power supply of two brilliant units, and have pin separately in the encapsulation of DDP 30.VCC_T 35 offers the brilliant unit 32 in top to dc voltage, and VCC_B 39 offers the brilliant unit 34 in the end to dc voltage.The structure of the DDP example 20 shown in this embodiment and Fig. 1 forms contrast, and only having in Fig. 1 provides power supply to these two public VCC 25 of the brilliant unit in the brilliant unit 22 in top and the end 24.DDP 30 (shown in Fig. 2) has utilized and the similar public CS 36 of DDP example 20 (shown in Fig. 1), I/O 37 and GND 38.When shown in Fig. 2 be designed for DDP the time, also can use similar design to polycrystalline unit encapsulation.
Under the defective and necessary segregate situation in two brilliant units, as shown in Figure 2, DDP 30 allows to disconnect relevant VCC pin (VCC_T 35 or VCC_B39) by the user.Under this sight, the first encapsulation of underproof polycrystalline can be categorized as " pushing up defective " and " end is defective ".These promptly do not provide voltage to defective brilliant first pin because the user of the encapsulation of a brilliant defective SDP of becoming of unit can design the system that they will realize in this manner.For example, brilliant unit becomes under the situation of defective brilliant unit accidentally the end of at, can suppress the brilliant unit in (promptly invalid) all ends.
Other method that suppresses one of brilliant unit can comprise: the leg (being pin) of (1) cutting and the first corresponding encapsulation of defective crystalline substance; (2) use the insulating coating known to apply the pin corresponding to this defective brilliant unit of encapsulation in the electronic engineering field; (3) eliminate in the encapsulation corresponding to the conductive welding pad (being solder joint) under the associated conductor of defective brilliant unit; And the fuse connection in the relevant VCC circuit trace of (4) fusing, thereby off voltage source.
It will be appreciated that other method and apparatus can be used for the first weld pad of crystalline substance is disconnected from power-supply system in addition.The invention is intended to comprise the embodiment of any this method or device.
It should be noted that in the present invention, brilliant unit must be designed to when can not get voltage at the first pin place of defective crystalline substance, brilliant unit neither loads host computer system and also do not cause second brilliant first interference.The first method for designing of this crystalline substance is well known in the art, and often in line receiver unit, use (as AM26C32-four differential line receivers, can obtain from Texas Instrument, mailbox 655303, the Dallas, Texas 75265, describe to some extent in the pdf network file: http://focus.ti.com/lit/ds/symlink/am26c32.pdf), wherein receiver often cuts out by simply it being disconnected from VCC.In this application, this type of design will be called as " self-isolation design ".
Fig. 3 shows the rough schematic view of the amended DDP 40 that comprises brilliant unit 42 in top and the brilliant unit 44 in the end.In this embodiment, the brilliant unit of shown each all has two different voltage sources of the encapsulation of being connected to, one is used for the core voltage source and another is used for the I/O circuit power, as: the core VCC_B 49 that (1) is used to push up the core VCC_T 45 of brilliant unit 42 and is used for end crystalline substance first 44, and (2) are used to push up the public VCC_I/O 50 of brilliant first 44 the I/O voltage source of the brilliant unit 42 and the end.DDP40 (shown in Fig. 3) uses public CS 46, I/O 47 and the GND 48 similar to DDP example 30 (shown in Fig. 2).
As shown in Figure 3, it is shared to two brilliant units that VCC_I/O 50 can keep, because it only presents the I/O 47 of brilliant unit.I/O 47 is very little, therefore can not become the defective part of brilliant unit.This embodiment allows the standard design of I/O 47, and the I/O 37 among the embodiment of this and Fig. 2 forms contrast, and the I/O 37 among Fig. 2 needs custom-designed I/O not load host computer system to guarantee defective brilliant unit.But in another preferred embodiment of the present invention, the VCC_I/O50 of two brilliant units can be separated into the single power supply that is used for each brilliant unit, thereby can suppress in the brilliant unit one by invalid its corresponding I/O VCC (not shown).Therefore, according to the present invention, can suppress defective brilliant unit by invalid its VCC, invalid its I/O VCC or invalid whole two elements.When shown in Fig. 3 be designed for DDP the time, also can use similar design to polycrystalline unit encapsulation.
It should be noted, the present invention includes the encapsulation of polycrystalline unit and be designed to suppress (promptly invalid) defective brilliant unit to remedy any embodiment of effective brilliant unit.As for the encapsulation of polycrystalline unit, two or more embodiment that comprise random number of dies in encapsulation include in the present invention.In addition, it shall yet further be noted that to the present invention includes embodiment, as long as at least some in these power circuits are separated to isolate underproof brilliant unit with any amount VCC power circuit.
Though the embodiment at limited quantity has described the present invention, it will be appreciated that and to make many changes of the present invention, modification and other application.
Claims (15)
1. polycrystalline metamemory encapsulation, described encapsulation comprises:
(a) a plurality of memory dies; With
(b) be used at least one outside connection of each brilliant unit of described a plurality of memory dies, be used for providing specially the single brilliant unit of voltage supply line road in described at least one outside connection to described a plurality of memory dies from described encapsulation.
2. encapsulation as claimed in claim 1, wherein said a plurality of memory dies comprise flash memory dies.
3. encapsulation as claimed in claim 1, wherein said a plurality of memory dies comprise NAND type flash memory dies.
4. encapsulation as claimed in claim 1, outside a connection in described at least one outside connection of wherein said a plurality of memory dies with the self-isolation design configurations.
5. encapsulation as claimed in claim 1, an outside voltage supply line road that connects the I/O circuit that is configured to provide a single brilliant unit that is exclusively used in described a plurality of memory die in wherein said at least one outside connection.
6. polycrystalline metamemory encapsulation, this encapsulation comprises:
(a) a plurality of memory dies are passive when the brilliant unit of the second memory in described a plurality of memory dies of the brilliant unit of the first memory in described a plurality of memory dies is active.
7. encapsulation as claimed in claim 6, wherein said a plurality of memory dies comprise flash memory dies.
8. encapsulation as claimed in claim 6, wherein said a plurality of memory dies comprise NAND type flash memory dies.
9. encapsulation as claimed in claim 6, the brilliant unit of wherein said first memory is underproof.
10. memory product line, described production line comprises:
(a) at least two memory products, described at least two memory products have:
(i) the available memory size that equates basically;
(ii) different interface specification for each described at least two memory product; And
(iii) at least two memory dies, each in wherein said at least two memory products has passive different subclass in described at least two memory dies.
11. as the encapsulation of claim 10, wherein said at least two memory dies comprise flash memory dies.
12. as the encapsulation of claim 10, wherein said at least two memory dies comprise NAND type flash memory dies.
13. a method of using the encapsulation of polycrystalline metamemory, this method may further comprise the steps:
(a) make the encapsulation of polycrystalline metamemory to comprise a plurality of memory dies;
(b) in the brilliant unit of the first memory of described a plurality of memory dies, detect fault; And
(c) second memory that activates in described a plurality of memory dies is brilliant first, makes the brilliant unit of described first memory passive simultaneously.
14. as the method for claim 13, wherein said manufacturing polycrystalline metamemory encapsulation comprises with the step that comprises a plurality of memory dies makes a plurality of flash memory dies.
15. as the method for claim 13, wherein said manufacturing polycrystalline metamemory encapsulation comprises with the step that comprises a plurality of memory dies makes a plurality of NAND type flash memory dies.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US75760206P | 2006-01-11 | 2006-01-11 | |
| US60/757,602 | 2006-01-11 | ||
| US11/395,226 | 2006-04-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101553919A true CN101553919A (en) | 2009-10-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200780002176 Pending CN101553919A (en) | 2006-01-11 | 2007-01-08 | Recyclying faulty multi-die packages |
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| Country | Link |
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| CN (1) | CN101553919A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105990325A (en) * | 2014-09-05 | 2016-10-05 | 爱思开海力士有限公司 | Stack package and system-in-package including the same |
-
2007
- 2007-01-08 CN CN 200780002176 patent/CN101553919A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105990325A (en) * | 2014-09-05 | 2016-10-05 | 爱思开海力士有限公司 | Stack package and system-in-package including the same |
| CN105990325B (en) * | 2014-09-05 | 2019-08-16 | 爱思开海力士有限公司 | Laminate packaging body and system grade encapsulation body including laminate packaging body |
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Open date: 20091007 |