CN101552552B - Dynamic Feedback Regulated Charge Pump Device - Google Patents
Dynamic Feedback Regulated Charge Pump Device Download PDFInfo
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- 230000001105 regulatory effect Effects 0.000 title description 3
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Abstract
一种动态反馈稳压电荷泵浦装置。该动态反馈稳压电荷泵浦装置通过电压调整器接收输入电压,电压调整器依据控制信号将输入电压调整输出为基本电压。电荷泵浦接收基本电压,并将基本电压倍压后作为输出电压。反馈单元根据输出电压提供电压调整器控制信号。藉此,动态反馈稳压电荷泵浦装置可降低输出电压涟波及提升电荷泵浦输出效率。
A dynamic feedback voltage-stabilized charge pump device. The dynamic feedback voltage-stabilized charge pump device receives an input voltage through a voltage regulator, and the voltage regulator adjusts the input voltage to a basic voltage according to a control signal. The charge pump receives the basic voltage and multiplies the basic voltage as an output voltage. The feedback unit provides a voltage regulator control signal according to the output voltage. Thus, the dynamic feedback voltage-stabilized charge pump device can reduce output voltage ripple and improve the output efficiency of the charge pump.
Description
技术领域 technical field
本发明是有关于一种电荷泵浦装置,且特别是有关于一种具动态反馈稳压能力的电荷泵浦装置。 The present invention relates to a charge pumping device, and in particular to a charge pumping device with dynamic feedback voltage regulation capability. the
背景技术 Background technique
在电子电路中,往往需要各种不同电平的电源电压以供电路使用,因此常配置电荷泵浦(charge pump)电路,以便利用现有的电源电压来产生各种不同电平的电源电压。电荷泵浦电路是以某一预设倍率将其输入电压电平调升(或调降),以产生不同电平的电压。因此,电荷泵浦电路的输出电压电平便与其输入电压息息相关。然而,为了电荷泵浦电路可以适用于各种环境(亦即在设计电荷泵浦电路时可能无法确定其输入电压),而依然可以产生相同预期的输出电压,一般是利用电压调整电路先将输出电压电平调整至额定电压,然后才由电荷泵浦产生额定输出电压。 In electronic circuits, various power supply voltages of different levels are often required for use in the circuit, so a charge pump circuit is often configured to use the existing power supply voltage to generate various power supply voltages of different levels. The charge pumping circuit increases (or decreases) its input voltage level by a predetermined ratio to generate voltages of different levels. Therefore, the output voltage level of the charge pump circuit is closely related to its input voltage. However, in order that the charge pumping circuit can be applied in various environments (that is, the input voltage may not be determined when designing the charge pumping circuit), and can still generate the same expected output voltage, generally the voltage adjustment circuit is used to first adjust the output The voltage level is adjusted to the rated voltage, and then the rated output voltage is generated by the charge pump. the
图1为已知的电荷泵浦电路图。电容C、开关102、开关103、开关104及开关105构成一个电荷泵浦。晶体管T1、运算放大器101、电阻R1、电阻R2构成一个具有负反馈的电压调整电路。此电压调整电路接接收系统电压VCC,并将系统电压VCC调整为输入电压Vin1。电荷泵浦在第一工作周期时,开关102及105会呈现短路,开关103及104会呈现开路,此时输入电压Vin1 会对电容C进行充电,使电容C具有相等于输入电压Vin1的电位。电荷泵浦在第二工作周期时,开关103及104会呈现短路,开关102及105会呈现开路,使得电容C其中一端从接地改为连接至输入电压Vin1(亦即从0V改变为Vin1),此时电容C的另一端电位会从Vin1被抬升至2Vin1。因此,输出电压Vout1会得到两倍于输入电压Vin1的电压。
Fig. 1 is a known charge pump circuit diagram. The capacitor C, the
已知电荷泵浦虽然可以提供两倍于输入电压Vin1的电压,但是当电荷泵浦输出端出现因负载变化而产生的电流变化时,电压调整电路无法实时检测及针对输出电流的变化而调整其输入电压Vin1,以致输出电压Vout1会随负载电流变化而产生较剧烈的涟波。如欲解决涟波的问题,一般是将电荷泵浦输入端 直接耦接系统电压,再于输出端耦接具有稳压电容的电压调整器。但此解决方式会造成电压调整器直接面对负载的问题,且所增加的稳压电容亦会增加成本的负担,连带的使电荷泵浦的原本功能无法完全发挥。 It is known that although the charge pump can provide a voltage twice the input voltage V in1 , when the output of the charge pump has a current change due to a load change, the voltage adjustment circuit cannot detect and adjust for the change in the output current in real time. The input voltage V in1 , so that the output voltage V out1 will produce severe ripples with the change of the load current. To solve the ripple problem, generally, the input terminal of the charge pump is directly coupled to the system voltage, and then the output terminal is coupled to a voltage regulator with a stabilizing capacitor. However, this solution will cause the problem that the voltage regulator directly faces the load, and the added voltage stabilizing capacitor will also increase the cost burden, and jointly prevent the original function of the charge pump from being fully utilized.
发明内容 Contents of the invention
本发明提供一种动态反馈稳压电荷泵浦装置,其利用反馈单元动态检测及反馈电荷泵浦的输出电压,在不增加额外元件及成本的情况下,降低输出电压涟波及提升电荷泵浦输出效率的功效。 The present invention provides a dynamic feedback stabilized charge pump device, which uses a feedback unit to dynamically detect and feed back the output voltage of the charge pump, and reduces the output voltage ripple and improves the output of the charge pump without adding additional components and costs. The efficacy of efficiency. the
本发明提供一种电荷泵浦装置,其包括电压调整器、电荷泵浦及反馈单元。电压调整器的输入端接收输入电压,并依据控制信号将输入电压调整输出为基本电压。电荷泵浦耦接电压调整器的输出端以接收基本电压,接着将基本电压倍压后作为输出电压。反馈单元的输入端耦接至电荷泵浦的输出端以接收输出电压,反馈单元的输出端耦接至电压调整器以提供控制信号,其中控制信号与输出电压相关。 The invention provides a charge pumping device, which includes a voltage regulator, a charge pump and a feedback unit. The input terminal of the voltage regulator receives the input voltage, and adjusts the input voltage to output a basic voltage according to the control signal. The charge pump is coupled to the output terminal of the voltage regulator to receive the basic voltage, and then doubles the basic voltage to obtain an output voltage. The input terminal of the feedback unit is coupled to the output terminal of the charge pump to receive the output voltage, and the output terminal of the feedback unit is coupled to the voltage regulator to provide a control signal, wherein the control signal is related to the output voltage. the
上述电压调整器包括运算放大器、晶体管及开关。运算放大器的第一端耦接至反馈单元的输出端以接收控制信号,运算放大器的第二端接收参考电压。晶体管的栅极耦接至运算放大器的输出端,其第一源漏极接收输入电压,其第二源漏极输出基本电压。开关的第一端接收该输入电压,开关的第二端耦接至该运算放大器的输出端。 The above-mentioned voltage regulator includes an operational amplifier, a transistor and a switch. The first terminal of the operational amplifier is coupled to the output terminal of the feedback unit to receive the control signal, and the second terminal of the operational amplifier receives the reference voltage. The gate of the transistor is coupled to the output terminal of the operational amplifier, the first source and drain of the transistor receive the input voltage, and the second source and drain of the transistor output the basic voltage. The first terminal of the switch receives the input voltage, and the second terminal of the switch is coupled to the output terminal of the operational amplifier. the
在本发明的一实施例中,上述反馈单元包括第一电阻及第二电阻,第一电阻的第一端作为反馈单元的输入端以接收输出电压,第一电阻的第二端作为反馈单元的输出端以提供控制信号至电压调整器。第二电阻的第一端耦接至第一电阻的第二端,第二电阻的第二端接地。 In an embodiment of the present invention, the feedback unit includes a first resistor and a second resistor, the first end of the first resistor serves as the input end of the feedback unit to receive the output voltage, and the second end of the first resistor serves as the input end of the feedback unit. Output terminal to provide a control signal to the voltage regulator. The first terminal of the second resistor is coupled to the second terminal of the first resistor, and the second terminal of the second resistor is grounded. the
本发明提供一种动态反馈稳压电荷泵浦装置,其结合电荷泵浦倍压的功效及电压调整器的稳压特性与反馈单元实时检测及反馈的能力,动态检测及反馈输出电压,以实时反应其负载造成的电流变化,且可在不增加额外元件及成本的条件下,提升电荷泵浦输出效率及降低输出电压的涟波。 The present invention provides a dynamic feedback voltage stabilizing charge pump device, which combines the effect of charge pumping voltage doubling and the voltage stabilizing characteristics of the voltage regulator with the ability of real-time detection and feedback of the feedback unit to dynamically detect and feedback the output voltage to real-time It responds to the current change caused by its load, and can improve the output efficiency of the charge pump and reduce the ripple of the output voltage without adding additional components and costs. the
为让本发明的上述特征和优点能更明显易懂,下文特举较佳实施例,并配合所附图式,作详细说明如下。 In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings. the
附图说明 Description of drawings
图1为已知的电荷泵浦电路图。 Fig. 1 is a known charge pump circuit diagram. the
图2为根据本发明一实施例的动态反馈稳压电荷泵浦装置示意图。 FIG. 2 is a schematic diagram of a charge pump device for dynamic feedback regulation according to an embodiment of the present invention. the
图3A为根据本发明一实施例的第一实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 3A is a circuit diagram of a dynamic feedback regulator charge pump device according to a first embodiment of an embodiment of the present invention. the
图3B为根据本发明一实施例,说明图3A的相位波形图。 FIG. 3B is a diagram illustrating the phase waveform of FIG. 3A according to an embodiment of the present invention. the
图4为根据本发明一实施例的第二实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 4 is a circuit diagram of a dynamic feedback regulator charge pump device according to a second embodiment of an embodiment of the present invention. the
图5为根据本发明一实施例的第三实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 5 is a circuit diagram of a dynamic feedback regulator charge pump device according to a third embodiment of an embodiment of the present invention. the
图6为根据本发明一实施例的第四实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 6 is a circuit diagram of a dynamic feedback regulator charge pump device according to a fourth embodiment of an embodiment of the present invention. the
图7为根据本发明一实施例的第五实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 7 is a circuit diagram of a dynamic feedback regulator charge pump device according to a fifth embodiment of an embodiment of the present invention. the
图8为根据本发明一实施例的第六实施方式的动态反馈稳压电荷泵浦装置电路图。 FIG. 8 is a circuit diagram of a dynamic feedback regulator charge pump device according to a sixth embodiment of an embodiment of the present invention. the
[主要元件标号说明] [Description of main component labels]
200、300、400、500、600、700、800:动态反馈稳压电荷泵浦装置 200, 300, 400, 500, 600, 700, 800: Dynamic feedback regulated charge pump device
201:电压调整器 201: Voltage regulator
202:电荷泵浦 202: Charge pumping
203:反馈单元 203: Feedback unit
101、OP1:运算放大器 101. OP1: Operational Amplifier
T1、Tr1:晶体管 T1, Tr1: Transistor
VCL、PH1、PH2:控制信号 V CL , PH1, PH2: control signals
Vin1:输入电压 V in1 : input voltage
VBASE:基本电压 V BASE : base voltage
VCC、VDD:系统电压 V CC , V DD : System voltage
VOUT1、VOUT2:输出电压 V OUT1 , V OUT2 : output voltage
VREF1、VREF2:参考电压 V REF1 , V REF2 : Reference voltage
102、103、104、105、SW1、SW2、SW3、SW4、SW5、SW6、SW7、SW8、SW9、SW10、SW11、SW12、SW13、SW14、SW15、SW16、SW17、SW18、SW19:开关 102, 103, 104, 105, SW1, SW2, SW3, SW4, SW5, SW6, SW7, SW8, SW9, SW10, SW11, SW12, SW13, SW14, SW15, SW16, SW17, SW18, SW19: switch
R1、R2、R3、R4:电阻 R1, R2, R3, R4: Resistors
C、C1、C2、C3、C4、C5、COUT2:电容 C, C1, C2, C3, C4, C5, C OUT2 : capacitance
具体实施方式 Detailed ways
因已知的电荷泵浦无法实时反应输出端的变化。当输出端出现因负载变化而产生的电流变化时,已知的电荷泵浦产生的输出电压会随电流变化而有较剧烈的涟波问题。有鉴于此,本发明下述实施例利用反馈单元实时检测及反馈的能力,以达成提升电荷泵浦输出效率及降低输出电压的涟波功效。 Because the known charge pump cannot respond to the change of the output terminal in real time. When a current change occurs at the output terminal due to a load change, the output voltage generated by the known charge pump will have a severe ripple problem with the current change. In view of this, the following embodiments of the present invention utilize the capability of real-time detection and feedback of the feedback unit to improve the output efficiency of the charge pump and reduce the ripple effect of the output voltage. the
图2为根据本发明一实施例的动态反馈稳压电荷泵浦装置200示意图。请参照图2,动态反馈稳压电荷泵浦装置200包括电压调整器(voltageregulator)201、电荷泵浦(charge pump)202及反馈单元(feedback unit)203。电压调整器201耦接电荷泵浦202及反馈单元203。电荷泵浦202耦接反馈单元203。电压调整器201的输入端接收输入电压(本实施例以系统电压VDD 为例),并依据控制信号VCL将系统电压VDD调整输出为基本电压VBASE。电荷泵浦202的输入端接收基本电压VBASE,接着将基本电压VBASE倍压后作为输出电压VOUT2。反馈单元203的输入端接收输出电压VOUT2,且反馈单元203依据输出电压VOUT2提供控制信号VCL给电压调整器201。藉此,本发明的本实施例可动态检测及反馈输出电压VOUT2,以达到快速反应其负载电流变化的目的,连带提升电荷泵浦输出效率及降低输出电压的涟波。
FIG. 2 is a schematic diagram of a dynamic feedback regulator charge pump device 200 according to an embodiment of the present invention. Referring to FIG. 2 , the dynamic feedback regulated charge pump device 200 includes a voltage regulator (voltage regulator) 201 , a charge pump (charge pump) 202 and a feedback unit (feedback unit) 203 . The
上述一实施例的各种实施方式会以下述的各实施例来说明。图3A为根据本发明一实施例的第一实施方式的动态反馈稳压电荷泵浦装置300电路图。电压调整器201包括运算放大器OP1及晶体管Tr1。运算放大器(operationamplifier)OP1的第一端(本实施例以非反相输入端为例)耦接反馈单元的输出端(亦即电阻R3的第二端),其第二端(本实施例以反相输入端为例)接收参考电压VREF2,其输出端耦接晶体管Tr1的栅极。晶体管Tr1的第一源漏极(本实施例以源极为例)接收系统电压VDD,其第二源漏极(本实施例以漏极为例)为电压调整器201的输出端并耦接开关SW2及SW3的第一端以输出基本电压VBASE。本实施方式中,P型金属氧化物半导体晶体管为晶体管Tr1实现的一种方式,非以限制本发明。
Various implementations of the above-mentioned one embodiment will be described with the following embodiments. FIG. 3A is a circuit diagram of a dynamic feedback regulator
电荷泵浦202包括第一电容C1、第二开关SW2、第三开关SW3、第四开关SW4、第五开关SW5及输出电容COUT2。开关SW2的第二端耦接电容C1的第一端。开关SW3的第二端耦接电容C1的第二端。开关SW4的第一端耦接电容C1的第一端,其第二端为电荷泵浦202的输出端以提供输出电压VOUT2。开关 SW5的第一端耦接电容C1的第二端,其第二端接收第二参考电压(本实施例以接地电压为例)。输出电容COUT2的第一端耦接开关SW4的第二端,其第二端耦接接地电压。本领域技术人员可以视需求而省略输出电容COUT2。
The
反馈单元203包括第一电阻R3及第二电阻R4。电阻R3的第一端耦接开关SW4的第二端。电阻R4的第一端耦接电阻R3的第二端,电阻R4的第二端接地。
The
图3B为根据本发明一实施例,说明图3A的相位波形图。请同时参照图3A及图3B,图3B中的PH1及PH2分别对照图3A中的控制信号PH1及PH2,波形中的高电位代表开关短路,波形中的低电位代表开关开路。当晶体管Tr1接收系统电压VDD时,会依据运算放大器OP1的控制而将系统电压VDD调整为基本电压VBASE后传送到开关SW2及SW3的第一端。当控制信号PH1为高电位时(此时控制信号PH2为低电位),开关SW2及SW5会呈现短路,开关SW3及SW4会呈现开路。因此,基本电压VBASE会对电容C1会进行充电,让电容C1储存的电位约略等于基本电压VBASE的电位。 FIG. 3B is a diagram illustrating the phase waveform of FIG. 3A according to an embodiment of the present invention. Please refer to FIG. 3A and FIG. 3B at the same time. PH1 and PH2 in FIG. 3B are respectively compared with the control signals PH1 and PH2 in FIG. 3A . When the transistor Tr1 receives the system voltage V DD , it adjusts the system voltage V DD to the base voltage V BASE according to the control of the operational amplifier OP1 and then transmits it to the first ends of the switches SW2 and SW3 . When the control signal PH1 is at a high potential (the control signal PH2 is at a low potential at this time), the switches SW2 and SW5 are short-circuited, and the switches SW3 and SW4 are open-circuited. Therefore, the basic voltage V BASE charges the capacitor C1 , so that the potential stored in the capacitor C1 is roughly equal to the potential of the basic voltage V BASE .
当控制信号PH2为高电位时(此时控制信号PH1为低电位),开关SW3及SW4会呈现短路,开关SW2及SW5会呈现开路,使得电容C1的第二端从接地改为连接至基本电压VBASE(亦即从0V改变为VBASE),此时电容C1的第一端电位会从约略基本电压VBASE电位被抬升至约略2VBASE。因此输出电压VOUT2约略为两倍的基本电压VBASE。输出电容COUT2让输出电压VOUT2更加的稳定。 When the control signal PH2 is at a high potential (the control signal PH1 is at a low potential at this time), the switches SW3 and SW4 will be short-circuited, and the switches SW2 and SW5 will be open-circuited, so that the second terminal of the capacitor C1 is connected to the basic voltage instead of the ground. V BASE (that is, changing from 0V to V BASE ), at this time, the potential of the first terminal of the capacitor C1 will be raised from approximately the basic voltage V BASE to approximately 2V BASE . Therefore, the output voltage V OUT2 is approximately twice the base voltage V BASE . The output capacitor C OUT2 makes the output voltage V OUT2 more stable.
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,电阻R3及R4会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端的变化而动态控制晶体管Tr1,使晶体管Tr1能快速因应电荷泵浦202输出端的变化而调整其基本电压VBASE。藉此,本实施例可以输出约略两倍于基本电压VBASE的输出电压VOUT2,并且达到动态反馈输出端的电流变化及进行稳压的功能,连带的减少输出电压VOUT2的涟波。
The resistors R3 and R4 are connected in series between the output terminal of the
图4为根据本发明一实施例的第二实施方式的动态反馈稳压电荷泵浦装置400电路图。比较图3A及图4,其相同功能给予相同的标号,可以发现其差异为动态反馈稳压电荷泵浦装置400中的开关SW1、开关SW2及电容C1。 开关SW1的第一端接收系统电压VDD,其第二端耦接运算放大器OP1的输出端。开关SW2的第一端接收系统电压VDD。电容C1的第二端则耦接晶体管Tr1的漏极。与图3A相较,本实施例省去可耐受大电流的开关SW3,而配置一个小面积的开关SW1。
FIG. 4 is a circuit diagram of a dynamic feedback regulator
同样参照图3B说明图4,控制信号PH2B为控制信号PH2的反相。当控制信号PH1为高电位时(此时控制信号PH2为低电位,而控制信号PH2B为高电位),开关SW1、SW2及SW5会呈现短路,开关SW4会呈现开路。开关SW1的短路使晶体管Tr1呈现不导通(截止)。在此期间,系统电压VDD会经由开关SW2对电容C1会进行充电,让电容C1储存约略等于系统电压VDD的电位。因系统电压VDD可以直接对电容C1充电的关系,其充电速度会更快。当控制信号PH2为高电位时(此时控制信号PH2B、PH1为低电位),开关SW4会呈现短路,而开关SW1、SW2及SW5会呈现开路。晶体管Tr1受运算放大器OP1的控制而输出基本电压VBASE给电容C1的第二端。由于电容C1的第二端从接地(亦即0V)改为基本电压VBASE,导致电容C1的第一端电位会从VDD被抬升至VDD+VBASE。上述VDD+VBASE会经由开关SW4而被输出作为输出电压VOUT2。 Referring also to FIG. 3B to illustrate FIG. 4 , the control signal PH2B is the inverse of the control signal PH2 . When the control signal PH1 is at a high potential (the control signal PH2 is at a low potential, and the control signal PH2B is at a high potential), the switches SW1 , SW2 and SW5 are short-circuited, and the switch SW4 is open-circuited. A short circuit of the switch SW1 renders the transistor Tr1 non-conductive (off). During this period, the system voltage V DD charges the capacitor C1 through the switch SW2 , so that the capacitor C1 stores a potential approximately equal to the system voltage V DD . Since the system voltage V DD can directly charge the capacitor C1, its charging speed will be faster. When the control signal PH2 is at a high potential (the control signals PH2B and PH1 are at a low potential at this time), the switch SW4 is short-circuited, and the switches SW1 , SW2 and SW5 are open-circuited. The transistor Tr1 is controlled by the operational amplifier OP1 to output the basic voltage V BASE to the second terminal of the capacitor C1. Since the second terminal of the capacitor C1 is changed from the ground (ie 0V) to the basic voltage V BASE , the potential of the first terminal of the capacitor C1 will be raised from V DD to V DD +V BASE . The aforementioned V DD +V BASE will be output as the output voltage V OUT2 via the switch SW4 .
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,反馈单元203会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端的变化而动态控制晶体管Tr1,使晶体管Tr1能快速反应电荷泵浦202输出端的变化而调整其基本电压VBASE,进而调整电荷泵浦202的输出电压VOUT2。藉此,本实施例可以达到动态反馈输出端的变化及更快速地传达其反应到输出端进而稳压的功能,连带的减少输出电压VOUT2的涟波及提升输出效率。
The resistors R3 and R4 are connected in series between the output terminal of the
图5为根据本发明一实施例的第三实施方式的动态反馈稳压电荷泵浦装置500电路图。电压调整器201及反馈单元203如上述图3A实施例所述,故不再赘述。电荷泵浦202包括第二电容C2、第三电容C3、第六开关SW6、第七开关SW7、第八开关SW8、第九开关SW9、第十开关SW10、第十一开关SW11、第十二开关SW12及输出电容COUT2。开关SW6的第一端耦接晶体管Tr1的漏极以接收基本电压VBASE,其第二端耦接电容C2的第一端。开关SW7的第一端耦接开关SW6的第一端,其第二端耦接电容C2的第二端。开关SW8的第一端耦 接耦接电容C2的第一端,其第二端耦接电容C3的第一端。开关SW9的第一端耦接电容C2的第二端,其第二端接收接地电压。开关SW10的第一端耦接开关SW6的第一端,其第二端耦接电容C3的第二端。开关SW11的第一端耦接电容C3的第一端,其第二端接收接地电压。开关SW12的第一端耦接电容C3的第二端,其第二端为电荷泵浦202的输出端以提供输出电压VOUT2。输出电容COUT2的第一端耦接开关SW12的第二端,其第二端耦接接地电压。本领域技术人员可以视需求而省略输出电容COUT2。
FIG. 5 is a circuit diagram of a dynamic feedback regulator
同样参照图3B说明图5。当晶体管Tr1接收系统电压VDD时,会依据运算放大器OP1的控制而将系统电压VDD调整为基本电压VBASE后传送到开关SW6的第一端。当控制信号PH1为高电位时(此时控制信号PH2为低电位),开关SW6、SW9、SW10及SW11会呈现短路,开关SW7、SW8及SW12会呈现开路。因此,基本电压VBASE会对电容C2及C3分别进行充电,让电容C2及C3储存的电位约略等于基本电压VBASE的电位。当控制信号PH2为高电位时(此时控制信号PH1为低电位),开关SW7、SW8及SW12会呈现短路,开关SW6、SW9、SW10及SW11会呈现开路,使得电容C2的第二端从接地改为连接至基本电压VBASE(亦即从0V改变为VBASE),电容C2的第一端电位会从约略基本电压VBASE电位被抬升至约略2VBASE。同时,电容C3第一端从接地改为连接至电容C2的第一端(亦即从0V改变为2VBASE),电容C3的第二端电位会从约略基本电压VBASE电位被抬升至约略3VBASE。因此输出电压VOUT2约略为三倍的基本电压VBASE。输出电容COUT2 让输出电压VOUT2更加的稳定。 FIG. 5 is also described with reference to FIG. 3B . When the transistor Tr1 receives the system voltage V DD , it adjusts the system voltage V DD to the base voltage V BASE according to the control of the operational amplifier OP1 and then transmits it to the first end of the switch SW6 . When the control signal PH1 is at a high potential (the control signal PH2 is at a low potential at this time), the switches SW6 , SW9 , SW10 and SW11 are short-circuited, and the switches SW7 , SW8 and SW12 are open-circuited. Therefore, the base voltage V BASE charges the capacitors C2 and C3 respectively, so that the potentials stored in the capacitors C2 and C3 are approximately equal to the potential of the base voltage V BASE . When the control signal PH2 is at a high potential (the control signal PH1 is at a low potential at this time), the switches SW7, SW8, and SW12 will be short-circuited, and the switches SW6, SW9, SW10, and SW11 will be open-circuited, so that the second end of the capacitor C2 is grounded. If it is changed to be connected to the base voltage V BASE (ie changed from 0V to V BASE ), the potential of the first terminal of the capacitor C2 will be raised from about the base voltage V BASE to about 2V BASE . At the same time, the first terminal of the capacitor C3 is changed from being grounded to the first terminal of the capacitor C2 (that is, changed from 0V to 2V BASE ), and the potential of the second terminal of the capacitor C3 is raised from approximately the basic voltage V BASE to approximately 3V BASE . Therefore the output voltage V OUT2 is approximately three times the base voltage V BASE . The output capacitor C OUT2 makes the output voltage V OUT2 more stable.
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,电阻R3及R4会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端的变化而动态控制晶体管Tr1,使晶体管Tr1能快速因应电荷泵浦202输出端的变化而调整其基本电压VBASE。藉此,本实施例可以输出约略三倍于基本电压VBASE的输出电压VOUT2,并且达到动态反馈输出端的电流变化及进行稳压的功能,连带的减少输出电压VOUT2的涟波。
The resistors R3 and R4 are connected in series between the output terminal of the
图6为根据本发明一实施例的第四实施方式的动态反馈稳压电荷泵浦装置600电路图。比较图5及图6,其相同功能给予相同的标号,可以发现其 差异为动态反馈稳压电荷泵浦装置600中的开关SW1、SW6及电容C2。开关SW1的第一端接收系统电压VDD,其第二端耦接运算放大器OP1的输出端。开关SW6的第一端接收系统电压VDD。电容C2的第二端则直接耦接晶体管Tr1的漏极。与图5相较,本实施例省去可耐受大电流的开关SW7,而配置一个小面积的开关SW1。
FIG. 6 is a circuit diagram of a dynamic feedback regulator
同样参照图3B说明图6,控制信号PH2B为控制信号PH2的反相。当控制信号PH1为高电位时(此时控制信号PH2为低电位,而控制信号PH2B为高电位),开关SW1、SW6、SW9、SW10及SW11会呈现短路,开关SW8及SW12会呈现开路。开关SW1的短路使晶体管Tr1会呈现不导通(截止)。在此期间,系统电压VDD会经由开关SW6、SW10分别对电容C2及C3会进行充电,让电容C2及C3储存约略等于系统电压VDD的电位。因系统电压VDD为可以直接对电容C2及C3充电的关系,其充电速度会更快。当控制信号PH2为高电位时(此时控制信号PH2B、PH1为低电位),开关SW8及SW12会呈现短路,开关SW1、SW6、SW9、SW10及SW11会呈现开路。晶体管Tr1受运算放大器OP1的控制而输出基本电压VBASE给电容C2的第二端。由电容C2的第二端从接地(亦即0V)改为基本电压VBASE,导致电容C2的第一端电位会从VDD被抬升至VDD+VBASE。同时,C3的第一端从接地(亦即0V)改为电容C2的第一端,导致电容C3的第二端电位会从VDD被抬升至2VDD+VBASE。上述2VDD+VBASE会经由开关SW12被输出作为输出电压VOUT2。 Referring also to FIG. 3B to illustrate FIG. 6 , the control signal PH2B is the inverse of the control signal PH2 . When the control signal PH1 is at a high potential (at this time, the control signal PH2 is at a low potential and the control signal PH2B is at a high potential), the switches SW1, SW6, SW9, SW10, and SW11 are short-circuited, and the switches SW8 and SW12 are open-circuited. The short circuit of the switch SW1 makes the transistor Tr1 non-conductive (off). During this period, the system voltage V DD charges the capacitors C2 and C3 respectively via the switches SW6 and SW10 , so that the capacitors C2 and C3 store a potential approximately equal to the system voltage V DD . Since the system voltage V DD can directly charge the capacitors C2 and C3 , the charging speed will be faster. When the control signal PH2 is at a high potential (the control signals PH2B and PH1 are at a low potential), the switches SW8 and SW12 are short-circuited, and the switches SW1 , SW6 , SW9 , SW10 and SW11 are open-circuited. The transistor Tr1 is controlled by the operational amplifier OP1 to output the basic voltage V BASE to the second terminal of the capacitor C2. Since the second terminal of the capacitor C2 is changed from the ground (ie 0V) to the basic voltage V BASE , the potential of the first terminal of the capacitor C2 is raised from V DD to V DD +V BASE . At the same time, the first terminal of C3 is changed from ground (ie 0V) to the first terminal of capacitor C2, so that the potential of the second terminal of capacitor C3 is raised from V DD to 2V DD +V BASE . The above 2V DD +V BASE will be output as the output voltage V OUT2 via the switch SW12 .
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,反馈单元203会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端的变化而动态控制晶体管Tr1,使晶体管Tr1能快速反应电荷泵浦202输出端的变化而调整其基本电压VBASE,进而调整电荷泵浦202的输出电压VOUT2。藉此,本实施例可以达到动态反馈输出端的变化及更快速的传达其反应到输出端进而稳压的功能,连带的减少输出电压VOUT2的涟波及提升输出效率。
The resistors R3 and R4 are connected in series between the output terminal of the
图7为根据本发明一实施例的第五实施方式的动态反馈稳压电荷泵浦装置700电路图。电压调整器201及反馈单元203如上述图3A实施例所述,故不再赘述。电荷泵浦202包括第四电容C4、第五电容C5、第十三开关SW13、 第十四开关SW14、第十五开关SW15、第十六开关SW16、第十七开关SW17、第十八开关SW18、第十九开关SW19及输出电容COUT2。开关SW13的第一端耦接晶体管Tr1的漏极以接收基本电压VBASE,其第二端耦接电容C4的第一端。开关SW14的第一端耦接开关SW13的第一端,其第二端耦接电容C4的第二端。开关SW15的第一端耦接电容C4的第二端,其第二端接收接地电压。开关SW16的第一端耦接耦接电容C4的第一端,其第二端耦接电容C5的第一端。开关SW17的第一端耦接开关SW13的第一端,其第二端耦接电容C5的第二端。开关SW18的第一端耦接电容C5的第二端,其第二端接收接地电压。开关SW19的第一端耦接电容C5的第一端,其第二端为电荷泵浦202的输出端以提供输出电压VOUT2。输出电容COUT2的第一端耦接开关SW19的第二端,其第二端耦接接地电压。本领域技术人员可以视需求而省略输出电容COUT2。
FIG. 7 is a circuit diagram of a dynamic feedback regulator
同样参照图3B说明图7。当晶体管Tr1接收系统电压VDD时,会依据运算放大器OP1的控制而将系统电压VDD调整为基本电压VBASE后传送到开关SW13的第一端。当控制信号PH1为高电位时(此时控制信号PH2为低电位),开关SW13、SW15、SW17及SW19会呈现短路,开关SW14、SW16及SW18会呈现开路。在此期间,基本电压VBASE会对电容C4进行充电,让电容C4储存的电位约略等于基本电压VBASE的电位。同时,电容C5的第二端从接地改为连接至基本电压VBASE(亦即从0V改变为VBASE),电容C5的第一端电位会从2VBASE(此电位于控制信号PH2为高电位时获得)被抬升至3VBASE。因此输出电压VOUT2约略为三倍的基本电压VBASE。当控制信号PH2为高电位时,开关SW14、SW16及SW18会呈现短路,开关SW13、SW15、SW17及SW19会呈现开路。此时,电容C4的第二端从接地改为连接至基本电压VBASE(亦即从0V改变为VBASE),电容C4的第一端电位会从基本电压VBASE电位被抬升至2VBASE。同时,电容C5的第一端会连接电容C4的第一端,其第二端会接地,使得电容C4的第一端电位2VBASE对电容C5充电,让电容C5储存的电位约略等于2VBASE的电位。输出电容COUT2让输出电压VOUT2更加的稳定。 FIG. 7 is also described with reference to FIG. 3B . When the transistor Tr1 receives the system voltage V DD , it adjusts the system voltage V DD to the base voltage V BASE according to the control of the operational amplifier OP1 and then transmits it to the first terminal of the switch SW13 . When the control signal PH1 is at a high potential (the control signal PH2 is at a low potential at this time), the switches SW13 , SW15 , SW17 and SW19 are short-circuited, and the switches SW14 , SW16 and SW18 are open-circuited. During this period, the basic voltage V BASE will charge the capacitor C4, so that the potential stored in the capacitor C4 is approximately equal to the potential of the basic voltage V BASE . At the same time, the second terminal of the capacitor C5 is changed from grounding to the basic voltage V BASE (that is, changed from 0V to V BASE ), and the potential of the first terminal of the capacitor C5 is changed from 2V BASE (this voltage is when the control signal PH2 is at a high potential obtained when) is raised to 3V BASE . Therefore the output voltage V OUT2 is approximately three times the base voltage V BASE . When the control signal PH2 is at a high potential, the switches SW14 , SW16 and SW18 are short-circuited, and the switches SW13 , SW15 , SW17 and SW19 are open-circuited. At this time, the second terminal of the capacitor C4 is changed from being grounded to the basic voltage V BASE (ie, changed from 0V to V BASE ), and the potential of the first terminal of the capacitor C4 is raised from the basic voltage V BASE to 2V BASE . At the same time, the first end of capacitor C5 is connected to the first end of capacitor C4, and its second end is grounded, so that the potential of the first end of capacitor C4 is 2V BASE to charge capacitor C5, so that the potential stored in capacitor C5 is approximately equal to the potential of 2V BASE potential. The output capacitor C OUT2 makes the output voltage V OUT2 more stable.
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,电阻R3及R4会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端 的变化而动态控制晶体管Tr1,使晶体管Tr1能快速因应电荷泵浦202输出端的变化而调整其基本电压VBASE。藉此,本实施例可以输出约略三倍于基本电压VBASE的输出电压VOUT2,并且达到动态反馈输出端的电流变化及进行稳压的功能,连带的减少输出电压VOUT2的涟波。
The resistors R3 and R4 are connected in series between the output terminal of the
图8为根据本发明一实施例的第六实施方式的动态反馈稳压电荷泵浦装置800电路图。比较图7及图8,其相同功能给予相同的标号,可以发现其差异为动态反馈稳压电荷泵浦装置800中的开关SW1、SW13、SW14及电容C4。开关SW1的第一端接收系统电压VDD,其第二端耦接运算放大器的输出端。开关SW13的第一端接收系统电压VDD。开关SW14的第一端耦接开关SW13的第一端。电容C5的第二端则直接耦接晶体管Tr1的漏极。与图5相较,本实施例省去可耐受大电流的开关SW17,而配置一个小面积的开关SW1。
FIG. 8 is a circuit diagram of a dynamic feedback regulator
同样参照图3B说明图8,控制信号PH1B为控制信号PH1的反相。当控制信号PH1为高电位时(此时控制信号PH2、PH1B为低电位),开关SW13、SW15及SW19会呈现短路,开关SW1、SW14、SW16及SW18会呈现开路。晶体管Tr1受运算放大器OP1的控制而输出基本电压VBASE给电容C5的第二端。在此期间,系统电压VDD会经由开关SW13对电容C4进行充电,让电容C4储存约略等于系统电压VDD的电位。电容C5的第二端从接地改为连接至基本电压VBASE(亦即从0V改变为VBASE),电容C5的第一端电位会从2VDD(此电位于控制信号PH2为高电位时获得)被抬升至2VDD+VBASE。上述2VDD+VBASE会经由开关SW12被输出作为输出电压VOUT2。当控制信号PH2为高电位时(此时控制信号PH1为低电位、PH1B为高电位),开关SW1、SW14、SW16及SW18会呈现短路,SW13、SW15及SW19会呈现开路。开关SW1的短路使晶体管Tr1会呈现不导通(截止)。此时电容C4的第二端从接地改为连接至系统电压VDD(亦即从0V改变为VDD),电容C4的第一端电位会从系统电压VDD电位被抬升至2VDD。同时,电容C5的第一端会连接电容C4的第一端,其第二端会接地,使得电容C4的第一端电位2VDD 对电容C5充电,让电容C5储存的电位约略等于2VDD。因系统电压VDD为可以直接对电容C4充电的关系,其充电速度会更快。输出电容COUT2让输出电压VOUT2 更加的稳定。 Referring also to FIG. 3B to illustrate FIG. 8 , the control signal PH1B is the inversion of the control signal PH1 . When the control signal PH1 is at a high potential (at this time, the control signals PH2 and PH1B are at a low potential), the switches SW13 , SW15 and SW19 are short-circuited, and the switches SW1 , SW14 , SW16 and SW18 are open-circuited. The transistor Tr1 is controlled by the operational amplifier OP1 to output the basic voltage V BASE to the second terminal of the capacitor C5. During this period, the system voltage V DD charges the capacitor C4 through the switch SW13 , so that the capacitor C4 stores a potential approximately equal to the system voltage V DD . The second terminal of the capacitor C5 is changed from ground to the basic voltage V BASE (that is, changed from 0V to V BASE ), and the potential of the first terminal of the capacitor C5 is obtained from 2V DD (this voltage is obtained when the control signal PH2 is at a high potential. ) is raised to 2V DD +V BASE . The above 2V DD +V BASE will be output as the output voltage V OUT2 via the switch SW12 . When the control signal PH2 is at a high potential (the control signal PH1 is at a low potential and PH1B is at a high potential), the switches SW1 , SW14 , SW16 and SW18 are short-circuited, and SW13 , SW15 and SW19 are open-circuited. The short circuit of the switch SW1 makes the transistor Tr1 non-conductive (off). At this time, the second terminal of the capacitor C4 is changed from being grounded to the system voltage V DD (that is, changed from 0V to V DD ), and the potential of the first terminal of the capacitor C4 is raised from the system voltage V DD to 2V DD . At the same time, the first terminal of the capacitor C5 is connected to the first terminal of the capacitor C4, and the second terminal thereof is grounded, so that the potential of the first terminal of the capacitor C4 is 2V DD to charge the capacitor C5, so that the stored potential of the capacitor C5 is approximately equal to 2V DD . Since the system voltage V DD can directly charge the capacitor C4, its charging speed will be faster. The output capacitor C OUT2 makes the output voltage V OUT2 more stable.
电阻R3及R4串联于电荷泵浦202的输出端与接地之间,以将输出电压VOUT2分压作为控制信号VCL。控制信号VCL将会被传送给运算放大器OP1的第一端。当电荷泵浦202输出端的电流或电压因负载(未绘示)而产生变化时,反 馈单元203会通过控制信号VCL反映其变化。由于控制信号VCL是随着电荷泵浦202输出端而变化的,因此运算放大器OP1可以响应电荷泵浦202输出端的变化而动态控制晶体管Tr1,使晶体管Tr1能快速反应电荷泵浦202输出端的变化而调整其基本电压VBASE,进而调整电荷泵浦202的输出电压VOUT2。藉此,本实施例可以达到动态反馈输出端的变化及更快速地传达其反应到输出端进而稳压的功能,连带的减少输出电压VOUT2的涟波及提升输出效率。
The resistors R3 and R4 are connected in series between the output terminal of the
综上所述,在本发明的动态反馈稳压电荷泵浦装置,通过直接反馈其输出端的负载电流变化,可以快速地针对其变化作反应,使输出端的电压不为因电流的变化而波动,藉此可降低输出电压的涟波,且利用系统电压对电容直接充电,可提升其输出的效率。结合以上论点,本发明的动态反馈稳压电荷泵浦装置可以实时地检测及反馈其输出端的电流变化,且可快速地反馈其电流变化及在输出端作出反应。 To sum up, in the dynamic feedback voltage stabilizing charge pump device of the present invention, by directly feeding back the change of the load current at the output end, it can quickly respond to the change, so that the voltage at the output end does not fluctuate due to the change of the current. In this way, the ripple of the output voltage can be reduced, and the capacitor can be directly charged by the system voltage to improve the output efficiency. Combining the above arguments, the dynamic feedback stabilized charge pump device of the present invention can detect and feed back the current change at its output end in real time, and can quickly feed back the current change and react at the output end. the
虽然本发明已以较佳实施例揭露如上,然其并非用以限定本发明,任何本领域技术人员,在不脱离本发明的精神和范围内,当可作些许的更动与润饰,因此本发明的保护范围当视所附的权利要求范围所界定者为准。 Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The scope of protection of the invention should be defined by the appended claims. the
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