CN101515590A - Film transistor array substrate - Google Patents
Film transistor array substrate Download PDFInfo
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- CN101515590A CN101515590A CNA2009101326445A CN200910132644A CN101515590A CN 101515590 A CN101515590 A CN 101515590A CN A2009101326445 A CNA2009101326445 A CN A2009101326445A CN 200910132644 A CN200910132644 A CN 200910132644A CN 101515590 A CN101515590 A CN 101515590A
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Abstract
一种薄膜晶体管数组基板，其利用堆栈结构垫高薄膜晶体管的汲极的延伸电极，因此通孔不需要太深即可暴露出汲极的延伸电极。
A thin film transistor array substrate uses a stack structure to raise the drain extension electrode of the thin film transistor, so the through hole does not need to be too deep to expose the drain extension electrode.
Description
Technical field
The invention relates to a kind of display, and particularly relevant for a kind of LCD.
Background technology
For LCD, the size of pixel aperture ratio can directly have influence on the utilance of backlight, also can influence the display brightness of display, and influence one of principal element of pixel aperture ratio size, be exactly the area of the through hole (contact hole) on the plurality of groups of substrates of thin-film transistor.Generally speaking, the area of through hole is more little, and the area of pixel region will be big more, and pixel aperture ratio also can be big more.
Yet, be subject to present etching technique, if the area of through hole is too small, through hole often can't run through insulating barrier smoothly.Particularly put in order in substrate (COA for colored filter; Color filter on array) structure or high aperture (UHA; Ultra-High Aperture) structure, because etching technique is difficult in the through hole that making high-aspect-ratio (aspect-ratio) is gone up in the look resistance at present, therefore the area of through hole must reach greatly in design, just can guarantee certain yields.But this design will certainly have influence on pixel aperture ratio again, so the designer tends to lock in this problem of facing a difficult choice, and can't break through.
Summary of the invention
A technology aspect of the present invention is a plurality of groups of substrates of thin-film transistor, and it utilizes the extension electrode of stack architecture bed hedgehopping drain of film transistor, so through hole do not need can expose too deeply the extension electrode of drain, allows the pixel electrode contact.
According to an embodiment of the present invention, a kind of plurality of groups of substrates of thin-film transistor comprises base material, first patterned conductive layer, first insulating barrier, semiconductor layer, second patterned conductive layer, second insulating barrier, through hole and pixel electrode.First patterned conductive layer is positioned on the base material, and this first patterned conductive layer comprises scan line, gate and floating electrode, and wherein gate electrically connects scan line.First insulating barrier is positioned on first patterned conductive layer.Semiconductor layer is positioned on first insulating barrier, and this semiconductor layer comprises channel region.Second patterned conductive layer is positioned on first insulating barrier, and this second patterned conductive layer comprises the staggered data wire of source electrode, drain and scan line and the extension electrode of drain, above-mentioned gate, source electrode, drain and channel region constitute thin-film transistor, and wherein source electrode electrically connects the extension electrode part and the floating electrode overlapping of data wire and drain.Second insulating barrier is positioned on second patterned conductive layer.Through hole runs through second insulating barrier, and exposes the extension electrode of part drain.Pixel electrode electrically connects the extension electrode of drain by through hole.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this semiconductor layer more comprises one first semiconductor region, between the extension electrode and this first insulating barrier of this drain.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this first semiconductor region and this channel region are connected with each other.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the setting that is separated from each other of this first semiconductor region and this channel region.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the edge of this floating electrode of justified margin of the extension electrode of this drain.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the extension electrode of this drain its away from the projected position at the edge of drain direction than this floating electrode its 0 μ m to 10 μ m that in edge, contracts away from the gate direction.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the extension electrode of this drain its it protrudes 0 μ m to 10 μ m at the edge away from the gate direction than this floating electrode at the projected position away from the edge of drain direction.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this substrate surface to the height of the upper surface of the extension electrode of this drain that this through hole exposes is
Extremely
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this substrate surface to the height of the lower surface that contacts with this first semiconductor region of the extension electrode of this drain is
Extremely
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the shape of this floating electrode is square, polygon, ellipse or circular.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the material of this second insulating barrier is organic material or inorganic material.
Above-mentioned plurality of groups of substrates of thin-film transistor wherein, more comprises one the 3rd insulating barrier above second insulating barrier.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the material of the 3rd insulating barrier is organic material or inorganic material.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this second insulating barrier is a chromatic filter layer.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the 3rd insulating barrier is a chromatic filter layer.
According to another embodiment of the present invention, a kind of plurality of groups of substrates of thin-film transistor comprises base material, first patterned conductive layer, first insulating barrier, semiconductor layer, second patterned conductive layer, second insulating barrier, through hole and pixel electrode.First patterned conductive layer is positioned on the base material, and this first patterned conductive layer comprises scan line and gate, and wherein gate electrically connects scan line.First insulating barrier is positioned on first patterned conductive layer.Semiconductor layer is positioned on first insulating barrier, and this semiconductor layer comprises the channel region and first semiconductor region.Second patterned conductive layer is positioned on first insulating barrier, and this second patterned conductive layer comprises the staggered data wire of source electrode, drain and scan line and the extension electrode of drain.Above-mentioned gate, source electrode, drain and channel region constitute thin-film transistor, and wherein source electrode electrically connects the extension electrode part and the overlapping of first semiconductor region of data wire and drain.Second insulating barrier is positioned on second patterned conductive layer.Through hole runs through second insulating barrier, and exposes the extension electrode of part drain.Pixel electrode by through hole, electrically connects the extension electrode of drain.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this first semiconductor region and this channel region are connected with each other.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the setting that is separated from each other of this first semiconductor region and this channel region.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this substrate surface to the height of the upper surface of the extension electrode of this drain that this through hole exposes is
Extremely
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this substrate surface to the height of the lower surface that contacts with this first semiconductor region of the extension electrode of this drain is
Extremely
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the material of this second insulating barrier is organic material or inorganic material.
Above-mentioned plurality of groups of substrates of thin-film transistor wherein, more comprises one the 3rd insulating barrier above second insulating barrier.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the material of the 3rd insulating barrier is organic material or inorganic material.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, this second insulating barrier is a chromatic filter layer.
Above-mentioned plurality of groups of substrates of thin-film transistor, wherein, the 3rd insulating barrier is a chromatic filter layer.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is the top view according to the plurality of groups of substrates of thin-film transistor of an embodiment of the present invention;
Fig. 2 is the profile along the line segment 2 of Fig. 1;
Fig. 3 is the profile according to the plurality of groups of substrates of thin-film transistor of another execution mode of the present invention, and its profile position is identical with Fig. 2;
Fig. 4 is that its profile position is identical with Fig. 3 according to the present invention's profile of the plurality of groups of substrates of thin-film transistor of an execution mode again;
Fig. 5 is the profile according to the plurality of groups of substrates of thin-film transistor of the another execution mode of the present invention, and its profile position is identical with Fig. 2;
Fig. 6 is that its profile position is identical with Fig. 2 according to the present invention's profile of the plurality of groups of substrates of thin-film transistor of an execution mode again;
Fig. 7 is the top view according to the plurality of groups of substrates of thin-film transistor of another execution mode of the present invention;
Fig. 8 is according to the present invention's top view of the plurality of groups of substrates of thin-film transistor of an execution mode again;
Fig. 9 is the top view according to the plurality of groups of substrates of thin-film transistor of the another execution mode of the present invention.
Wherein, Reference numeral
110 base materials
120 first patterned conductive layers
122 scan lines
124 gates
126 put electrode
130 first insulating barriers
140 semiconductor layers
142 channel regions
144 first semiconductor regions
150 second patterned conductive layers
152 source electrodes
154 drains
156 data wires
158 extension electrodes
160 second insulating barriers
170 through holes
180 pixel electrodes
200 thin-film transistors
205 organic layers
210 common electrode lines
The HT height
The HP height
The P distance
The R distance
Embodiment
Fig. 1 is the top view according to the plurality of groups of substrates of thin-film transistor of an embodiment of the present invention.Fig. 2 is the profile along the line segment 2 of Fig. 1.As shown in the figure, a kind of plurality of groups of substrates of thin-film transistor comprises base material 110, first patterned conductive layer 120, first insulating barrier 130, semiconductor layer 140, second patterned conductive layer 150, second insulating barrier 160, through hole 170 and pixel electrode 180.
First patterned conductive layer 120 is positioned on the base material 110, and this first patterned conductive layer 120 comprises scan line 122 (illustrating as Fig. 1), gate 124 and floating electrode 126, and wherein gate 124 electrically connects scan lines 122 (illustrating as Fig. 1).The material of above-mentioned base material 110 can be glass or plastics, and the material of first patterned conductive layer 120 then can be metal, for example: the composition of aluminium, copper, silver, gold or above-mentioned metal or alloy.
First insulating barrier 130 is positioned on first patterned conductive layer 120.More particularly, this first insulating barrier 130 can cover gate 124 at least, with the gate dielectric layer as thin-film transistor 200.The material of the first above-mentioned insulating barrier 130 can be various dielectric materials, for example: silicon dioxide, silicon nitride or silicon oxynitride.
Second patterned conductive layer 150 is positioned on first insulating barrier 130, and this second patterned conductive layer 150 comprises the staggered data wire 156 (illustrating as Fig. 1) of source electrode 152, drain 154 and scan line 122 and the extension electrode 158 of drain 154.Above-mentioned gate 124, source electrode 152, drain 154 and channel region 142 constitute thin-film transistor 200.Wherein, source electrode 152 electrically connects data wire 156 (illustrating as Fig. 1), the extension electrode 158 of drain 154 is part and floating electrode 126 overlappings then, specifically, extension electrode 158 to the small part of drain 154 is stacked over floating electrode 126 tops, that is to say, the extension electrode 158 of drain 154 is across first insulating barrier 130, partly extension electrode 158 and floating electrode 126 overlap, make by on look in the sight, the extension electrode 158 of drain 154 to small part covers floating electrode 126.On material, the material of second patterned conductive layer 150 also can be metal, for example: the composition of aluminium, copper, silver, gold or above-mentioned metal or alloy.
Second insulating barrier 160 is positioned on second patterned conductive layer 150, and the material of second insulating barrier 160 can be organic material or inorganic.In addition, when having colored filter, puts in order plurality of groups of substrates of thin-film transistor in substrate (COA; Color filter on array) structure or high aperture (UHA; Ultra-High Aperture) during structure, still optionally have the 3rd insulating barrier (figure does not show) on the second above-mentioned insulating barrier 160, the material of this 3rd insulating barrier can be an organic layer 205, for example: look resistance, chromatic filter layer, or inorganic material; But second insulating barrier 160 and the 3rd insulating barrier planarization plurality of groups of substrates of thin-film transistor in other embodiments, and can provide needed filtering functions, and second insulating layer material and the 3rd insulating layer material can be identical, for example: chromatic filter layer.
In order electrically to contact the extension electrode 158 of drain 154, the producer generally can make through hole 170 on second insulating barrier 160 and organic layer 205, this through hole 170 can run through second insulating barrier 160 and organic layer 205, and expose the extension electrode 158 of part drain 154, so that pixel electrode 180 by through hole 170, electrically connects the extension electrode 158 of drain 154.
In the present embodiment, because extension electrode 158 belows of drain 154 have floating electrode 126, the therefore effective extension electrode 158 of bed hedgehopping drain 154.That is to say that the producer does not need to make the extension electrode 158 that too dark through hole 170 can expose drain 154.Thus, even if at present etching technique can't be made the through hole 170 of high-aspect-ratio in the look resistance, but because the required degree of depth that runs through is not dark, so through hole 170 still can have less area, makes pixel aperture ratio thereby lifting.
Specifically, it is the electrode that does not electrically connect with any assembly for a floating electrode 126, and because floating electrode 126 does not electrically connect (comprise directly with indirectly) with any assembly, so the current potential of floating electrode 126 can equal or approach earthing potential usually.Also the current potential owing to floating electrode 126 can equal or approach earthing potential, so will not have significant capacity effect between the extension electrode 158 of floating electrode 126 and drain 154, influences the operation of plurality of groups of substrates of thin-film transistor.
In addition, above-mentioned semiconductor layer 140 more can comprise first semiconductor region 144, and this first semiconductor region 144 can be between the extension electrode 158 and first insulating barrier 130 of drain 154.That is, the extension electrode 158 of drain 154 can part and the overlappings of first semiconductor region 144, that is to say, extension electrode 158 to the small part of drain 154 is stacked over first semiconductor region, 144 tops, specifically, the extension electrode 158 of drain 154 is across first insulating barrier 130 and first semiconductor region 144, partly extension electrode 158 and floating electrode 126 overlap, make by on look in the sight, extension electrode 158 to the small part of drain 154 covers first semiconductor region 144 and floating electrode 126, with the extension electrode 158 of further bed hedgehopping drain 154.
Particularly, in the present embodiment, base material 110 surfaces can be to the height H T of the upper surface of the extension electrode 158 of through hole 170 drain that exposes 154
Extremely
Base material 110 surfaces to the height H P of the lower surface that contacts with first semiconductor region 144 of the extension electrode 158 of drain 154 then are
Extremely
Should be appreciated that above-described size is an illustration only all, is not in order to restriction the present invention.The technical field of the invention has knows the knowledgeable usually, should look actual needs, and elasticity is adjusted the height of the extension electrode 158 of drain 154.
Fig. 3 is the profile according to the plurality of groups of substrates of thin-film transistor of another execution mode of the present invention, and its profile position is identical with Fig. 2.The difference of a present embodiment and a last execution mode maximum is: the setting that is separated from each other of the channel region 142 of a last execution mode and first semiconductor region 144, the channel region 142 of present embodiment and first semiconductor region 144 then are connected with each other.The technical field of the invention has knows the knowledgeable usually, should look actual needs, the execution mode of the elasticity selective channel district 142 and first semiconductor region 144.
And in the execution mode that Fig. 3 illustrates, the edge of the justified margin floating electrode 126 of the extension electrode 158 of drain 154.But this does not limit the present invention, and the technical field of the invention has knows the knowledgeable usually, should be able to be according to actual needs, and elasticity is selected the extension electrode 158 of drain 154 and the relative position between the floating electrode 126.
For instance, in the present invention again in the execution mode, the extension electrode of drain 154 158 its at projected position away from the edge of drain 154 directions, can it protrudes at the edge away from gate 124 directions than floating electrode 126, and the distance R of its protrusion is about 0 μ m to 10 μ m, indicates as Fig. 4.Perhaps, in the another execution mode of the present invention, the extension electrode 158 of drain 154 its away from the projected position at the edge of drain 154 directions can it contracts in the edge away from gate 124 directions than floating electrode 126, the distance P that contracts in it is about 0 μ m to 10 μ m, indicates as Fig. 5.
Except the extension electrode 158 with floating electrode 126 bed hedgehopping drains 154, the producer also can be according to actual needs, selects to omit floating electrode 126, only with the extension electrode 158 of first semiconductor region, 144 bed hedgehopping drains 154.To be example below, specify above technology contents with Fig. 6.
Fig. 6 is that its profile position is identical with Fig. 2 according to the present invention's profile of the plurality of groups of substrates of thin-film transistor of an execution mode again.Present embodiment is with the difference of previous execution mode maximum: present embodiment is not provided with floating electrode on base material, only between the extension electrode 158 of drain 154 and first insulating barrier 130, first semiconductor region 144 is set, specifically, wherein base material 110 surfaces can be to the height H T of the upper surface of the extension electrode 158 of this through hole 170 drain that exposes 154
Extremely
And base material 110 surfaces can be to the height H P of the lower surface that contacts with first semiconductor region 144 of the extension electrode 158 of drain 154
Extremely
That is to say that the producer should look actual needs and select the structure of storehouse below the extension electrode 158 of drain 154, uninevitable must be floating electrode 126.Particularly, the producer can select single with floating electrode 126, single with first semiconductor region 144, and the extension electrode 158 that both come bed hedgehopping drain 154 perhaps is set simultaneously.
In addition, be square though Fig. 1 illustrates the shape of floating electrode 126, this does not limit the present invention, and the shape of floating electrode 126 also can be polygon (illustrating as Fig. 7), oval (illustrating as Fig. 8) or circle.The technical field of the invention has knows the knowledgeable usually, should look actual needs elasticity and select.
Though the present invention discloses as above with execution mode, so it is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention, and when being used for a variety of modifications and variations.For instance, the technical field of the invention has knows the knowledgeable usually, also can common electrode lines 210 be integrated on the plurality of groups of substrates of thin-film transistor according to actual needs (to illustrate as Fig. 9), and it does not break away from protection scope of the present invention.Therefore, protection scope of the present invention defines and is as the criterion when looking accompanying claim.
Claims (25)
1, a kind of plurality of groups of substrates of thin-film transistor is characterized in that, comprises:
One base material;
One first patterned conductive layer is positioned on this base material, and wherein this first patterned conductive layer comprises one scan line, a gate and a floating electrode, and wherein this gate electrically connects this scan line;
One first insulating barrier is positioned on this first patterned conductive layer;
Semi-conductor layer is positioned on this first insulating barrier, and wherein this semiconductor layer comprises a channel region;
One second patterned conductive layer is positioned on this first insulating barrier, wherein this second patterned conductive layer comprises the staggered data wire of one source pole, a drain and scan line and the extension electrode of a drain, and this gate, this source electrode, this drain and this channel region constitute a thin-film transistor, and wherein this source electrode electrically connects the extension electrode part and the overlapping of this floating electrode of this data wire and this drain;
One second insulating barrier is positioned on this second patterned conductive layer;
One through hole runs through this second insulating barrier, and exposes the extension electrode of this drain of part; And
One pixel electrode by this through hole, electrically connects the extension electrode of this drain.
2, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, this semiconductor layer more comprises one first semiconductor region, between the extension electrode and this first insulating barrier of this drain.
3, plurality of groups of substrates of thin-film transistor according to claim 2 is characterized in that, this first semiconductor region and this channel region are connected with each other.
4, plurality of groups of substrates of thin-film transistor according to claim 2 is characterized in that, the setting that is separated from each other of this first semiconductor region and this channel region.
5, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, the edge of this floating electrode of justified margin of the extension electrode of this drain.
6, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, the extension electrode of this drain its away from the projected position at the edge of drain direction than this floating electrode its 0 μ m to 10 μ m that in edge, contracts away from the gate direction.
7, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, the extension electrode of this drain its it protrudes 0 μ m to 10 μ m at the edge away from the gate direction than this floating electrode at the projected position away from the edge of drain direction.
8, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, this substrate surface to the height of the upper surface of the extension electrode of this drain that this through hole exposes is 3700
To 14000
9, plurality of groups of substrates of thin-film transistor according to claim 2 is characterized in that, this substrate surface to the height of the lower surface that contacts with this first semiconductor region of the extension electrode of this drain is 1500
To 10000
10, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, the shape of this floating electrode is square, polygon, ellipse or circular.
11, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, the material of this second insulating barrier is organic material or inorganic material.
12, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, more comprises one the 3rd insulating barrier above second insulating barrier.
13, plurality of groups of substrates of thin-film transistor according to claim 12 is characterized in that, the material of the 3rd insulating barrier is organic material or inorganic material.
14, plurality of groups of substrates of thin-film transistor according to claim 1 is characterized in that, this second insulating barrier is a chromatic filter layer.
15, plurality of groups of substrates of thin-film transistor according to claim 12 is characterized in that, the 3rd insulating barrier is a chromatic filter layer.
16, a kind of plurality of groups of substrates of thin-film transistor comprises:
One base material;
One first patterned conductive layer is positioned on this base material, and wherein this first patterned conductive layer comprises an one scan line and a gate, and wherein this gate electrically connects this scan line;
One first insulating barrier is positioned on this first patterned conductive layer;
Semi-conductor layer is positioned on this first insulating barrier, and wherein this semiconductor layer comprises a channel region and one first semiconductor region;
One second patterned conductive layer is positioned on this first insulating barrier, wherein this second patterned conductive layer comprises the staggered data wire of one source pole, a drain and scan line and the extension electrode of a drain, and this gate, this source electrode, this drain and this channel region constitute a thin-film transistor, and wherein this source electrode electrically connects the extension electrode part and the overlapping of this first semiconductor region of this data wire and this drain;
One second insulating barrier is positioned on this second patterned conductive layer;
One through hole runs through this second insulating barrier, and exposes the extension electrode of this drain of part; And
One pixel electrode by this through hole, electrically connects the extension electrode of this drain.
17, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, this first semiconductor region and this channel region are connected with each other.
18, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, the setting that is separated from each other of this first semiconductor region and this channel region.
19, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, this substrate surface to the height of the upper surface of the extension electrode of this drain that this through hole exposes is 3200
To 13500
20, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, this substrate surface to the height of the lower surface that contacts with this first semiconductor region of the extension electrode of this drain is 1000
To 9500
21, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, the material of this second insulating barrier is organic material or inorganic material.
22, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, more comprises one the 3rd insulating barrier above second insulating barrier.
23, plurality of groups of substrates of thin-film transistor according to claim 22 is characterized in that, the material of the 3rd insulating barrier is organic material or inorganic material.
24, plurality of groups of substrates of thin-film transistor according to claim 16 is characterized in that, this second insulating barrier is a chromatic filter layer.
25, plurality of groups of substrates of thin-film transistor according to claim 22 is characterized in that, the 3rd insulating barrier is a chromatic filter layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910132644.5A CN101515590B (en) | 2009-03-30 | 2009-03-30 | Film transistor array substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910132644.5A CN101515590B (en) | 2009-03-30 | 2009-03-30 | Film transistor array substrate |
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| CN101515590A true CN101515590A (en) | 2009-08-26 |
| CN101515590B CN101515590B (en) | 2015-01-07 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103199095A (en) * | 2013-04-01 | 2013-07-10 | 京东方科技集团股份有限公司 | Displayer, thin film transistor array substrate and manufacturing process thereof |
| CN103995381A (en) * | 2014-04-17 | 2014-08-20 | 上海天马微电子有限公司 | Pixel structure, liquid crystal panel and process method thereof |
| CN105116655A (en) * | 2015-09-22 | 2015-12-02 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, array substrate and manufacturing method of array substrate |
| CN105470382A (en) * | 2015-12-31 | 2016-04-06 | 江苏森尼克电子科技有限公司 | Magnetic-sensitive device with extending electrode and manufacturing process |
| CN111463248A (en) * | 2020-04-10 | 2020-07-28 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, manufacturing method thereof and display panel |
-
2009
- 2009-03-30 CN CN200910132644.5A patent/CN101515590B/en active Active
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103199095A (en) * | 2013-04-01 | 2013-07-10 | 京东方科技集团股份有限公司 | Displayer, thin film transistor array substrate and manufacturing process thereof |
| WO2014161234A1 (en) * | 2013-04-01 | 2014-10-09 | 京东方科技集团股份有限公司 | Thin film transistor array substrate and manufacturing method therefor, and display |
| CN103199095B (en) * | 2013-04-01 | 2016-06-08 | 京东方科技集团股份有限公司 | Display, thin-film transistor array base-plate and manufacturing process thereof |
| CN103995381A (en) * | 2014-04-17 | 2014-08-20 | 上海天马微电子有限公司 | Pixel structure, liquid crystal panel and process method thereof |
| CN105116655A (en) * | 2015-09-22 | 2015-12-02 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, array substrate and manufacturing method of array substrate |
| WO2017049780A1 (en) * | 2015-09-22 | 2017-03-30 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, array substrate, and manufacturing method therefor |
| CN105116655B (en) * | 2015-09-22 | 2017-04-12 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, array substrate and manufacturing method thereof |
| GB2557844A (en) * | 2015-09-22 | 2018-06-27 | Shenzhen China Star Optoelect | Liquid crystal display panel, array substrate, and manufacturing method therefor |
| GB2557844B (en) * | 2015-09-22 | 2021-09-15 | Shenzhen China Star Optoelect | Liquid crystal display panel, array substrate and manufacturing method for the same |
| CN105470382A (en) * | 2015-12-31 | 2016-04-06 | 江苏森尼克电子科技有限公司 | Magnetic-sensitive device with extending electrode and manufacturing process |
| CN111463248A (en) * | 2020-04-10 | 2020-07-28 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, manufacturing method thereof and display panel |
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| Publication number | Publication date |
|---|---|
| CN101515590B (en) | 2015-01-07 |
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