CN101510408B - Drive circuit of LCD TV - Google Patents
Drive circuit of LCD TV Download PDFInfo
- Publication number
- CN101510408B CN101510408B CN2009101053414A CN200910105341A CN101510408B CN 101510408 B CN101510408 B CN 101510408B CN 2009101053414 A CN2009101053414 A CN 2009101053414A CN 200910105341 A CN200910105341 A CN 200910105341A CN 101510408 B CN101510408 B CN 101510408B
- Authority
- CN
- China
- Prior art keywords
- signal
- input
- chip
- uoc
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 18
- 238000004088 simulation Methods 0.000 claims abstract description 17
- 238000000926 separation method Methods 0.000 claims abstract description 4
- 230000000007 visual effect Effects 0.000 claims description 10
- 230000005236 sound signal Effects 0.000 claims description 8
- 239000002131 composite material Substances 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 claims 1
- 150000001875 compounds Chemical group 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 230000003321 amplification Effects 0.000 abstract 1
- 238000003199 nucleic acid amplification method Methods 0.000 abstract 1
- 238000004886 process control Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention discloses a driving circuit of an LCD TV. The technical problem needing to be solved is the improvement of the image quality of the LCD TV and the reduction of cost thereof. The driving circuit of the LCD TV is provided with a video control processor applied to receiving intermediate-frequency external simulation tuner signals, luminance and chrominance separation signals, compound signals and audio change-over switch signals; video output signals is transferred to a liquid crystal display screen through a video signal switching circuit and an image display control chip, and audio output signals is transferred to a power amplification processor. Compared with the prior art, the driving circuit adopts an I2C bus to connect a driving chip with the driving circuit of a core single-chip of a general signal processor, thereby realizing video receiving processing, PC input processing and image output function as well as independent processing control to the driving circuit of a dual-core single-chip, improving the operation speed and working efficiency of the driving circuit, reducing cost and obtaining better video playback effect.
Description
Technical field
The present invention relates to the drive circuit of a kind of liquid crystal TV set, particularly a kind of liquid crystal TV set.
Technical background
The medium and small liquid crystal TV set LCD-TV of prior art, the structure that drive circuit adopts microprocessor MCU, visual display controller SCALER and Video Decoder DECODER to become one, or the structure that MCU+SCALER is integrated.Though these structure costs are lower, image quality is poor.If select for use high-quality DECODER can increase the cost of liquid crystal TV set again, make product lack the market competitiveness.
Summary of the invention
The drive circuit that the purpose of this invention is to provide a kind of liquid crystal TV set, the technical problem that solve are the image qualities that improves liquid crystal TV set, and reduce its cost.
The present invention is by the following technical solutions: a kind of drive circuit of liquid crystal TV set, the drive circuit of described liquid crystal TV set is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone separation signal, composite signal, the input of audio frequency diverter switch signal, to LCDs, audio output signal is to the power amplifier processor through vision signal commutation circuit, visual display control chip for video output signals.
Vision signal commutation circuit of the present invention is accepted the input of simulation R-G-B signals.
Visual display control chip of the present invention is accepted the digital signal input.
Audio signal diverter switch received audio signal input of the present invention.
The drive circuit of liquid crystal TV set of the present invention of the present invention is provided with power supply, output 12V, 5V, 3.3V DC power supply, be the video processor controls, simulation tuner signal, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor.
Intermediate-frequency external simulation tuner of the present invention, light tone are separated, compound, audio frequency diverter switch employing UOC-TOP-80 general purpose signal processor.
Digital signal input of the present invention and simulation R-G-B signals input signal control and treatment adopt the NT68665 chip for driving
NT68665 chip for driving of the present invention is connected by the I2C bus with the UOC-TOP-80 general purpose signal processor.
The present invention compared with prior art, adopt the I2C bus with NT68665 chip for driving and UOC-TOP-80 general purpose signal processor, two independently 8051 kernel Micro Controller Unit (MCU) driving circuit connect, realize that video reception is handled, the PC input is handled and the picture output function, independent process control to two 8051 kernel Micro Controller Unit (MCU) driving circuit, improve the speed of service and the operating efficiency of drive circuit, reduced cost, obtained better video playback effect.
Description of drawings
Fig. 1 is the circuit block diagram of the embodiment of the invention.
Fig. 2 is that commutation circuit figure is selected in the circuit rgb signal input of the embodiment of the invention.
Fig. 3 is the frequency switch circuit figure of the embodiment of the invention.
Fig. 4 is the video input circuit of the embodiment of the invention.
Fig. 5 is the power amplifier figure of the embodiment of the invention.
Fig. 6 is the tuner control circuit figure of the embodiment of the invention.
Fig. 7 is the UOC-TOP-80 and the NT68665 connecting circuit figure of the embodiment of the invention.
Specific embodiments
Below in conjunction with drawings and Examples the present invention is described in further detail.As shown in Figure 1, the drive circuit of liquid crystal TV set of the present invention is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone is separated SV signal, compound AV signal, the input of audio frequency diverter switch signal, video output signals through vision signal commutation circuit, visual display control chip to LCDs, audio output signal is to the power amplifier processor, simulation RGB rgb signal incoming video signal commutation circuit, digital signal inputs to visual display control chip, the input of audio signal diverter switch received audio signal.The drive circuit of liquid crystal TV set of the present invention is provided with power supply, output 12V, 5V, 3.3V DC power supply, be the video processor controls, intermediate-frequency external simulation tuner, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor.
The UOC-TOP-80 general purpose signal processor of PHILIPS company is adopted in AV, SV input, intermediate-frequency external simulation tuner and audio signal input, digital DVI input signal and analog rgb input signal control and treatment are adopted the NT68665 chip for driving of NOVATEK company, and two chips connect by iic bus.UOC-TOP-80 is used as video and Audio Processing, and TV TV intermediate-freuqncy signal is handled, and supports all kinds of television systems and sound standard, supports stereo.This processor includes the 80C51 microprocessor, and independently software program control Driver Circuit is arranged.The NT68665 chip for driving includes MCU and SCALER, to the control of image output control and treatment and whole drive circuit.
The demonstration of the drive circuit of liquid crystal TV set and Control work are finished by the NT68665 chip, and this chip internal is integrated with 8051 kernel single-chip microcomputers.As shown in Figure 2, the SCLAER of this chip partly is responsible for the analog rgb input of PC, the rgb signal of Video processing IC output, the rgb signal of analog rgb input, the output of video processor controls switches by high bandwidth analog switch PI5V330W, delivers to SCLAER again and handles.Numeral DVI signal is directly handled by the input of NT68665 digital interface.The SCLAER part also is responsible for LCDs PANEL image output control, provides graphic screen menu mode regulative mode OSD to show.8051 monolithic microcomputer kernel are responsible for controlling the graphic OSD display action, and receive the processing external signal, the work of control and responsible whole drive circuit.
As shown in Figure 2, the input of analog rgb signal is handled, because NT68665 has only one road RGB input port, handling to the RGB of PC with from the RGB two paths of signals of video decode IC UOC-TOP-80 general purpose signal processor output, drive circuit adopts high bandwidth analog switch PI5V330W to switch to 2 road rgb signals, carries out switching controls by control signal DATA_SWITCH.PI5V330W is the high bandwidth analog switch, has guaranteed the stable of signal.H/V SYNC synchronizing signal to 2 road RGB adopts common simulation diverter switch 74HC4052 to switch, and carries out switching controls by control signal DATA_SWITCH, and the synchronizing signal of output is directly sent SCLAER synchronizing signal input pin.
Video processing adopts the UOC-TOP-80 general purpose signal processor of PHILIPS company, and the integrated 8051 kernel single-chip microcomputers of this chip internal include video video decoder, and TV medium-frequency IF demodulator is supported global various television system and sound standard, supports stereo.Video frequency processing chip is responsible for video in drive circuit and the decoding of TV intermediate frequency, audio are handled.Shown in Fig. 3,4 and 5, because UOC-TOP-80 chip audio input port restricted number, drive circuit send the UOC-TOP-80 chip to handle after the audio frequency of PC and AV, SV must being switched selection by analog switch again.Audio frequency after PC related audio, video sound accompaniment and the TV demodulation switches by analog switch 74HC4052DT, inputs to the UOC-TOP-80 chip by UOC_IN_L, UOC_IN_R again and carries out the audio processing.Again audio signal is sent amplifier TDA1517 to amplify output after the Audio Processing.
As Fig. 4 and shown in Figure 6, the UOC-TOP-80 general purpose signal processor is built-in with the medium-frequency IF demodulator, so the tuner of band intermediate frequency demodulation only need be adopted in TV signal demodulation part, the IF signal of tuner IF1 output is coupled by sound table noise reduction coupler SF600 K7252M, generate VIF_IN1, VIF_IN2 two paths of signals, send UOC-TOP-80 IF input 45,46 pin, carry out intermediate frequency demodulation by IC and handle.Tuner carries out message transmission and control by iic bus (being connected with the UOC-TOP-80 chip with the NT68665 chip for driving), and control signal is by the input parameter output of UOC-TOP according to master control IC NT68665, and the control tuner carries out turntable, hunting action.
As shown in Figure 4, the UOC-TOP-80 chip is also directly accepted AV vision signal and the input of SV color difference signal.This chip outputs to high bandwidth analog switch PI5V330W with signal processing results by RGB+H/V SYNC aspect, passes through the control channel switching signal by the NT68665 main control MCU, the input signal of selecting during control of video output.
As shown in Figure 7, the present invention passes through the I2C bus mode will, NT68665 chip for driving and UOC-TOP-80 general purpose signal processor, two independently 8051 kernel Micro Controller Unit (MCU) driving circuit connect, realize that video reception is handled, the PC input is handled and the picture output function, the independent process control of two 8051 kernel Micro Controller Unit (MCU) driving circuit, the speed of service and the operating efficiency of raising drive circuit, the cost that has reduced scheme has obtained better video playback effect.
Claims (1)
1. the drive circuit of a liquid crystal TV set, it is characterized in that: the drive circuit of described liquid crystal TV set is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone separation signal, composite signal, the input of audio frequency diverter switch signal, to LCDs, audio output signal is to the power amplifier processor through vision signal commutation circuit, visual display control chip for video output signals;
Described vision signal commutation circuit receives the input of simulation R-G-B signals;
Described visual display control chip receives digital DVI input signal input;
Described audio frequency diverter switch received audio signal input;
The drive circuit of described liquid crystal TV set is provided with power supply, output 12V, 5V, 3.3V DC power supply are video processor controls, simulation tuner, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor;
Described intermediate-frequency external simulation tuner signal, light tone separation signal, composite signal and audio frequency diverter switch signal input control and treatment adopt the UOC-TOP-80 general purpose signal processor;
Described digital DVI input signal input and simulation R-G-B signals input signal control and treatment adopt the NT68665 chip for driving;
Described NT68665 chip for driving is connected by the I2C bus with the UOC-TOP-80 general purpose signal processor;
The analog rgb input of the SCALER section processes PC of described NT68665 chip for driving, the rgb signal of video processor controls output, the rgb signal of analog rgb input, the output of video processor controls switches by high bandwidth analog switch PI5V330W, delivers to SCALER again and handles; Numeral DVI input signal is handled by the input of NT68665 digital interface; The SCALER part also is responsible for LCDs PANEL image output control, provides graphic screen menu mode regulative mode OSD to show; Single-chip microcomputer 8051 cores in the NT68665 chip for driving are responsible for controlling the graphic OSD display action, and receive the processing external signal, the work of control and responsible whole drive circuit;
One road RGB input port of NT68665 chip for driving, handling to the RGB of PC with from the RGB two paths of signals of video processor controls UOC-TOP-80 general purpose signal processor output, the drive circuit of liquid crystal TV set adopts high bandwidth analog switch PI5V330W to switch to 2 road rgb signals, carries out switching controls by control signal DATA_SWITCH; H/V SYNC synchronizing signal to 2 road RGB adopts common simulation diverter switch 74HC4052 to switch, and carries out switching controls by control signal DATA_SWITCH, and the synchronizing signal of output is directly sent SCALER synchronizing signal input pin;
Described drive circuit send the UOC-TOP-80 general purpose signal processor to handle after the audio frequency of PC and AV, SV is selected by the analog switch switching again, audio frequency after PC related audio, video sound accompaniment and the TV demodulation switches by analog switch 74HC4052DT, input to the UOC-TOP-80 general purpose signal processor by UOC_IN_L, UOC_IN_R pin again and carry out the audio processing, again audio signal is sent amplifier TDA1517 to amplify output after the Audio Processing;
Described UOC-TOP-80 general purpose signal processor is built-in with the medium-frequency IF demodulator, the tuner of band intermediate frequency demodulation only need be adopted in TV signal demodulation part, the IF signal of tuner IF1 output is coupled by sound table noise reduction coupler SF600K7252M, generate VIF_IN1, VIF_IN2 two paths of signals, send UOC-TOP-80 general purpose signal processor IF input 45,46 pin, carry out intermediate frequency demodulation by master control IC and handle; Tuner is connected with the UOC-TOP-80 general purpose signal processor with the NT68665 chip for driving by the I2C bus, carry out message transmission and control, control signal is by the input parameter output of UOC-TOP-80 general purpose signal processor according to master control ICNT68665, and the control tuner carries out turntable, hunting action.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101053414A CN101510408B (en) | 2009-04-23 | 2009-04-23 | Drive circuit of LCD TV |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101053414A CN101510408B (en) | 2009-04-23 | 2009-04-23 | Drive circuit of LCD TV |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101510408A CN101510408A (en) | 2009-08-19 |
CN101510408B true CN101510408B (en) | 2011-10-05 |
Family
ID=41002786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101053414A Expired - Fee Related CN101510408B (en) | 2009-04-23 | 2009-04-23 | Drive circuit of LCD TV |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101510408B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109541973A (en) * | 2018-11-26 | 2019-03-29 | 深圳市品慕科技有限公司 | A kind of construction of switch and cook's machine |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN2494091Y (en) * | 2001-09-03 | 2002-05-29 | 海信集团有限公司 | Liquid crystal back projection television set with VGA indication function |
CN1200556C (en) * | 2003-08-04 | 2005-05-04 | 上海源创数码科技有限公司 | Electronic photo frame with television receiving function |
CN200997644Y (en) * | 2006-12-02 | 2007-12-26 | 冠捷电子(福建)有限公司 | Double-chip processing circuit of liquid-crystal TV |
CN101465978A (en) * | 2007-12-21 | 2009-06-24 | 康佳集团股份有限公司 | High-efficiency simple LCD TV and circuit constitution thereof |
CN201355852Y (en) * | 2009-02-12 | 2009-12-02 | 深圳市科特科技发展有限公司 | Drive circuit of LCD TV |
-
2009
- 2009-04-23 CN CN2009101053414A patent/CN101510408B/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN2494091Y (en) * | 2001-09-03 | 2002-05-29 | 海信集团有限公司 | Liquid crystal back projection television set with VGA indication function |
CN1200556C (en) * | 2003-08-04 | 2005-05-04 | 上海源创数码科技有限公司 | Electronic photo frame with television receiving function |
CN200997644Y (en) * | 2006-12-02 | 2007-12-26 | 冠捷电子(福建)有限公司 | Double-chip processing circuit of liquid-crystal TV |
CN101465978A (en) * | 2007-12-21 | 2009-06-24 | 康佳集团股份有限公司 | High-efficiency simple LCD TV and circuit constitution thereof |
CN201355852Y (en) * | 2009-02-12 | 2009-12-02 | 深圳市科特科技发展有限公司 | Drive circuit of LCD TV |
Also Published As
Publication number | Publication date |
---|---|
CN101510408A (en) | 2009-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN204031318U (en) | A kind of modularization TV | |
JP2007184889A (en) | Lcd tv capable of being used as music station | |
JP2007267354A (en) | Video output device and video output control method | |
CN105338270B (en) | A kind of modularization TV | |
CN201001163Y (en) | TV set having multi-path HDMI interfaces | |
US20060023121A1 (en) | Electronic apparatus, video data reception method, and video data receiver | |
CN101510408B (en) | Drive circuit of LCD TV | |
JP5546929B2 (en) | Image display device and display control method | |
CN201355852Y (en) | Drive circuit of LCD TV | |
CN2907121Y (en) | TV set with multi-channel voice and intelligent video selection switching circuit | |
CN101212583B (en) | Decoding circuit in integrated analog/digital TV receiver | |
CN111554248B (en) | LCD chip | |
US20070064153A1 (en) | Information processing apparatus capable of receiving broadcast program data, and method of controlling power savings which is applied to the apparatus | |
CN1104676C (en) | Display system that accepts a variety of input signals | |
KR100699267B1 (en) | monitor | |
KR200415693Y1 (en) | Interface system for image display of multiple multimedia devices for vehicles | |
CN101001330A (en) | Instruction control method and device of digital integral machine | |
CN2694675Y (en) | A digital processing TV set | |
CN100576888C (en) | A kind of general signal processing platform that is applied to little demonstration back projection TV | |
CN203457262U (en) | Display device and display system with television function | |
CN103297825A (en) | Multi-media portable terminal for achieving terrestrial digital television | |
CN100394780C (en) | Four-in-one color liquid crystal TV set | |
TWI406561B (en) | Video processor and its automatic selection filter of the video filter driver | |
JP2005286403A (en) | Television receiver | |
CN101335844A (en) | Television set |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111005 Termination date: 20160423 |
|
CF01 | Termination of patent right due to non-payment of annual fee |