CN101493494B - Wafer testing method and system - Google Patents

Abstract

The present invention provides a wafer testing method and system, providing at least one wafer, wherein the wafer has a plurality of grains, each of which has its own grain state; then the wafer is tested, and the boundary grains of the wafer are defined according to the test results. The boundary grain states are compared with preset values to determine whether to issue a message to prompt an operator that a map offset may occur.

Description

Wafer testing method and system

technical field

The present invention relates to a method and system for testing wafers, in particular to a method and system for judging the occurrence of map offset in the process of wafer probe (chip probe).

Background technique

The production process of integrated circuit (IC, integrated circuit) is a multi-level division of labor structure, including integrated circuit design (IC design), wafer manufacturing (wafer manufacturing), wafer probing (circuit probing), packaging (assembling) and final testing. In the above-mentioned production division, the two inspection procedures of wafer needle inspection and final inspection are important checkpoints to ensure product quality.

A wafer contains many dies, these dies are usually called dies, but not all dies are of good quality, so the method of wafer needle measurement is to use a very fine probe card (probe) card) or fine-point needle to test each die on the wafer, and then mark the bad die or keep a test map (mapping file) to classify good and bad products. If wafer pinning is not carried out, and the wafer is cut and packaged directly after the wafer is manufactured, the packaging cost of defective products is unnecessary waste. Therefore, the step of wafer needle testing can classify good and bad products on the wafer to reduce the cost of packaging and subsequent testing.

In wafer needle testing, the first die is detected by machine vision equipment, and then the dies are tested one by one according to the preset test range. In the above method, if the starting point is not found correctly, the test range will be shifted, causing errors in the test results, which is called map shift.

At present, manual judgment can be used to solve this problem. Manually judge whether there is any map offset phenomenon, and inspect each wafer with manual visual inspection. This method can be comprehensively inspected and requires experienced technicians. It can be effectively operated, and no evidence can be produced.

A more effective solution is to pre-set the marking die. The marking die has a known die state. When the test result of the marked die is different from the known test result, it is judged that the test The point is wrong, and the problem of map offset occurs. However, this method must pre-set the marking grains before each test, and the result of increased steps will also waste time, and it is difficult to fully implement.

In view of the above deficiencies, the wafer testing method and system provided by the present invention are improved on the prior art.

Contents of the invention

Based on solving the above-mentioned shortcomings in the prior art, an object of the present invention is to provide a wafer testing method and system for determining whether there is a map offset phenomenon during the wafer testing process.

The testing method of the wafer provided by the present invention does not need to pre-design the marked crystal grains, which can increase the testing efficiency.

Another object of the present invention is to provide a wafer testing method and system, which can reduce manpower requirements, reduce time and increase efficiency.

Another object of the present invention is to provide a wafer testing method and system, which can send out a signal to prompt operators when map deviation occurs.

According to above-mentioned purpose, the present invention at first provides a kind of testing method of wafer, is to provide at least one wafer, and has a plurality of crystal grains on the wafer, and each crystal grain all has respective grain state; Carry out wafer then Test, define the boundary grains of the wafer according to the test results, compare the state of the boundary grains with the preset value, and decide whether to send a message to prompt the operator.

The present invention then provides a wafer testing system, which includes a testing device for testing the wafer, and the wafer includes a plurality of crystal grains, each of which has its own grain state; the test results will be passed through the definition device Define the boundary grains; use the selection device or the marking device to select the target grains in the boundary grains; and then use the computing device to determine whether to send information.

Description of drawings

Fig. 1 is a schematic diagram of starting offset of the present invention;

Fig. 2 is a schematic diagram of boundary grain definition of a preferred embodiment of the present invention;

Fig. 3 is a schematic diagram of determining map offset in a preferred embodiment of the present invention;

Fig. 4 is a schematic diagram of determining map offset in a preferred embodiment of the present invention;

Fig. 5 is a schematic diagram of determining map offset in a preferred embodiment of the present invention; wherein:

Figure 5a is to divide the boundary grain Y into two relative groups on the left and right;

Figure 5b divides the boundary grain Y into two relative groups, upper and lower;

Figure 5c divides the boundary grain Y into two relative groups, upper right and lower left;

FIG. 5d divides the boundary grains Y into two relative groups, the upper left and the lower right.

[Description of main component symbols]

1 grain state (available)

3 grain state (short circuit)

4 grain state (open circuit)

100 wafers

102 grains

110 measuring range

112 test pattern

Y boundary grain

Y1 target die

A1-A4 boundary grain group

Detailed ways

Since the present invention is a wafer testing method and system, some basic principles utilized therein can be easily understood by those with ordinary knowledge in this field, and thus will not be repeated here. The diagrams compared below are schematic representations related to the features of the present invention, and are not and need not be completely drawn based on actual dimensions, and the description is given first.

First, please refer to FIG. 1 , which is a schematic diagram according to a preferred embodiment of the present invention. As shown in FIG. 1 , a wafer is firstly provided, which is a wafer 100 in this embodiment, and a plurality of dies included in the wafer 100 are dies 102 . Then, when the wafer 100 is tested with the testing device, when the measuring point shifts and the measurement range 110 deviates to the upper right, the test result is as shown in the test chart 112 in Figure 1, and the numbers in the test chart 112 Represents the grain state, wherein grain state 1 represents an available die, grain state 3 represents a die short circuit (short), and grain state 4 represents a die open circuit (open). Under normal circumstances, the defect test of the die 102 will be carried out first. When the test state of the die 102 is open circuit or short circuit, it can be collectively referred to as an error; or when the test state of the die 102 is different from the expected state, it can also be called an error. for error.

Next, as shown in FIG. 2 , it is a schematic diagram of the present invention for judging boundary grains. In this embodiment, any crystal grain X has at most 8 adjacent crystal grains, and when a certain crystal grain 102 in the test result has less than 8 adjacent crystal grains, the defining device will judge that this crystal grain is Boundary grain Y.

Next, please refer to FIG. 3 , which is a schematic diagram of another preferred embodiment of determining map offset according to the present invention. As shown in Figure 3, after the boundary grain Y is defined, use the selection device to select part (or all) of the boundary grains as the target grain Y1, and use the computing device to calculate whether the number of errors in the target grain Y1 reaches the predetermined value. Set value, when the number of errors reaches the preset value, the computing device will send out a signal, indicating that there may be a situation where the map is shifted.

Next, please refer to FIG. 4 , which is a schematic diagram of another preferred embodiment of determining map offset in the present invention. As shown in Figure 4, when the boundary grain Y is defined, the boundary grain Y is classified into four boundary grain groups such as A1, A2, A3, and A4 according to the location by the classification device, and a computing device is used to calculate one or The number of grain states in a plurality of boundary grain groups, when the number of certain grain states (such as open circuit, short circuit or other grain states representing different electrical properties) in these boundary grain groups reaches a preset value , the computing device will send out a signal indicating that there may be a map offset.

According to a preferred embodiment of the present invention, after the boundary grains Y are defined, the boundary grains Y with different boundary directions are marked by a marking device, and this step can be calculated and marked by a computer. As shown in Figure 5a-Figure 5d, Figure 5a divides the boundary grain Y into left and right relative groups, Figure 5b divides the boundary grain Y into upper and lower relative groups, and Figure 5c divides the boundary grain Y Y is divided into two relative groups, the upper right and the lower left. FIG. 5d divides the boundary grain Y into two relative groups, the upper left and the lower right; each boundary grain can belong to multiple different groups. Then use a comparison device to compare the error rates of some or all of the relative groups. When the error rate difference reaches a preset value, a signal is sent, and the signal is transmitted to the warning device. The warning device will display graphical information Displayed to alert operators of possible map shifts.

In summary, the present invention provides a wafer testing method and system. This method can be used to determine whether there is a map offset phenomenon during the wafer testing process, and can judge all wafers under test. And without increasing the manpower burden. When the system judges that there may be a phenomenon of map offset, it can further send out a signal to prompt the operator to check the starting point.

Obviously, according to the description in the above embodiments, the present invention may have many modifications and differences. It is therefore to be understood, within the scope of the appended claims, that the invention may be practiced broadly in other embodiments than the foregoing detailed description. The above are only preferred embodiments of the present invention, and are not intended to limit the scope of the patent application of the present invention; all other equivalent changes or modifications that do not deviate from the spirit disclosed in the present invention should be included in the following patent applications within range.

Claims (9)

1. A test method of wafer, the feature of this test method comprises: providing at least one wafer comprising a plurality of dies; testing the dies on the wafer; Defining the boundary grains of the wafer is to define these boundary grains according to the test results of the wafer; any grain has at most 8 adjacent grains, when a certain grain in the test results has less than When there are 8 adjacent grains, the defining device will judge that this grain is a boundary grain; selecting a plurality of boundary grains as target grains; and A comparison judgment is performed, and when the number of errors of the target dies reaches a preset value, a signal is sent, indicating that there may be a situation of map offset. 2. The testing method according to claim 1, wherein the target grains include all boundary grains. 3. The testing method as claimed in claim 1, wherein the target grains comprise part of boundary grains. 4. A test method for a wafer, the test method is characterized by: providing at least one wafer, the wafer includes a plurality of crystal grains, and these crystal grains have respective grain states; test the wafer on the wafer These grains; defining the boundary grains of the wafer is to define these boundary grains according to the test results of the wafer; any grain has at most 8 adjacent grains, when a certain grain in the test results When a grain has less than 8 adjacent grains, the defining device will judge that the grain is a boundary grain; perform a classification procedure to classify these boundary grains into a plurality of boundary grain groups; and perform a comparison Judging, when the state of at least one grain of at least one boundary grain group reaches a preset value, a signal is sent to indicate that there may be a situation of map deviation. 5. The testing method according to claim 4, wherein the boundary grains are classified into a plurality of boundary grain groups according to the positions of the boundary grains. 6. A test method for a wafer, the feature of the test method comprising: providing at least one wafer comprising a plurality of dies; testing the dies on the wafer; Defining the boundary grains of the wafer is to define grains without adjacent grains on at least one side as boundary grains according to the test results of the wafer; marking the boundary grains is marking the boundary grains with at least one directional mark; performing a classification procedure to classify the boundary grains into a plurality of boundary grain groups according to the orientation; and A comparison judgment is performed, and when the error ratio difference of the boundary grains with opposite directions reaches a preset value, a signal is sent, indicating that there may be a situation of map offset. 7. A wafer testing system, the testing system is characterized by: A testing device for testing a wafer, wherein the wafer includes a plurality of dies; A defining device is to define at least one boundary grain of the wafer according to the test result of the test device; any grain has at most 8 adjacent grains, and when a certain grain in the test result has less than 8 When there are two adjacent grains, the defining device will judge that this grain is a boundary grain; a selection device for selecting the boundary grains as target grains; and A computing device, when the number of errors of the target dies reaches a preset value, sends out a signal indicating that there may be a situation of map offset. 8. A wafer testing system, the testing system is characterized by: A test device for testing a wafer, and the wafer includes a plurality of dies, the dies have respective die states; A definition device is to define at least one boundary grain of the wafer according to the test result of the test device; any grain X has at most 8 adjacent grains, when a certain grain in the test result has less When there are 8 adjacent crystal grains, the defining device will judge that this grain is a boundary grain; a classification device for classifying the boundary grains into a plurality of boundary grain groups; and An operation device, when the quantity of at least one grain state of at least one boundary grain group reaches a preset value, sends out a signal indicating that there may be a map offset situation. 9. A wafer testing system, the testing system is characterized by: A testing device for testing a wafer, wherein the wafer includes a plurality of dies; A defining device is to define a grain with at least one side without adjacent grains as a boundary grain according to test results; a marking device for marking at least one direction without adjacent grains on the boundary grain; a sorting device for sorting the boundary grains into a plurality of boundary grain groups according to the direction; and A comparison device, when the error ratio difference of the boundary grains with opposite directions reaches a preset value, a signal is sent out, indicating that there may be a map offset situation.

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