CN101355061B - 包括用于基片载体的密封装置的功率半导体模块及其制造方法 - Google Patents
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Abstract
本发明描述一种功率半导体模块,包括一由一第一塑料构成的壳体、至少一个具有一在其上构成的电路装置(50)的基片载体和从电路装置引出的电接线元件(60);其中壳体(10)具有用于与基片载体(40)持久连接的固定装置(20),并且壳体(10)具有一与其构成一件的、环绕的、指向基片载体(40)的一第一内主表面(44)那边的、持久弹性的密封装置(30),该密封装置由一第二塑料制成。所属的方法具有基本的步骤:由一第一机械稳定的塑料制成一壳体并且由一第二持久弹性的塑料制成一密封装置;在壳体上设置至少一个基片载体;借助于固定装置使壳体与基片载体持久连接。
Description
技术领域
本发明描述一种功率半导体模块,包括:一壳体;至少一个优选在壳体的一凹槽中设置的并由壳体在侧面包围的基片载体,该基片载体具有一在其上构成的功率电子电路装置;以及由电路装置引出的电接线元件。
背景技术
例如在DE 101 00 460 A1中公开一种所述型式的功率半导体模导体,如其在其基本特点上长久以来是已知的。这样的按现有技术的功率半导体模块具有一基片载体,其构成功率半导体模块的下面的终端。绝缘材料壳体在这里在其纵向侧面稍微高出该基片载体以便包围基片载体。这样的基片载体经常构成为一扁平的金属成型体、优选由铜构成。由此在有效的热扩展时对于从功率电子电路装置向一冷却构件的传热产生一微小的热阻。
按照现有技术还已知,基片载体与壳体粘合,以便在用一在该时刻液态的绝缘材料、例如一硅酮橡胶填满壳体时防止流出该硅酮橡胶。此外壳体借助于金属的铆接与基片载体相连接。该铆接构成为具有一贯通的孔的空心体,以便同样借助于一螺钉连接能够将功率半导体模块固定在一冷却构件上。按照现有技术这些铆接构成为黄铜铆接,因为其由于黄铜的铅成分能够产生一定的变形并从而使一铆接才是可能的。
在基片载体本身上与其绝缘地设置功率半导体模块的电路装置。在这方面不同的具有大功率晶体管、功率二极管和/或功率晶闸管的电路装置是已知的。电路装置借助于绝缘的基片,例如DCB(直接铜键合)基片与基片载体绝缘。
此外为现有技术配设不同的配置的接线元件用于负荷接线和辅助接线,例如用于受控的功率半导体构件的控制连接。在这方面这些接线元件与基片或电路装置的功率半导体构件的不同的连接技术是已知的,在此特别优选钎焊连接、压力接触连接和/或加压烧结连接。
对按照现有技术的功率半导体模块不利的是,基片载体借助于一粘接与壳体相连接,以便在制造过程中确保壳体的紧密性,防止流出硅酮橡胶。还通过上述的铆接达到可保持持久的连接。
发明内容
因此本发明的目的在于,介绍一种包括一基片载体的功率半导体模块,其中其利用连接装置与功率半导体模块的壳体相组合并且所属的制造方法可实现一低成本的和可自动化的实施形式。
按照本发明通过一种如下文所述的功率半导体模块和通过一种如下文所述的用于制造该功率半导体模块的方法达到该目的。优选的实施形式描述于诸从属权利要求中。
本发明的出发点是构成一种功率半导体模块,其包括一壳体,至少一个优选在壳体的凹槽中设置的且由壳体在侧面优选在各侧面包围的基片载体。在该基片载体上构成一功率电子电路装置,由该电路装置引出用于负载接线和辅助接线的接线元件。在这方面优选的是,至少一个接线元件构成为弹簧接触装置。此外壳体具有用于与基片载体持久连接的固定装置。基片载体因此构成一功率半导体模块的面向冷却构件的外侧或外侧的部分。
按照本发明壳体、优选壳体的凹槽具有一与其成一体构成的密封装置。该密封装置优选设置于壳体的凹槽中并且环绕地且朝基片载体的一第一内主表面那边构成。按照本发明密封装置在这里由一第二持久弹性的塑料构成。
本发明用于制造一这样的功率半导体模块的方法具有以下基本的方法步骤:
-以一双组分注塑方法由一第一机械稳定的塑料制成一壳体,该壳体优选包括一用于配属的基片载体的凹槽并且由一第二持久弹性的塑料制成一密封装置;
-将至少一个基片载体设置在壳体上、优选在壳体的配置的凹槽中;
-借助于固定装置使壳体与基片载体持久连接。
优选这样构成该连接,即固定装置包括壳体的突出部,其延伸通过基片载体的孔并且通过借助于这些突出部的末端的温度和/或超声波的作用的变形制造一铆接。在这方面优选的是,密封装置至少部分地包围基片载体的固定装置并且向凹槽那边将固定装置排除在外。因此该铆接的紧密的构造为了其在用一硅酮橡胶填满功率半导体模块时防止流出是不必要的。
此外可以特别优选的是,基片载体在其功能上由基片本身取代。在这种情况下基片构成功率半导体模块的边界并且其本身具有用于铆接所需的孔。
附图说明
该半导体构件的特别优选的进一步构成列举于各实施例的相应的的描述中。并且借助各实施例和图1至4进一步说明本发明的方案。
图1示出一本发明的功率半导体模块的一无基片载体的壳体的三维视图;
图2示出一按图1的壳体的二维视图;
图3示出一本发明按图1的功率半导体模块的一壳体的横剖面图;
图4示出本发明按图1的功率半导体模块包括设置的基片载体的一部分的横剖面图。
具体实施方式
图1示出一本发明的功率半导体模块1的一无基片载体的壳体的三维视图,其优选由一直到大约150℃温度稳定的塑料制成。壳体10在这里在其面向一未示出的冷却装置的那一侧面上具有一用以容纳一基片载体的凹槽12,以及两个用于与冷却构件螺钉连接的套管16。该凹槽12在这里有利地在功率半导体模块1的两纵向侧面分别具有一板条120,以便在各侧面上包围可设置的基片载体。
在功率半导体模块1的内部具有其他的套管14,用于设置接线元件,在这里由构成为接触弹簧62的辅助接线元件构成。这些辅助接线元件用于一电路装置的外部接线,该电路装置设置在一基片载体上,该基片载体设置于壳体10的凹槽12中。
在该凹槽12的区域内,有利地在其窄边的边缘区域122内,壳体10优选具有与其构成一体的各突出部20。这些突出部20在这里构成销状的并且沿待设置的基片载体的方向高出壳体10。
此外示出一由弹性的塑料制成的密封装置30,其优选以一两组分注塑方法与壳体10一起制造。该密封装置30构成为一在壳体10的凹槽12的边缘区域内环绕的密封唇,该密封唇以优选的方式适当地围绕各突出部20,而使这些突出部20处在密封唇的密封区域之外。
图2示出一按图1的功率半导体模块1的壳体的二维视图,其中在用于设置基片载体的凹槽12的俯视图中无凹槽内部的细节。在这里再次示出壳体10,其包括两个用于与可设置的冷却构件螺钉连接的套管16。此外在凹槽12的区域内示出壳体10的各个突出部20,其用于与可设置的基片载体的铆接。
在凹槽12的内部设置按本发明的密封装置30。该密封装置有利地构成使其空出连接装置如各突出部20。因此各突出部20处于凹槽12的一区域内,该凹槽不被密封装置30向基片载体那边密封。这是有利的,因为由此在突出部20与基片载体之间的铆接对密封性不必具有特别的要求。
当然也可以优选将连接装置仅仅或附加地设置在基片载体的待密封的表面的区域内,由此这样提高对铆接的要求,使得它必须构成紧密的。一电绝缘的浇注材料按照现有技术在这一时刻仍是液态的并且因此可能在铆接的区域内流出,所述浇注材料在制造过程中装入功率半导体模块的内部中并至少部分填满功率半导体模块的内部。
图3示出一本发明按图1的功率半导体模块的一壳体10的横剖面图。图中示出包括凹槽12的壳体10,并且在该凹槽的区域内设置一用于与一基片载体铆接且以壳体10的一突出部的形式的连接装置20和用以设置一构成为接触弹簧的辅助接线元件的套管14。凹槽12本身在侧面朝向功率半导体模块1的纵向侧面的侧面由两板条120限定,所述板条构成一待设置的基片载体的止挡装置。直接邻接于这些板条120在凹槽12的内部设置密封装置30。该密封装置30按照描述的方法由一持久弹性的第二塑料制成并且以一两组分注塑方法与由一第一塑料构成的壳体10一起制造。
图4示出本发明按图1的功率半导体模块包括设置的基片载体的一部分的横剖面图。在这里基片载体40构成为一表面精制的铜板。该基片载体40具有对准于壳体10的各突出部20贯通的孔42。为了基片载体与壳体铆接,借助于温度作用和/或超声波作用使这些突出部变形,而使其不再高出基片载体40的外主表面46。
在基片载体的面向功率半导体模块1的内部的内主表面44上且与其电绝缘地设置功率电子电路装置50。
Claims (8)
1.功率半导体模块(1),包括由一第一塑料制成的壳体(10)、至少一个具有一在其上构成的电路装置(50)的基片载体(40)和从该电路装置引出的电接线元件(60);其中,壳体(10)具有用于与基片载体(40)持久连接的固定装置(20),并且壳体(10)具有一与其构成一体的、环绕的、指向基片载体(40)的一第一内主表面(44)那边的、持久弹性的密封装置(30),该密封装置由一第二塑料制成。
2.按照权利要求1所述的功率半导体模块,其特征在于,基片载体(40)构成为一表面精制的铜板,在铜板的内主表面(44)上设置一与铜板电绝缘构成的功率电子电路装置(50)。
3.按照权利要求1所述的功率半导体模块,其特征在于,基片载体(40)设置于壳体(10)的一凹槽(12)中并且在侧面被壳体(10)包围,并且所述持久弹性的密封装置(30)设置在该凹槽(12)中。
4.按照权利要求1所述的功率半导体模块,其特征在于,至少一个接线元件(60)构成为弹簧接触装置。
5.按照权利要求1所述的功率半导体模块,其特征在于,密封装置(30)至少部分地包围基片载体(40)的固定装置(20),而使所述固定装置(20)处在密封唇的密封区域之外。
6.用于制造一按照权利要求1所述的功率半导体模块(1)的方法,具有以下方法步骤:
由一机械稳定的第一塑料制成一壳体(10),并且由一持久弹性的第二塑料制成一密封装置(30);
将至少一个基片载体(40)设置在壳体(10)上;
借助于固定装置(20)使壳体(10)与基片载体(40)持久连接。
7.按照权利要求6所述的方法,其特征在于,固定装置(20)包括壳体(10)的各突出部,所述突出部延伸通过基片载体(40)的孔(42),并且通过借助于对这些突出部(20)的末端的温度和/或超声波作用的变形制造一铆接。
8.按照权利要求6所述的方法,其特征在于,紧接着至少部分地用一电绝缘的浇注材料填满功率半导体模块(1)的内腔。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6233153B1 (en) * | 1994-11-08 | 2001-05-15 | Temic Telefunken Microelectronic Gmbh | Subassembly having a housing with an integral electrical plug unit |
CN1921109A (zh) * | 2005-08-24 | 2007-02-28 | 塞米克朗电子有限及两合公司 | 具有固定装置的功率半导体模块 |
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DE3521572A1 (de) | 1985-06-15 | 1986-12-18 | Brown, Boveri & Cie Ag, 6800 Mannheim | Leistungshalbleitermodul mit keramiksubstrat |
DE3915707A1 (de) | 1989-05-13 | 1990-11-22 | Asea Brown Boveri | Kunststoffgehaeuse und leistungshalbleitermodul mit diesem gehaeuse |
US5117279A (en) * | 1990-03-23 | 1992-05-26 | Motorola, Inc. | Semiconductor device having a low temperature uv-cured epoxy seal |
US5268758A (en) | 1990-09-26 | 1993-12-07 | Matsushita Electric Industrial Co., Ltd. | Horizontal line interpolation circuit and image pickup apparatus including it |
US5461774A (en) * | 1994-03-25 | 1995-10-31 | Motorola, Inc. | Apparatus and method of elastically bowing a base plate |
FR2773942B1 (fr) * | 1998-01-19 | 2000-04-21 | Ferraz | Composant electronique de puissance et son procede de fabrication |
AU1074101A (en) * | 1999-10-12 | 2001-04-23 | Shielding For Electronics, Inc. | Emi containment apparatus |
DE10100460B4 (de) | 2001-01-08 | 2006-06-01 | Semikron Elektronik Gmbh & Co. Kg | Leistungshalbleitermodul mit Gehäuse und Anschlußelementen |
DE10139287A1 (de) | 2001-08-09 | 2003-03-13 | Bombardier Transp Gmbh | Halbleitermodul |
DE10340974A1 (de) | 2003-09-05 | 2005-03-24 | Robert Bosch Gmbh | Steuergeräteeinheit und Verfahren zur Hestellung derselben |
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---|---|---|---|---|
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