CN101345196A

CN101345196A - Manufacturing method for semiconductor substrate, and epitaxial growth apparatus

Info

Publication number: CN101345196A
Application number: CNA200810129892XA
Authority: CN
Inventors: 柴田巧; 山内庄一; 山冈智则; 野上彰二
Original assignee: Denso Corp; Sumitomo Mitsubishi Silicon Corp
Current assignee: Sumco Corp; Denso Corp
Priority date: 2005-09-29
Filing date: 2006-09-29
Publication date: 2009-01-14
Anticipated expiration: 2026-09-29
Also published as: CN100565803C; CN1949461A; CN101345196B; JP2007096137A; JP5015440B2

Abstract

A method for manufacturing a semiconductor device includes steps of: forming a trench on a main surface of a silicon substrate; forming a first epitaxial film on the main surface and in the trench; and forming a second epitaxial film on the first epitaxial film. The step of forming the first epitaxial film has a first process condition with a first growth rate of the first epitaxial film. The step of forming the second epitaxial film has a second process condition with a second growth rate of the second epitaxial film. The second growth rate is larger than the first growth rate.

Description

Method that is used for producing the semiconductor devices and epitaxial growth device

The application be that September 29, application number in 2006 are 200610140367.9 the applying date, denomination of invention divides an application for the application of " method that is used for producing the semiconductor devices and epitaxial growth device ".

Invention field

The present invention relates to a kind of method that is used for producing the semiconductor devices and epitaxial growth device.

Background of invention

Compare with existing MOS transistor, the MOS transistor (SJ-MOS transistor) of super-junction structure (super junction structure) is known as the element (for example, disclosing) that is used to realize low on-resistance in JP-A-H09-266311.This SJ-MOS transistors characteristics is repetition pn row (column) structure in the drift layer zone.Several different methods has been proposed to form this pn row.In these methods, in substrate, form after the groove method by LP-CVD epitaxial growth groove inside and be known as and make CONCENTRATION DISTRIBUTION uniform method on the depth direction.

In the trench fill of using common LP-CVD, to compare with the bottom, the speed of growth in opening portion is big.Therefore, by stopping that opening portion forms hole easily in groove.Can limit the groove opening part by flow simultaneously silane-based gas and etching gas and be stopped (for example, in JP-A-2004-273742, disclosing) in advance.

Yet, after the trench fill epitaxy technique, form the step difference that causes by groove.Therefore, must be used for the epitaxial growth of planarization and polishing.

And, about form in the p/n array structure etched groove in halide gas atmosphere by the trench fill epitaxial growth, proposed can prevent that by the mixed growth system that uses etching gas and silane-based gas the opening portion of groove from early being stopped.

Thus, can suppress by the effect of etching gas stopping of groove opening part, but cause that the speed of growth reduces.Therefore, need a kind ofly to be used to improve the speed of growth and not rely on the technology that stops that suppresses above-mentioned groove opening part.

Summary of the invention

In view of the above problems, the purpose of present disclosure provides a kind of method that is used for producing the semiconductor devices.Another purpose of present disclosure provides epitaxial growth device.

According to the first aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: form groove on the first type surface of silicon substrate; Form first epitaxial film on the first type surface of silicon substrate and in the groove by the mist that uses silicon source gas and halide gas, thereby fill this groove with first epitaxial film; And by using another process conditions on first epitaxial film, to form second epitaxial film.The step that forms first epitaxial film has with grow on the first type surface of silicon substrate first process conditions of first epitaxial film of first speed of growth.The step that forms second epitaxial film has with grow on the first type surface of silicon substrate second process conditions of second epitaxial film of second speed of growth.Second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

In said method, because halide gas is used to form first epitaxial film, therefore first epitaxial film in groove does not have hole substantially.And, because second speed of growth of second epitaxial film is big than first speed of growth of first epitaxial film, thus improved device the complete production time, be manufacturing time.Therefore, the surface of planarization device simply.

According to the second aspect of present disclosure, the method for making semiconductor device may further comprise the steps: form groove on the first type surface of silicon substrate; In groove, form epitaxial film with mist, thereby fill this groove with epitaxial film by use silicon source gas and halide gas.In forming the step of epitaxial film, on the first type surface of silicon substrate, do not form epitaxial film, and finish the step of formation epitaxial film at grade the time when the first type surface of the top surface of the epitaxial film in the groove and silicon substrate.

In said method, because halide gas is used to form epitaxial film, therefore the epitaxial film in groove does not have hole substantially.And, the surface of planarization device simply.

According to the third aspect of present disclosure, the method for making semiconductor device may further comprise the steps: the mask that is formed for groove on the first type surface of silicon substrate; The first type surface of the opening etched silicon substrate by passing this mask forms groove on the silicon substrate first type surface; In the groove of silicon substrate, form epitaxial film by the mist that uses silicon source gas and halide gas, thereby fill this groove with epitaxial film with mask; And after the step that forms epitaxial film, remove this mask.In forming the step of epitaxial film, on mask, do not form epitaxial film, and finish the step of formation epitaxial film at grade the time when the first type surface of epitaxial film top surface in the groove and silicon substrate.

According to the fourth aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: the mask that is formed for groove on the first type surface of silicon substrate; On the first type surface of silicon substrate, form groove by the first type surface that passes the mask open etched silicon substrate; In having the silicon substrate groove of mask, form epitaxial film by the mist that uses silicon source gas and halide gas, thereby use the epitaxial film filling groove, wherein epitaxial film is not formed on the mask, and when the top surface of epitaxial film in the groove is higher than the first type surface of silicon substrate, finish the step that forms epitaxial film; By using mask to come epitaxial film surface on the polished silicon substrate main surface side, thereby the main surface side of silicon substrate is flattened as polishing stop layer; And after the step on polishing epitaxial film surface, remove this mask.

According to the 5th aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: the mask that is formed for groove on the first type surface of silicon substrate; On the silicon substrate first type surface, form groove by the first type surface that passes the mask open etched silicon substrate; On mask He in the groove, form epitaxial film by the mist that uses silicon source gas and halide gas, thereby use the epitaxial film filling groove; By using mask to polish epitaxial film surface on the main surface side of silicon substrate as polishing stop layer, thus the main surface side of planarization silicon substrate; And after the step on polishing epitaxial film surface, remove this mask.

In said method, because halide gas is used to form epitaxial film, therefore this epitaxial film in groove does not have hole basically.And, the surface of planarization device simply.

According to the 6th aspect of present disclosure, epitaxial growth device comprises: a chamber; Be arranged in this chamber and the fixing chuck of silicon substrate, wherein silicon substrate has first type surface, is provided with groove on it; Be used to control first gas flow controller of the gas flow rate of silicon source gas, wherein silicon source gas be incorporated in the chamber, so that on silicon substrate, form epitaxial film; Be used to control second gas flow controller of the gas flow rate of halide source gas, wherein halide gas be incorporated in the chamber; The temperature controller that is used for the control room technological temperature; Be used for being controlled at the pressure controller of the operation pressure of chamber; The pyrometer that is used for epitaxial film surface temperature on the Control Room silicon substrate; Be used for controlling at least one master controller of first gas flow controller, second gas flow controller, temperature controller and pressure controller based on the output signal of pyrometer.Master controller switches at least one in gas flow rate, technological temperature and the operation pressure of gas flow rate, halide source gas of silicon source gas, increases the speed of growth of epitaxial film when becoming substantially constant with the output signal of box lunch pyrometer under predetermined monitoring form surface temperature.

By using said apparatus, in groove, form epitaxial film and do not have hole substantially.And, the surface of planarization device simply.

According to the 7th aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: first epitaxial film that forms first conduction type on the silicon substrate of first conduction type; Form a plurality of grooves in first epitaxial film, wherein first epitaxial film between two adjacent grooves has the width bigger than groove width; On first epitaxial film and in the groove, form second epitaxial film of second conduction type, thereby with the second epitaxial film filling groove, wherein second epitaxial film have the impurity concentration higher than first epitaxial film.The step that forms second epitaxial film comprises final step, and the mist with silicon source gas and halide gas in this step is used to form second epitaxial film.

In said method, the second epitaxial film covering groove opening of no use before with the second epitaxial film filling groove.And, because first epitaxial film between two adjacent grooves has the width bigger than groove width, therefore increased the speed of growth of second epitaxial film.

Description of drawings

In the following detailed description made from reference to the accompanying drawings, above and other objects of the present invention, feature and advantage will become more apparent.In the accompanying drawings:

Fig. 1 is the sectional view that the vertical-type trench gate mosfet is shown;

Fig. 2 A to 2C is the sectional view that explanation is used for the method for the MOSFET shown in the shop drawings 1;

Fig. 3 A to 3C is the sectional view that explanation is used for the method for the MOSFET shown in the shop drawings 1;

Fig. 4 is the schematic diagram that epitaxial growth device is shown;

Fig. 5 illustrates the curve chart that concerns between technological temperature and the growth rate ratio;

Fig. 6 is the sequential chart that the MOSFET manufacturing process is shown;

Fig. 7 A is the plane graph that wafer is shown, and Fig. 7 B is the sectional view that the wafer shown in Fig. 7 A is shown;

Fig. 8 A is the plane graph that another wafer is shown, and Fig. 8 B is the sectional view that the wafer shown in Fig. 8 A is shown;

Fig. 9 is the sectional view that explanation is moved at epitaxial growth technology Central Plains;

Figure 10 illustrates to consider that in aspect ratio be the relation between HCl standard flow rate and the epitaxial film speed of growth under 5 the situation, has or do not exist the figure of hole in epitaxial film;

Figure 11 illustrates to consider that in aspect ratio be the relation between HCl standard flow rate and the epitaxial film speed of growth under 15 the situation, has or do not exist the figure of hole in epitaxial film;

Figure 12 illustrates to consider that in aspect ratio be the relation between HCl standard flow rate and the epitaxial film speed of growth under 25 the situation, has or do not exist the figure of hole in epitaxial film;

Figure 13 is another sequential chart that the MOSFET manufacturing process is shown;

Figure 14 is the another sequential chart that the MOSFET manufacturing process is shown;

Figure 15 A and 15B are the sectional views of explanation epitaxial growth technology;

Figure 16 A to 16E is the sectional view that the other method of MOSFET is made in explanation;

Figure 17 is the sequential chart that the manufacturing process of the MOSFET shown in Figure 16 A to 16E is shown;

Figure 18 A to 18F is the sectional view that the another method of MOSFET is made in explanation;

Figure 19 is the sequential chart in the MOSFET manufacturing process shown in Figure 18 A to 18F;

Figure 20 A to 20F is the sectional view that the another method of MOSFET is made in explanation;

Figure 21 is the sequential chart that the manufacturing process of the MOSFET shown in Figure 20 A to 20F is shown;

Figure 22 A to 22E is the sectional view that the another method of MOSFET is made in explanation;

Figure 23 A to 23E is the sectional view that the another method of MOSFET is made in explanation;

Figure 24 A to 24F is as a comparison, and the sectional view of MOSFET manufacture method is described;

Figure 25 is the sequential chart that is illustrated in the manufacturing process of the MOSFET shown in Figure 24 A to 24F;

Figure 26 is the sectional view that another vertical-type trench gate mosfet is shown;

Figure 27 is the local amplification sectional view that the MOSFET shown in Figure 26 is shown;

Figure 28 A to 28D is the sectional view of the manufacture method of the MOSFET shown in explanation Figure 26;

Figure 29 A to 29D is the sectional view of the manufacture method of the MOSFET shown in explanation Figure 26;

Figure 30 A to 30C is the sectional view of Semiconductor substrate of the manufacture method of the MOSFET of explanation shown in Figure 26;

Figure 31 A and 31B illustrate the difform sectional view of groove;

Figure 32 A is the sectional view that substrate is shown, and Figure 32 B illustrates the curve chart that concerns between process time and the growth thickness; And

Figure 33 A to 33C is the sectional view that epitaxial film in the groove is shown.

Embodiment

(first embodiment)

Next the embodiment first embodiment of the present invention will be described with reference to the accompanying drawings.

Fig. 1 shows the sectional view of the longitudinal type trench gate mosfet in this Implementation Modes.

In Fig. 1, at n ⁺ Form epitaxial film 2 on the silicon substrate 1, and on this epitaxial film 2, form epitaxial film 3 as the drain region.In the epitaxial film 2 of downside, be arranged to groove 4 parallel.Groove 4 passes epitaxial film 2 and arrives n ⁺Silicon substrate 1.Epitaxial film 5 is filled in the groove 4.The conduction type of the epitaxial film 5 in groove 4 is p types, and the conduction type of the transverse area 6 of groove 4 is the n type.Thus, p type district 5 and n type district 6 are arranged alternately in a lateral direction.Thus, formed the so-called super-junction structure that the drift layer of MOSFET wherein has the p/n array structure.

In the above-mentioned epitaxial film 3 of upside, in its surface layer part, form p layer 7.The groove 8 that will be used for grid in epitaxial film 3 is arranged to parallel, and arrives epitaxial film 2.On the inner face of groove 8, form gate oxidation films 9.Polygate electrodes 10 is set on the internal direction of gate oxide film 9.n ⁺On source region 11 is formed on epitaxial film 3 with groove 8 adjacent parts in surface layer part in.And, p ⁺Contact zone, source 12 is formed in the surface layer part on the upper surface of p type epitaxial film 3.

Unshowned drain electrode is formed at n ⁺On the lower surface of silicon substrate 1, and be electrically connected to n ⁺Silicon substrate 1.And unshowned source electrode is formed on the upper surface of epitaxial film 3, and is electrically connected to n ⁺Source region 11 and p ⁺Contact zone, source 12.

Therein source voltage is arranged to earth potential and drain voltage is arranged under the situation of positive potential, come turn-on transistor as gate potential by applying predetermined positive voltage.When transistor is opened, with p layer 7 in the adjacent part of canopy oxide-film 9 in form inversion layer (inverting layer).Electronics passes this inversion layer flowing (from n in the source and between leaking ⁺ Source region 11, p floor 7, n type district 6 are to n ⁺Silicon substrate 1).Reverse bias application time (therein source voltage is arranged to earth potential and drain voltage is arranged under the situation of positive potential), depletion layer is from the pn knot part expansion in p type district 5 and n type district 6.P type district 5 and n type district 6 exhaust, and have obtained high-breakdown-voltage.

Next, by utilizing Fig. 2 A to 2C and 3A to 3C that the manufacture method of longitudinal type trench gate mosfet in this embodiment pattern is described.

At first, explanation is used in epitaxial growth equipment in this manufacturing process.Fig. 4 is the schematic diagram of epitaxial growth equipment.

Among Fig. 4, the base 31 that is used for blocking substrate (wafer) 32 is arranged on chamber 30.In substrate (wafer) 32, channel shaped is formed on the first type surface.Silicon substrate (wafer) 32 can be by lamp 33 heating.Exhaust pump 34 is connected to chamber 30.Can be with silicon source gas such as SiH ₂Cl ₂(dichlorosilane: DCS) grade, halide gas such as hydrogen chloride gas (HCl) etc. and hydrogen are incorporated in the chamber 30.And, be provided with thermometer 35, and can observe epitaxial film surface by this thermometer 35 in the epitaxial growth time.That is, can monitor in the silicon substrate 32 on the chuck base 31 in being fixed to chamber 30 surface temperature in the epitaxial film formation time.Can adjust by valve 36a and be provided to the flow velocity that is used for epitaxially grown silicon source gas in the chamber 30 as the first gas flow rate adjusting device.Can be adjusted at the flow velocity that the epitaxial growth time is provided to the halide gas in the chamber 30 by valve 36b as the second gas flow rate adjusting device.The flow velocity of hydrogen can be adjusted by valve 36c.Growth temperature in chamber 30 can be adjusted by lamp 33 by the temperature controller 37 as temperature adjustment device.Growth pressure in chamber 30 can be adjusted by the pump 34 as the growth pressure adjusting device.Thermometer 35, valve 36a, 36b and 36c, temperature controller 37 and exhaust pump 34 are connected to the controller 38 as switching device.Signal from thermometer 35 is input to controller 38, and the operation of controller 38 by-pass valve control 36a, 36b, 36c, temperature controller 37 and exhaust pump 34.

Fig. 6 shows when carrying out epitaxially grown sequential chart by the epitaxial growth device that uses Fig. 4.Fig. 6 shows the change of the speed of growth in epitaxial growth technology (speed on the silicon substrate first type surface), growth temperature, halide gas flow velocity, silicon source gas flow velocity, growth pressure, hydrogen flow rate and thermometer output.

At first, as shown in Fig. 2 A, preparation n ⁺Silicon substrate 1, and at this n ⁺Form n type epitaxial film 2 on the silicon substrate 1.And, the upper surface of epitaxial film 2 is carried out planarization.

Subsequently, as shown in Fig. 2 B, by using mask n type epitaxial film 2 is used anisotropic etching (RIE) or the wet etching of alkaline anisotropic etching solution (KOH, TMAH etc.), and form the groove 4 that arrives silicon substrate 1.Thus, by n ⁺The first type surface 2a of the silicon substrate that silicon substrate 1 and epitaxial film 2 constitute goes up and forms groove 4.For example, groove 4 approximately has the degree of depth of width and the 13 μ m of 0.8 μ m.

At this, with reference to employed substrate.As shown in Figure 7A and 7B, Si (110) substrate is used as single crystalline substrate, and uses the structure that on this Si (110) substrate, is formed with epitaxial film 40.Thus, trench bottom surfaces is (110) face, and (111) face is included on the side of groove 41.By using this orientation, the Yanzhong filling shape becomes the most excellent outside the trench fill of using LP-CVD, and can carry out imporous trench fill epitaxial growth and improve output.And, the groove that Si (100) substrate and (111) are orientated is set by this way, the wet treatment that can use TMAH, KOH etc. to groove.Therefore, can reduce the damage of grooved surface for the situation of using dry etching.

In addition, as shown in Figure 8A and 8B, Si (100) substrate is used as single crystalline substrate, and uses the structure that on this Si (100) substrate, is formed with epitaxial film 50.Thus, trench bottom surfaces is (100) face, and (100) face is included on the side of groove 51.The most excellent (100) orientation groove is Si (100) aspect device property, and the orientation of the groove side surface by the p/n row is set to Si (100) and makes all orientations all become Si (100).Thus, in carrying out the trench fill epitaxial growth, in groove, removed the dependence of orientation.

As shown in Fig. 2 c, then epitaxial film 20 is formed on the epitaxial film 2 of the inside that comprises groove 4 (on the first type surface 2a), and the inside of groove 4 is filled by this epitaxial film 20.At this moment, in Fig. 6, begin growth in the t1 time.Particularly, the indoor temperature that raises, and the halide gas of mobile aequum, and the silicon source gas of mobile aequum.And pressure reduces environment and is set to indoor film formation pressure, and makes flow hydrogen gas.For example, with SiH ₂Cl ₂(dichlorosilane: DCS) as silicon source gas, and the gas that will be mixed with hydrogen chloride (HCl) comes the inside of filling groove 4 as halide gas by low pressure epitaxial growth.In this case, as shown in Figure 9, as the characteristic (behavior) of element (chlorine atom 61 and silicon atom 62) about being formed at the groove in the epitaxial film 60, chlorine atom (Cl atom) 61 adheres on the silicon face in the groove opening part.Thus, silicon is partly grown from channel bottom.

In Fig. 6, as the typical growth condition of filling extension be, growth temperature is 960 ℃, growth pressure is set to 40Torr, and the flow velocity of DCS is 0.1slm, hydrogen (H ₂) flow velocity be 30slm, the flow velocity of hydrogen chloride gas (HCl) is 0.5slm.The speed of growth on this condition lower groove surface (substrate main surface) is about tens to 100nm/min.

Filling in the technology of these groove 4 inside by epitaxial film 20, the mist of silicon source gas and halide gas is as the gas that is provided to silicon substrate, so that form epitaxial film 20.Particularly, with monosilane (SiH ₄), disilane (Si ₂H ₆), dichlorosilane (SiH ₂Cl ₂), trichlorosilane (SiHCl ₃) and silicon tetrachloride (SiCl ₄) in a kind of as silicon source gas.Especially, preferably with monosilane, disilane, a kind of in dichlorosilane and the trichlorosilane as silicon source gas.With hydrogen chloride (HCl), chlorine (Cl ₂), fluorine (F ₂), chlorine trifluoride (ClF ₃), a kind of in hydrogen fluoride (HF) and the hydrogen bromide (HBr) as halide gas.

On the other hand, during epitaxial film 20 in forming Fig. 2 C (when carrying out epitaxial growth), following content is set according to the aspect ratio of groove.

When the aspect ratio of groove less than 10 and the standard flow rate of halide gas be set to X[slm] and the speed of growth be Y[μ m/ minute] time, satisfy following relation.

Y＜0.2X+0.1 (F1)

When the aspect ratio of groove is 10 or bigger and less than 20, and the standard flow rate of halide gas is set to X[slm] and the speed of growth be Y[μ m/ minute] time, satisfy following relation.

Y＜0.2X+0.05 (F2)

When the aspect ratio of groove is 20 or bigger, and the standard flow rate of halide gas is set to X[slm] and the speed of growth be Y[μ m/ minute] time, satisfy following relation.

Y＜0.2X (F3)

Thus, from suppress the viewpoint that hole produces simultaneously with the effective filling groove of epitaxial film, it is preferred.

In Figure 10,11 and 12, illustrated as its basic result of the test.In Figure 10,11 and 12, with the standard flow rate X[slm of hydrogen chloride] be arranged on the axis of abscissa, and with speed of growth Y[μ m/ minute] be arranged on the Y axis Y.Figure 10 shows wherein, and aspect ratio is the situation of " 5 ".Figure 11 shows wherein, and aspect ratio is the situation of " 15 ".Figure 12 shows wherein, and aspect ratio is the situation of " 25 ".In Figure 10,11 and 12, black circle illustrates and has hole, does not have hole and enclose to illustrate in vain.In each width of cloth of these figure, be well known that, if the standard flow rate of hydrogen chloride increases, even when the speed of growth of epitaxial film is very fast, also can not produce hole.And, also be well known that, when hydrogen chloride is the identical standard flow velocity,, then may not prevent the generation of hole if, do not reduce the epitaxial film speed of growth along with aspect ratio increases.In each width of cloth of these figure, the formula that the border that hole produce to exist is shown is Y=0.2X+0.1 among Figure 10 and the Y=0.2X+0.05 among Figure 11, and the Y=0.2X among Figure 12.If it is the zone under each formula, then can not produce hole.As shown in Fig. 2 B, the aspect ratio of groove is B/A, i.e. the width of the degree of depth/groove of groove.

And, determine to form under the condition epitaxial film 20 in reaction speed.Especially, when with monosilane or disilane during as silicon source gas, the upper limit of film formation temperature is set to 950 ℃.When dichlorosilane was used as silicon source gas, the upper limit of film formation temperature was set to 1100 ℃.When trichlorosilane was used as silicon source gas, the upper limit of film formation temperature was set to 1150 ℃.When silicon tetrachloride was used as silicon source gas, the upper limit of film formation temperature was set to 1200 ℃.Thus, tentatively confirmed under the situation that does not produce crystal defect, to carry out epitaxial growth.

When finishing the filling of the epitaxial film 20 in groove 4 thus, as shown in Fig. 3 A, by the epitaxial growth that is used for planarization epitaxial film 21 is formed on epitaxial film 20 subsequently.That is,, formed the step difference that this groove causes when by using silicon source gas and halide gas when channel bottom is partly filled epitaxial growth.Consider glossing, wish the planarization substrate main surface, reducing polished amount, and after the trench fill extension, be used for the epitaxial growth of planarization.Yanzhong outside this planarization, Yanzhong outside than trench fill under the growth of the speed of growth of epitaxial film 20 fast growths on the substrate main surface 2a, is carried out film and is formed.Particularly, in Fig. 6, the film formation condition of at least one in the change (VIA) to (VIAD).

(VIA) with in the growth temperature of filling the extension time compare, this growth temperature has risen.

(VIB) mobile halide gas is perhaps compared the flow velocity that has reduced halide gas with the filling epitaxial growth time.

(VIC) compare the flow velocity that has increased silicon source gas with the filling epitaxial growth time.

(VID) compare the growth pressure that raise with the filling epitaxial growth time.

Thus, as shown in Fig. 6 (VIE), can therein aspect the planarization extension, under the fireballing condition of silicon growth on first type surface (plane) 2a of

silicon substrate

1,2, it be provided with.

At this, can be therein than in the planarization epitaxy technique, under the condition of the fast growth of the epitaxial film 20 on the first type surface 2a of

silicon substrate

1,2, carry out film and form.Therefore, when after having stopped the filling epitaxial growth, it being switched to the planarization epitaxial growth, two or more parameters at least in the flow velocity of halide gas, the flow velocity of silicon source gas, growth temperature and the growth pressure in the relevant parameter also can be switched simultaneously, so that obtain high speed of growth condition.

And, the finishing of detection trench fill as described below.

During filling groove, can not change the output valve of thermometer, when the output of monitoring temperature meter and during epitaxial growth shown in the time t2 of Fig. 6.The controller 38 of Fig. 4 detect this time the t2 place trench fill finish, and proceed to the switching of the condition that is used to increase the speed of growth.Promptly, monitor in thermometer 35 from the main surface side of silicon substrate 32 and to be filled in the surface temperature of the epitaxial film in the groove and not change time point place at the level output signal of scheduled measurement temperature thermometer 35, controller 38 passes through valve 36a (the first gas flow rate adjusting device) as switching device, valve 36b (the second gas flow rate adjusting device), in temperature controller 37 (temperature adjustment device) and the pump 34 (growth pressure adjusting device) at least one, control the flow velocity of silicon source gas, the flow velocity of halide gas, in growth temperature and the growth pressure at least one, and proceed to the switching of the condition that is used to increase the speed of growth.

Fig. 5 shows the measurement result with the epitaxial growth velocity correlation.In Fig. 5, temperature is arranged on the transverse axis, and speed of growth ratio is arranged on the longitudinal axis.Fig. 5 shows situation that dichlorosilane is only arranged and the situation of growing by the mist that uses dichlorosilane and hydrogen chloride.Be appreciated that from this Fig. 5 the speed of growth is faster than the speed of growth under the situation of growing by the mist that uses dichlorosilane and hydrogen chloride under by the situation of only growing with dichlorosilane.And, be appreciated that under the situation of higher temperature, to promote growth.

Yanzhong outside planarization, when growth temperature changes to pressure 990 ℃ and this chamber when 40Torr is changed to 80Torr from 960 ℃, typical growth speed is a few μ m/min.Therefore, when the thickness of the epitaxial film that is used for planarization is set to 3 μ m, when the extension (using the hybrid epitaxy of HCl) used with the trench fill conditional likelihood that obtains above-mentioned tens to 100nm/min the speed of growth, its cost 30 minutes (=3[μ m]/0.1[μ m/min]).Yet, this time can foreshorten to 3 minutes (=3[μ m]/1[μ m]/min]).Therefore, can improve the output of epitaxy technique.

When stopping the planarization epitaxial growth, the upper face side of the epitaxial film 21 from Fig. 3 A carries out the planarization polishing.It is the epitaxial film 21,20 of polished substrate first type surface 2a.As shown in Fig. 3 B, expose epitaxial film (n type silicon layer) 2 by this polishing.Thus, p type zone 5 and n type zone 6 are arranged alternately in a lateral direction.Can polish as required.

As shown in Fig. 3 C, on epitaxial film 2, form p then ^-Type epitaxial film 3.And, as shown in fig. 1, form p trap layer 7, groove 8, gate oxidation films 9, polygate electrodes 10, n ⁺Source region 11 and p ⁺Contact zone, source 12.And, form electrode and wiring.

Next, in this manufacturing process, the epitaxial film shown in further explanatory drawings 2C and the 3A is formed technology.

Figure 24 A to 24F shows the flow chart making of the comparative example that is used to replace Fig. 2 A to 2C and Fig. 3 A to 3C.Figure 25 is the sequential chart that is used to replace the comparative example of Fig. 6.

As shown in Figure 24 A, n type epitaxial film 101 is formed on n ⁺On the silicon substrate 100.As shown in Figure 24 B, form groove 102 by etching to n type epitaxial film 101.As shown in Figure 24 C and 24D, form epitaxial film 104 by the trench fill extension of using silicon source gas and halide gas.As shown in Figure 24 E, form epitaxial film 105 by carrying out the planarization extension.As shown in Figure 24 F, polish epitaxial film 104,105 then.Thus, can partly carry out selective growth as the silicon source gas of DCS etc. with as the halide gas of HCl etc. from channel bottom by flowing simultaneously, so that realize imporous trench fill extension.Owing to use halide gas, therefore the selective growth from the channel bottom part becomes principal element, this be because can be suppressed on the substrate main surface especially and the groove opening part in silicon growth.

In this substrate manufacturing process, determine to carry out under the condition film in the reaction speed of low temperature and form, so that carry out imporous trench fill extension.And, using selective epitaxial, this selective epitaxial uses halide gas such as HCl etc.When by using this trench fill condition to carry out delaying time outside the planarization, the speed of growth is slow, so that the output variation.And owing to used the selective growth that utilizes silicon source gas and halide gas, therefore, by because the adhesion effect that causes of the halogen on substrate main surface as shown in Figure 9, the speed of growth is little.And, must be by reducing the output that polished amount improves no glossing or glossing.

In contrast to this, in this embodiment pattern, be provided with following structure.

Different with the trench fill epitaxy technique, the Yanzhong needs selectivity outside planarization.Therefore, do not need the film formation condition as since the film that reduces under the diffusion qualifications that the film formation temperature causes form and because the silicon growth restriction in the groove opening part that halide gas causes.Therefore, as planarization extension condition, for example, stop to provide HCl gas and the film formation condition is switched to supply qualifications etc. from the diffusion qualifications.Thus, shorten the required film formation time in the outer Yanzhong of planarization, and can improve the output of groove epitaxy technique.

According to the foregoing description pattern, can obtain following effect.

(1), first technology, second technology and the 3rd technology are set as the manufacture method of Semiconductor substrate.In first technology, on the first type surface 2a of silicon substrate 1,2, form groove 4.In second technology, by the epitaxial growth that is caused by the mist that silicon source gas and halide gas are provided, on the first type surface of silicon substrate 1,2, comprise that the inside of groove 4 forms epitaxial film 20, and the inside of groove 4 is filled by epitaxial film 20.In the 3rd technology, be used on the epitaxial film 20 that second technology is filled forming epitaxial film 21, so that carry out planarization under the condition of the fast growth of epitaxial film 20 on than the first type surface 2a of silicon substrate in second technology 1,2.Therefore, in second technology, by the epitaxial growth that causes by the mist that silicon source gas and halide gas are provided, on the first type surface 2a of silicon substrate 1,2, comprise that the inside of groove 4 forms epitaxial film 20.Then, the inside of groove 4 is filled by epitaxial film 20.In the method, by providing halide gas to suppress the hole of the outer Yanzhong of trench fill.And, in the 3rd technology, than in second technology, on the epitaxial film 20 of the filling that is being used for second technology under the condition of the fast growth of epitaxial film 20 on the first type surface 2a of silicon substrate 1,2, forming epitaxial film 21, thereby improved output.And, can polishing be set to not necessarily.After by the epitaxial film filling groove, can easily carry out planarization thus, suppress the hole of the outer Yanzhong of trench fill simultaneously substrate.

(2) in the 3rd technology, in than second technology, on the first type surface 2a of

silicon substrate

1,2, form after the epitaxial film 21 under the condition of the fast growth of epitaxial film 20, the epitaxial film 20,21 on the first type surface 2a side of

silicon substrate

1,2 is polished.Thus, can further carry out planarization.

In (3) the 3rd technologies, carry out in the following content, so that in than second technology, under the condition of the fast growth of epitaxial film 20 on the first type surface 2a of

silicon substrate

1,2, form epitaxial film 21.

(A) compare with the epitaxial growth time in second technology, the epitaxial growth in the 3rd technology has reduced the flow velocity of halide gas during the time.

(B) halide gas is set to epitaxial growth in the 3rd technology and does not flow during the time.

(C) compare with the epitaxial growth time in second technology, in the 3rd technology, increase the flow velocity of silicon source gas during the time in epitaxial growth.

(D) compare the epitaxial growth growth temperature that raise during the time in the 3rd technology with the epitaxial growth time in second technology.

(E) compare the epitaxial growth growth pressure that raise during the time in the 3rd technology with the epitaxial growth time in second technology.

(4) efficient is good when the epitaxial growth of second technology and the 3rd technology is all carried out in pressure reduction CVD.

(5) in the 3rd technology, in than second technology, under the condition of the fast growth of epitaxial film 20 on the first type surface 2a of

silicon substrate

1,2, form epitaxial film 21.Therefore, when switching to the epitaxial growth in the 3rd technology after the epitaxial growth in having stopped second technology, switch simultaneously in the relevant parameter in flow velocity, growth temperature and the growth pressure of flow velocity, silicon source gas of halide gas at least two or more so that obtain high speed of growth condition.Thus, can further improve output.

(6) in second technology, monitor the surface temperature that is used for being filled into the epitaxial film 20 of groove 4 by thermometer 35 from the first type surface 2a side of silicon substrate 1,2.At the time point place of the level output signal that does not change thermometer 35 under the scheduled measurement temperature, it is switched to the condition of the speed of growth that is used for increasing the 3rd technology.Thus, can detect finishing of filling extension reliably.

(7) chuck base 31, the first gas flow rate adjusting device 36a, the second gas flow rate adjusting device 36b, temperature adjustment device 37, pressure regulation device 34, thermometer 35 and switching device 38 are set to epitaxial growth device.Chuck base 31 is arranged in the chamber 30, and fixing wherein channel shaped is formed in the silicon substrate 32 on the first type surface.First-class velocity modulation engagement positions 36a adjusts and is provided to the flow velocity that is used for epitaxially grown silicon source gas in the chamber 30.The second gas flow rate adjusting device 37 is adjusted at the flow velocity that the epitaxial growth time is provided to the halide gas in the chamber 30.The growth temperature that temperature adjustment device 37 is adjusted in the chamber 30.The growth pressure that pressure regulation device 34 is adjusted in the chamber 30.Surface temperature in the silicon substrate 32 on the chuck base 31 of thermometer 35 monitoring in being fixed to chamber 30 during the epitaxial film formation time.In switching device 38, the surface temperature that is filled into the epitaxial film in the groove is monitored from the main surface side of silicon substrate 32 by thermometer 35.At the time point t2 place of the level output signal that does not change thermometer 35 under the scheduled measurement temperature, switching device 38 is controlled at least one in flow velocity, growth temperature and the growth pressure of flow velocity, halide gas of silicon source gas by in the first gas flow rate adjusting device 36a, the second gas flow rate adjusting device 36b, temperature adjustment device 37 and the pressure regulation device 34 at least one.Switching device 38 proceeds to the switching of the condition that is used to increase the speed of growth then.

Therefore, can control filling extension and planarization extension subsequently automatically.

Epitaxial growth in second technology can reduce the CVD growing method by pressure and carry out, and also can carry out epitaxial growth in the 3rd technology by the atmospheric pressure cvd growing method.

And, during filling epitaxial growth (during the epitaxial growth of second technology) also can progressively adjust at least one in the relevant parameter in flow velocity, growth temperature and the growth pressure of flow velocity, silicon source gas of halide gas continuously, so that obtain high as shown in Figure 13 speed of growth condition, perhaps also can adjust, to obtain high as shown in Figure 14 speed of growth condition with stairstepping.In these growth parameter(s)s, also can change a parameter, also can make up a plurality of parameters.

Thus, when the aspect ratio of trench fill starting stage as shown in Figure 15 A is high, reduced the speed of growth (high selectivity film formation condition) of filling extension.When aspect ratio hour, as shown in Figure 15 B, this speed of growth can increase.Thus, can shorten the time required in the filling.That is, in the trench fill extension time, also the film formation condition that can adapt by the change of aspect ratio in the filling epitaxy technique of change and groove improves the output of whole groove epitaxy technique.

(the second embodiment pattern)

Next, will mainly the second embodiment pattern be described by difference with the first embodiment pattern.

Figure 16 A to 16E shows the flow chart making in this embodiment pattern that replaces Fig. 2 A to 2C and 3A to 3C.Figure 17 is the sequential chart that replaces this embodiment pattern of Fig. 6.

As shown in Figure 16 A, on silicon substrate 70, form epitaxial film 71, and it is set to silicon substrate.As shown in Figure 16 B, the first type surface 71a that groove 72 is formed at

silicon substrate

70,71 goes up (first technology).

Afterwards, as shown in Figure 16 C,, only form epitaxial film 73 in the inside of groove 72 by the epitaxial growth that causes by the mist that silicon source gas and halide gas are provided, and this epitaxial film of on the first type surface 71a of

silicon substrate

70,71, not growing.At this moment, as shown in Figure 17,, increase the flow velocity of halide gas or reduce the extension condition that growth temperature can be provided with the outer Yanzhong of trench fill high selectivity by comparing with the comparative example of Figure 25.73 of epitaxial films be grown in groove 72 inside and on the first type surface 71a of

silicon substrate

70,71 growth this epitaxial film.Especially, grow from trench bottom surfaces.As shown in Figure 16 D and 16E, come filling groove 72 to have the face (second technology) identical with the first type surface 71a of

silicon substrate

70,71 up to this epitaxial film 73 by epitaxial film 73.

Thus, in second technology, by the epitaxial growth that causes by the mist that silicon source gas and halide gas are provided, only at groove 72 growth inside epitaxial films 73, and this epitaxial film of on the first type surface 71a of

silicon substrate

70,71, not growing.And, come filling groove 72 to have the identical face of first type surface 71a with

silicon substrate

70,71 by epitaxial film 73 until epitaxial film 73.In this is filled, can suppress hole in the trench fill epitaxial loayer by halide gas is provided.Therefore, owing on first type surface 71a, do not form film, therefore can omit glossing (polishing can be arranged to optional).Thus, after by the epitaxial film filling groove, can easily carry out planarization, suppress the hole in the trench fill epitaxial loayer simultaneously substrate.

(the 3rd embodiment pattern)

Next, will mainly the 3rd embodiment pattern be described by difference with the first embodiment pattern.

Figure 18 A to 18F shows the flow chart making in this embodiment pattern of replacing Fig. 2 A to 2C and Fig. 3 A to 3C.Figure 19 is the sequential chart in this embodiment pattern of replacing Fig. 6.

As shown in Figure 18 A, construct silicon substrate by on silicon substrate 80, forming epitaxial film 81.As shown in Figure 18 B, the mask 82 that will be used to form groove then is arranged on the first type surface 81a of silicon substrate 80,81.Form groove 83 (the 3rd technology) by the mask open part 82a etched silicon substrate 81 that is used to form groove from mask 82.Silicon oxide film is used as mask 82.

Afterwards, as shown in Figure 18 C and 18D, by keeping under the state of mask 82, only at the growth inside epitaxial film 84 of groove 83 by the low pressure epitaxial growth that mist caused that silicon source gas and halide gas are provided.And, as shown in Figure 18 E, come filling groove 83 by epitaxial film 84, have the face (second technology) identical up to epitaxial film 84 with the first type surface 81a of silicon substrate 80,81.That is, as shown in Figure 19, under the situation of Figure 25, on substrate main surface, carry out film and form.Yet, in this embodiment pattern, by utilizing silicon (Si) and silicon oxide film (SiO ₂) about the selectivity of film formation condition, in groove 83, fill, and not on substrate main surface 81a (on the oxide-film) grow.In this is filled,, halide gas suppresses hole in the trench fill epitaxial loayer by being provided.

As shown in Figure 18 F, remove mask 82 (the 3rd technology).

Thus, in this embodiment pattern, owing on first type surface 81a, do not form film, therefore can omit glossing (can polishing be set to unessential).Thus, after by the epitaxial film filling groove, can easily carry out planarization, suppress the hole in the trench fill epitaxial loayer simultaneously substrate.

(the 4th embodiment pattern)

Next will mainly the 4th embodiment pattern be described by difference with the first embodiment pattern.

Figure 20 A to 20F shows the flow chart making in this embodiment pattern of replacing Fig. 2 A to 2C and 3A to 3C.Figure 21 is the sequential chart that replaces in this embodiment pattern of Fig. 6.

As shown in Figure 20 A, epitaxial film 91 is formed on the silicon substrate 90, and constitutes silicon substrate.As shown in Figure 20 B, on the first type surface 91a of

silicon substrate

90,91, be provided for forming the mask 92 of groove then.Form groove 93 (first technology) by the mask open part 92a etched silicon substrate 91 that from mask 92, is used to form groove then.Silicon oxide film is used as mask 92.

Afterwards, as shown in Figure 20 C, kept therein under the state of mask 92, by the low pressure epitaxial growth that causes by the mist that silicon source gas and halide gas are provided, only at the growth inside epitaxial film 94 of groove 93.And, as shown in Figure 20 D, become than the surface high (second technology) of the mask 92 that is used to form groove up to epitaxial film 94 by epitaxial film 94 filling grooves 93.That is, as shown in Figure 21,, on mask 92, do not grow by utilizing the selective epitaxy condition of using silicon source gas and halide gas.In this is filled,, halide gas suppresses hole in the trench fill epitaxial loayer by being provided.

And, as shown in Figure 20 E, come the epitaxial film 94 of the first type surface 91a side of

polished silicon substrate

90,91 as stopping layer by using mask 92, and with

silicon substrate

90,91 first type surface 91a side planarizations (the 3rd technology).At this moment, utilize mask (oxide-film) 92 to polish as terminal point.In this case, compare with the situation of wherein polishing whole silicon face, polishing area is the extension fill area.Therefore, owing to reduced polished amount, thereby can improve output.And, owing to determine polishing deviation (dispersion), therefore also can improve the uniform film thickness characteristic of p/n row layer in face by the film thickness deviation (thickness dispersion) of mask (oxide-film) 92.

Subsequently, remove mask 92 (the 4th technology).As shown in Figure 20 F, the first type surface 91a side oxidation of

silicon substrate

90,91 as sacrifice layer, and is removed this sacrificial oxidation film so that be flattened better.Can carry out the removal of sacrifice layer oxidation and sacrificial oxidation film as required.

Thus, in this embodiment pattern, after by the epitaxial film filling groove,, suppress the hole in the trench fill epitaxial loayer simultaneously by using mask can reduce polished amount and can easily carry out planarization to substrate as stopping layer.

(the 5th embodiment pattern)

Next, will mainly the 5th embodiment pattern be described by difference with the 4th embodiment pattern.

Figure 22 A to 22E shows the flow chart making in this embodiment pattern.

Shown in Figure 20 A, on silicon substrate 90, form epitaxial film 91 as previously mentioned.As shown in Figure 20 B, the mask 92 that is used to form groove is arranged on the first type surface 91a of silicon substrate 90,91.Form groove 93 (first technology) by the mask open part 92a etched silicon substrate 91 that from mask 92, is used to form groove.

As shown in Figure 22 A, 22B and 22C, kept therein under the state of mask 92, on the mask 92 that comprises groove 4 inside, carry out film by the epitaxial growth that causes by the mist that silicon source gas and halide gas are provided and form, and by epitaxial film 95 filling grooves 93 (second technology).In the method, by providing halide gas to suppress hole in the trench fill epitaxial loayer.At this moment, the film on mask 92 can be film (single crystal film) 96 that forms monocrystalline and the film (polycrystalline film) 97 that forms polycrystalline, as shown in Figure 23 C.That is, when increasing the epitaxially grown film thickness of trench fill, final structure is the ratio of halide gas and silicon source gas and different according to selectivity.When selectivity is high (when the flow velocity of halide gas increases), monocrystalline is grown on mask (oxide-film) 92.In contrast to this, when selectivity is low (when HCl hour), polycrystalline silicon growth is on whole of mask (oxide-film) 92 or a part.Thus, in second technology, by by the epitaxial growth that mist caused that silicon source gas and halide gas are provided, the film 96 of monocrystalline can be formed on the mask, and the film 97 of polycrystalline also can be formed on the mask.

Afterwards, as shown in Figure 22 D and 23D, utilize mask 92 as stopping the film (

film

95,96 of Figure 22 C and the

film

95,97 of Figure 23 C) that layer polishes mask 92 upsides.The first type surface 91a side (the 3rd technology) of

planarization silicon substrate

90,91 then.

Subsequently, as shown in Figure 22 E, remove mask 92 (the 4th technology).Afterwards, the first type surface 91a side oxidation of

silicon substrate

90,91 as sacrifice layer, and is removed this sacrificial oxidation film, so that by planarization better.Can carry out the removal of sacrificial oxide layer and sacrificial oxidation film as required.

Thus, in this embodiment pattern, after by the epitaxial film filling groove,, suppress the hole in the trench fill epitaxial loayer simultaneously by using mask can easily carry out planarization to substrate as stopping layer.In second to the 5th embodiment pattern, as illustrated in first Implementation Modes, the trench aspect ratios according at trench fill extension time place preferably satisfies Y＜0.2X+0.1, Y＜0.2X+0.05 and Y＜0.2X.And, preferably in halide gas use a kind of in hydrogen chloride, chlorine, fluorine, chlorine trifluoride, hydrogen fluoride and the hydrogen bromide, and in silicon source gas preferred use monosilane, disilane, a kind of in dichlorosilane and the trichlorosilane.And in groove, the bottom surface is (110) face, and (111) face is included on the side.Otherwise in groove, preferred bottom surface is (100) face, and (100) face is included on the side.

In the explanation of being done so far, n type epitaxial film is formed on n ⁺In the substrate, and groove is formed on its first type surface (top), and with this n type epitaxial film as silicon substrate.Yet the present invention also can be applicable to groove wherein and is formed directly into situation in the body substrate.

(the 6th embodiment pattern)

Figure 26 shows the sectional view of longitudinal type trench gate mosfet in this embodiment pattern.Figure 27 is the enlarged drawing of major part in the componentry among Figure 26.

In Figure 27, at n ⁺ Form epitaxial film 2 on the silicon substrate 1, and on this epitaxial film 2, form epitaxial film 3 as the source region.Groove 4 is configured to parallel in the epitaxial film 2 of bottom side.Groove 4 passes epitaxial film 2 and arrives n ⁺Silicon substrate 1.Epitaxial film 5 is filled in the groove 4.The conduction type of the epitaxial film 5 in the groove 4 is p types, and the conduction type of the transverse region 6 of groove 4 is n types.Thus, p type district 5 and n type district 6 are arranged alternately in a lateral direction.Thus, formed the so-called super-junction structure that the drift layer of MOSFET wherein has the p/n array structure.

In the epitaxial film 3 of above-mentioned upside, in its surface layer part, form p trap layer 7.The groove 8 that will be used for the canopy utmost point in epitaxial film 3 is arranged to parallel, and forms it into darker than p trap layer 7.Gate oxidation films 9 is formed on the inside face of groove 8.Polygate electrodes 10 is arranged on the internal direction of gate oxidation films 9.n ⁺Source region 11 be formed on the upper surface of epitaxial film 3 with the adjacent part of groove 8 in surface layer part in.And, p ⁺Contact zone, source 12 is formed in the surface layer part on the upper surface of p type epitaxial film 3.Each groove 8 in epitaxial film 3 p trap layer 7 and above epitaxial film 2 (drift layer) between all formed n ^-Buffering area 13.This n ^-Buffering area 13 comprises the bottom surface portions of groove 8 and adjacent with the n type district 6 in the drift layer, also adjacent with p trap layer 7.And, at the n of each groove 8 ^-Form p between the buffering area 13 ^- District 14.

Unshowned drain electrode is formed on n ⁺On silicon substrate 1 following, and be electrically connected to n ⁺Silicon substrate 1.And unshowned source electrode is formed on epitaxial film 3 top, and is electrically connected to n ⁺Source region 11 and p ⁺Contact zone, source 12.

Source voltage is set to earth potential and drain voltage is set under the state of positive potential therein, comes turn-on transistor by applying predetermined positive voltage as gate potential.When transistor is opened, with p trap layer 7 in the adjacent part of gate oxidation films 9 in form oppositely layer.Oppositely layer is mobile (from n between source and leakage to make electronics pass through this ⁺ Source region 11, p trap layer 7, n ^-Buffering area 13, n type district 6 to n ⁺Silicon substrate 1).At reverse bias application time (source voltage be set to earth potential and drain voltage is set under the state of positive potential) therein, depletion layer is from pn knot part, the n in p type district 5 and n type district 6 ^- Buffering area 13 and p ^-The pn knot part and the n in district 14 ^-The pn knot part expansion of buffering area 13 and p trap layer 7.P type district 5 and n type district 6 are depleted, and obtain high withstand voltage.

On the other hand, in Figure 26, n type district 6 and p type district 5 also are arranged alternately in a lateral direction in the terminal part around the componentry.And, form locos oxide film 15 at the componentry from epitaxial film 3 upper surfaces on the peripheral side.

Next, with the manufacture method of longitudinal type trench gate mosfet in this embodiment pattern of explanation.

At first, as shown in Figure 28 A, preparation n ⁺Silicon substrate 1, and at this n ⁺Form n type epitaxial film 2 on the silicon substrate 1.A plurality of then grooves 220 are formed in the epitaxial film 2 in the chip periphery part, and silicon oxide film 221 is filled in this groove 220.And, the upper surface of epitaxial film 2 is carried out planarization.

Subsequently, as shown in Figure 28 B, on n type epitaxial film 2, form silicon oxide film 222, and it is patterned as reservation shape, so that obtain predetermined groove for this silicon oxide film 222.Utilize silicon oxide film 222 to come n type epitaxial film 2 is carried out anisotropic etching (RIE) or uses the wet etching of alkaline anisotropic etching solution (KOH, TMAH etc.), and form the groove 4 that arrives silicon substrate 1 as mask.At this moment, form a plurality of grooves 4, so that the interval Lt between the adjacent trenches is greater than groove width Wt.

Groove can have banded figure and point-like (square, hexagon etc.) figure, and groove to have a cyclophysis just enough.

Subsequently, as shown in Figure 28 C, remove silicon oxide film 222 as mask.And, after removing, preferably carry out hydrogen annealing as the oxide-film 222 of mask.As shown in Figure 28 D, on this n type epitaxial film 2 of the inner surface that comprises groove 4, form p type epitaxial film 223, by the inside of these epitaxial film 223 filling grooves 4 with concentration higher than the impurity concentration of n type epitaxial film 2.In the technology of the inside of filling these grooves 4 by epitaxial film 223, with the mist of silicon source gas and halide gas as the gas that is provided to silicon substrate, to form epitaxial film 223.By using this hybrid epitaxy to carry out the positive taper growth that partly begins from channel bottom.Particularly, with monosilane (SiH ₄), disilane (Si ₂H ₆), dichlorosilane (SiH ₂Cl ₂), trichlorosilane (SiHCl ₃) and silicon tetrachloride (SiCl ₄) in a kind of as silicon source gas.Especially, preferably with dichlorosilane (SiH ₂Cl ₂), trichlorosilane (SiHCl ₃) and silicon tetrachloride (SiCl ₄) in a kind of as silicon source gas.With hydrogen chloride (HCl), chlorine (Cl ₂), fluorine (F ₂), chlorine trifluoride (ClF ₃), a kind of in hydrogen fluoride (HF) and the hydrogen bromide (HBr) as halide gas.

And, determine to form under the condition epitaxial film 223 in reaction speed.Especially, when with monosilane or disilane during as silicon source gas, the upper limit of film formation temperature is set to 950 ℃.When dichlorosilane was used as silicon source gas, the upper limit of film formation temperature was set to 1100 ℃.When trichlorosilane was used as silicon source gas, the upper limit of film formation temperature was set to 1150 ℃.When silicon tetrachloride was used as silicon source gas, the upper limit of film formation temperature was set to 1200 ℃.And when film formed vacuum degree and is set to scope from normal pressure to 100Pa, the lower limit of film formation temperature was set to 800 ℃.When forming vacuum degree, film is set to from 100Pa to 1 * 10 ^-5During the scope of Pa, the lower limit of film formation temperature is set to 600 ℃.Thus, confirmed under the situation that does not produce crystal defect, to carry out epitaxial growth experimentally.

And, Ne2 * Wt=Ne1 * Lt is set, the relation that will satisfy as the impurity concentration Ne2 of the width W t of groove 4, the impurity concentration Ne1 of interval Lt, n type epitaxial film 2 between the adjacent trenches and p type epitaxial film 223.

Afterwards, carry out planarization and polishing, and expose epitaxial film (n type silicon layer) 2, as shown in Figure 29 A from the upper surface side of epitaxial film 223.Thus, be arranged alternately p type district 5 and n type district 6 in a lateral direction.And, removed the silicon oxide film 221 (seeing Figure 28 D) in the groove 220 of chip periphery part.

As shown in Figure 29 B, on epitaxial film 2, form p then ^-Type epitaxial film 224.And, as shown in Figure 29 C, inject by ion, with p ^-Form n in the adjacent part in n type district 6 in the type epitaxial film 224 ^-Buffering area 13.At this moment, form depression 225 on the upper surface of the epitaxial film 224 in the groove 220 in being arranged on the chip periphery part.This depression 225 is used as alignment mark, and aims in position with photomask.

Subsequently, as shown in Figure 29 D, at p ^-Form p on the type epitaxial film 224 ^- Type epitaxial film 226.

Afterwards, as shown in Figure 26, form locos oxide film 15.And, in componentry, form p trap layer 7, groove 8, gate oxidation films 9, polygate electrodes 10, n ⁺Source region 11 and p ⁺Contact zone, source 12.And, form electrode and wiring.In the formation of this componentry, form n when injecting by ion ⁺Source region 11, p ⁺During contact zone, source 12 grades, form depression 227 on the upper surface of the epitaxial film 226 in the groove 220 in being arranged on Figure 29 D chips periphery.This depression 227 is aimed in position as alignment mark and with photomask.

The mist of silicon source gas and halide gas is used as the gas that is provided to

silicon substrate

1,2, so that form epitaxial film 223 after in n type epitaxial film 2, forming groove 4, until till being imbedded by epitaxial film 223 from the inside that the film of epitaxial film 223 forms beginning groove 4.Yet, in the broadest sense, by epitaxial film 223 at least in the final technology of filling groove 4 inside, can be with the mist of silicon source gas and halide gas as the gas that is provided to

silicon substrate

1,2, to form epitaxial film 223.

In this manufacturing process, will form technology by using Figure 30 A, 30B and 30C to specify the epitaxial film of imbedding shown in Figure 28 C and the 28D.

As shown in Figure 30 A, be formed on n ⁺Form groove 4 in the epitaxial film 2 on the silicon substrate 1.Afterwards, as shown in Figure 30 C, by the inside of epitaxial film 223 filling grooves 4.At this moment, as shown in Figure 30 B, as the film formation condition of epitaxial film 223, by introduce halide gas for the epitaxial film 223 of growing on groove side surface, the speed of growth in the groove opening part is set to slower than the speed of growth in the part that is deeper than this groove opening part.That is, the speed of growth in groove opening part is set to ra, and when being set to rb than the speed of growth in the dark part of this groove opening part, ra＜rb is set.

Thus,, be formed on the epitaxial film that forms in the groove, so that the thickness of groove opening part becomes littler than the thickness of channel bottom part by introducing halide gas.Thus, about the epitaxial film on the groove side surface, it is littler than the thickness of channel bottom part that the thickness of groove opening part becomes, and suppressed because stopping in the groove opening part that epitaxial film causes, and can improve and imbed characteristic (film that can not have hole forms) in the groove.That is, can guarantee super-junction structure (p/n array structure) withstand voltage at reverse bias application time (source electrode is set to earth potential and drain potential is set to positive voltage), and form the leakage current that can suppress to tie by imporous film.And, can obtain imporous formation (pore-size reduces), and the improvement of the improvement of withstand voltage dose rate and junction leakage yield.

Especially, during epitaxial film 223 in forming Figure 28 D, following content is set according to the aspect ratio of groove.

When the aspect ratio of groove less than 10, and the standard flow rate of halide gas is set to X[slm] and the speed of growth be Y[μ m/ minute] time, satisfy following relation.

Y＜0.2X+0.1 (F4)

Y＜0.2X+0.05 (F5)

Y＜0.2X (F6)

Shown in Figure 10,11 and 12 as its basic result of the test.In Figure 10,11 and 12, with the standard flow rate X[slm of hydrogen chloride] be arranged on the axis of abscissa, and with speed of growth Y[μ m/ minute] be arranged on the Y axis Y.Figure 10 shows wherein, and aspect ratio is the situation of " 5 ".Figure 11 shows wherein, and aspect ratio is the situation of " 15 ".Figure 12 shows wherein, and aspect ratio is the situation of " 25 ".In Figure 10,11 and 12, black circle illustrates and has hole, does not have hole and enclose to illustrate in vain.In each width of cloth of these figure, be well known that, if the standard flow rate of hydrogen chloride increases,, can not produce hole even during the fast growth of epitaxial film yet.And, also be well known that, when hydrogen halides is the identical standard flow velocity,, then may not prevent the generation of hole if along with the aspect ratio increase does not reduce the epitaxial film speed of growth.In each width of cloth of these figure, the formula that the border of hole generation existence is shown is Y=0.2X+0.1 and Y=0.2X+0.05 among Figure 11 and the Y=0.2X among Figure 12 among Figure 10.If it is the zone under each formula, then can not produce hole.As shown in Figure 28 C, the aspect ratio of groove is d1/Wt, i.e. the width of the degree of depth/groove of groove.

Next, the influence of open drain well width Wt by using Figure 31 A to 33C.

As shown in Figure 31 A and 31B, preparation groove width Wt is that sample and the groove width Wt of 0.8 μ m is the sample of 3 μ m.In this case, interval Lt between the groove 4 and groove width Wt with (=Wt+Lt) be constant (identical).

Then these two samples are carried out epitaxial growth.Its result is shown in Figure 32 A and the 32B.In Figure 32 A and 32B, the film formation time is arranged on the transverse axis, and growing film thickness (being at the film thickness on the substrate top surface exactly) is arranged on the longitudinal axis.In Figure 32 B, this growth thickness is measured at five some places on substrate surface.

In Figure 32 A and 32B, when its minimum value of needs when being 3 μ m with the polishing surplus of growing film thickness on guaranteeing for the longitudinal axis, the film formation time in the sample of Wt=3 μ m needs 220 minutes, to satisfy this condition.In contrast to this, the film formation time can be 60 minutes in the sample of Wt=0.8 μ m.That is, the film formation time can be set to 1/3.

Thus, as shown in Figure 33 A to 33C, form in the relation of the flow velocity of the flow velocity of gas and etching gas (halide gas) and film formation temperature at film, in groove, be easy to generate hole when the flow velocity that forms gas when film increases, the flow velocity of etching gas (halide gas) reduces and the film formation temperature raises.At this, the growth gasses amount in Figure 33 A is maximum, and the growth gasses amount among Figure 33 C is minimum.Etching gas amount among Figure 33 A is minimum, and the etching gas amount in Figure 33 C is maximum.Technological temperature in Figure 33 A is the highest, and the technological temperature in Figure 33 C is minimum.On the contrary, the flow velocity that forms gas when film reduces, the flow velocity of etching gas (halide gas) increases and film formation temperature when reducing, and is difficult to produce hole in groove.In this embodiment pattern, suppressed hole, and considered that these contents have improved the speed of growth.Be elaborated following.

As in groove, imbedding epitaxial film and forming the Semiconductor substrate manufacture method of the diffusion layer of high aspect ratio, particularly as being applied to the manufacture method that the super p/n that ties the drift layer of (SJ-MOS) is listed as, the speed of growth in hybrid epitaxy in substrate top surface and the groove opening part is little, and partly grows from channel bottom.Therefore, owing to reduced the width of base section, the growth volume of time per unit has increased, and to fill at a high speed.Therefore, as shown in Figure 31 A and 31B,, then when satisfying following three conditions, can make to form the super knot (SJ-MOS) of p/n row wherein at a high speed if column pitch (Wt+Lt) is identical.

(E), form the interval Lt between the adjacent trenches 4, so that than the big (Wt＜Lt) of groove width Wt as the groove structure condition.

(F), aspect the relation of the concentration Ne2 of the concentration Ne1 of n type epitaxial film 2 and p type epitaxial film 223, p type epitaxial film 223 is arranged to than n type epitaxial film 2 (Ne2＞Ne1) thick as filling the extension concentration conditions.

(G) as filling the extension concentration conditions, with the concentration Ne2 of p type epitaxial film 223 and the sum (sum) of groove width Wt (=Ne2 * Wt) and the sum of Lt (=Ne1 * Lt) be set to equate (Ne2 * Wt=Ne1 * Lt) at interval between the concentration Ne1 of n type epitaxial film 2 and the adjacent trenches 4.

And, about the substrate surface orientation, as shown in Figure 28 C, be set to Si (111) according to the base section selectivity characteristic groove side surface of hybrid epitaxy by using Si (110) substrate.Otherwise, be set to Si (100) by using Si (100) substrate groove side surface.Thus, it becomes good aspect filling characteristic.

According to the foregoing description pattern, can obtain following effect.

(8), first technology and second technology are set as the manufacture method of Semiconductor substrate.In first technology, form a plurality of grooves 4 in the epitaxial film 2 of the n type on the silicon substrate 1 that is formed on n type (first conduction type) (first conduction type), so that the interval Lt between the adjacent trenches 4 is greater than groove width Wt.In second technology, mist by using silicon source gas and halide gas is as the gas that is provided, the epitaxial film 223 that will have the p type (second conduction type) of the concentration higher than the impurity concentration of epitaxial film 2 is formed on this epitaxial film 2 that comprises groove 4 inside, so that the final technology of filling groove 4 forms p type epitaxial film 223 being used at least.So the inside of groove 4 is filled by p type epitaxial film 223.

Therefore, be used for the final technology of filling groove 4 at least, carrying out film by the mist that uses silicon source gas and halide gas as the gas that is provided and form, to form p type epitaxial film 223.So come the inside of filling groove 4 by p type epitaxial film 223.Thus, can suppress stopping of groove opening part.On the other hand, can improve the speed of growth by interval Lt between the adjacent trenches is formed greater than groove width Wt.

Thus, when by epitaxial film 223 filling grooves 4 and manufacturing Semiconductor substrate, can coordinate the inhibition that stops of groove opening part and the raising of the speed of growth.

(9) when being used at least in the final technology of filling groove 4 by p type epitaxial film 223 filling grooves 4 inside, film formation condition as epitaxial film 223, with respect to the epitaxial film of growing on groove side surface, the speed of growth in the groove opening part is set to lower than the speed of growth in the dark part of this groove opening part.Thus, suppressed owing to epitaxial film 223 causes stopping in the groove opening part, and can improve the filling characteristic in groove 4.

(10) width when groove 4 is set to " Wt ", " Lt " is arranged at interval between the adjacent trenches 4, the impurity concentration of n type epitaxial film 2 is set to " Ne1 ", and the impurity concentration of the p type epitaxial film 223 that is used to fill satisfies following relation when being set to " Ne2 ".

Ne2×Wt＝Ne1×Lt (F7)

Therefore, carrying out the best in super-junction structure exhausts in the formation and can be optimized.

(11) in second technology, form in p type (second conduction type) epitaxial film, when the standard flow rate of halide gas is set to X[slm] and the speed of growth be set to Y[μ m/ minute] time, following relation is set.That is, be arranged to satisfy Y＜0.2X+0.1 less than 10 the time when the aspect ratio of groove.And, when the aspect ratio of groove is 10 or bigger and be arranged to satisfy Y＜0.2X+0.05 less than 20 the time.And, when the aspect ratio of groove is 20 or is arranged to satisfy Y＜0.2X when bigger.From suppress the viewpoint that hole produces, preferably these relations simultaneously with the effective filling groove of epitaxial film.

In the explanation of making so far, first conduction type is arranged to the n type, and second conduction type is arranged to the p type.Yet, on the contrary, also first conduction type can be arranged to the p type, and (particularly, among Figure 26, substrate 1 is arranged to p also second conduction type can be arranged to the n type ⁺, the n type is arranged in zone 5, and the p type is arranged in zone 6).

Above-mentioned disclosure has following aspect.

According to the first aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: form groove on the first type surface of silicon substrate; Form first epitaxial film on the silicon substrate first type surface and in the groove by the mist that uses silicon source gas and halide gas, thereby with the first epitaxial film filling groove; And pass through to use another mist of silicon source gas and halide gas on first epitaxial film, to form second epitaxial film.The step that forms first epitaxial film has on the first type surface of silicon substrate first process conditions with first growth, first epitaxial film.The step that forms second epitaxial film has on the first type surface of silicon substrate second process conditions with second growth, second epitaxial film.Second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

In said method, because halide gas is used to form first epitaxial film, therefore first epitaxial film in groove does not have hole substantially.And, because second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film, therefore can improve the production time, i.e. the manufacturing time of device.Therefore, simplified the planarization of device surface.

Perhaps, this method can further comprise step: after the step that forms second epitaxial film surface of second epitaxial film on the first type surface of silicon substrate is polished.

Perhaps, in the step that forms first epitaxial film, can halide gas be flowed with the first halide gas flow velocity.In the step that forms second epitaxial film, can halide gas be flowed with the second halide gas flow velocity.The second halide gas flow velocity is less than the first halide gas flow velocity, thereby second speed of growth of second epitaxial film is greater than first speed of growth of first epitaxial film.And in the step that forms second epitaxial film, mist can not comprise halide gas, so that second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

Perhaps, in the step that forms first epitaxial film, can silicon source gas be flowed with the first silicon source gas flow velocity.In the step that forms second epitaxial film, can silicon source gas be flowed with the second silicon source gas flow velocity.The second silicon source gas flowing velocity is bigger than the first silicon source gas flowing velocity, so that second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

Perhaps, in the step that forms first epitaxial film, first process conditions can comprise first technological temperature.In the step that forms second epitaxial film, second process conditions can comprise second technological temperature.Second technological temperature is higher than first technological temperature, so that second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

Perhaps, in the step that forms first epitaxial film, first process conditions can comprise first operation pressure.In the step that forms second epitaxial film, second process conditions can comprise second operation pressure.Second operation pressure is bigger than first operation pressure, so that second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film.

Perhaps, in the step that forms first epitaxial film, first epitaxial film can form by the low pressure chemical vapor deposition method, and in the step that forms second epitaxial film, second epitaxial film can form by the low pressure chemical vapor deposition method.And in the step that forms first epitaxial film, first epitaxial film can form by the low pressure chemical vapor deposition method, and in the step that forms second epitaxial film, second epitaxial film can form by atmospheric pressure CVD method.

Perhaps, in the step that forms second epitaxial film, second process conditions can comprise at least two different parameters that are different from first process conditions, so that second speed of growth of second epitaxial film is bigger than first speed of growth of first epitaxial film, and from by selecting at least two different parameters halide gas flow velocity, silicon source gas flow velocity, technological temperature and the group that operation pressure constitutes.

Perhaps,, the step that forms first epitaxial film is switched to continuously the step that forms second epitaxial film so that thereby at least one parameter that is selected from the group that is made of halide gas flow velocity, silicon source gas, technological temperature and operation pressure changes second speed of growth mode bigger than first speed of growth of first epitaxial film that makes second epitaxial film gradually.

Perhaps, this method can further comprise step: monitor the surface temperature of first epitaxial film from the main surface side of silicon substrate by using pyrometer.When the output signal at predetermined monitoring temperature place pyrometer becomes substantially constant, the step that forms first epitaxial film is switched to the step that forms second epitaxial film.

Perhaps, halide gas can be hydrogen chloride gas, chlorine, fluorine gas, chlorine trifluoride gas, hydrogen fluoride gas or bromize hydrogen gas.Perhaps, silicon source gas can be monosilane gas, b silane gas, dichlorosilane gas or trichlorosilane gas.

Perhaps, groove can have the end and side surface.The bottom of groove comprises (110) crystal face, and the side surface of groove comprises (111) crystal face.And the bottom of groove can comprise (100) crystal face, and the side surface of groove can comprise (100) crystal face.

Perhaps, in forming the step of first epitaxial film, can halide gas be flowed with standard flow rate, it be defined as X, and unit is slm, can be with a growth speed first epitaxial film of growing, and it is defined as Y, and unit be a micron per minute.When groove had less than 10 aspect ratio, the speed of growth of the standard flow rate of halide gas and first epitaxial film had relation: Y＜0.2X+0.1.And, when having, groove is equal to or greater than 10 and during less than 20 aspect ratio, the speed of growth of the standard flow rate of halide gas and first epitaxial film has relation: Y＜0.2X+0.05.And when groove has when being equal to or greater than 20 aspect ratio, the speed of growth of the standard flow rate of halide gas and first epitaxial film has relation: Y＜0.2X.

Perhaps, silicon substrate can have first conduction type.Groove is included in a plurality of grooves in the silicon substrate.Silicon substrate between adjacent two grooves has a width, and this width is greater than recess width.First epitaxial film has second conduction type, and first epitaxial film has the impurity concentration higher than the impurity concentration of silicon substrate.And in the step that forms first epitaxial film, the speed of growth of first epitaxial film can be littler than the speed of growth of first epitaxial film in the groove near slot opening.And, recess width is defined as W, and the silicon substrate width between adjacent two grooves is defined as L.The impurity concentration of silicon substrate is defined as N1, and the impurity concentration of first epitaxial film is defined as N2.The impurity concentration of recess width, silicon substrate width, silicon substrate impurity concentration and first epitaxial film has relation: N2 * W=N1 * L.

According to the second aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: form groove on the first type surface of silicon substrate; And in groove, form epitaxial film, thereby with this epitaxial film filling groove by the mist that uses silicon source gas and halide gas.In forming the step of epitaxial film, on the first type surface of silicon substrate, do not form epitaxial film, and when the first type surface of the end face of epitaxial film in the groove and silicon substrate is in same plane, finish the step of formation epitaxial film.

In said method, because halide gas is used to form epitaxial film, therefore the epitaxial film in groove does not have hole substantially.And, simplified the planarization of device surface.

According to the third aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: the mask that is formed for groove on the first type surface of silicon substrate; By passing the first type surface of mask open etched silicon substrate, on the silicon substrate first type surface, form groove; In the groove of silicon substrate, form epitaxial film by the mist that uses silicon source gas and halide gas, thereby fill this groove with epitaxial film with mask; And after the step that forms epitaxial film, remove this mask.In forming the step of epitaxial film, on mask, do not form epitaxial film, and finish the step of formation epitaxial film at grade the time when the first type surface of epitaxial film top surface in the groove and silicon substrate.

According to the fourth aspect of present disclosure, the method that is used for producing the semiconductor devices may further comprise the steps: the mask that is formed for groove on the first type surface of silicon substrate; On the first type surface of silicon substrate, form groove by the first type surface that passes the mask open etched silicon substrate; In the groove of silicon substrate, form epitaxial film by the mist that uses silicon source gas and halide gas with mask, thereby use the epitaxial film filling groove, wherein epitaxial film is not formed on the mask, and when the top surface of epitaxial film in the groove is higher than the first type surface of silicon substrate, finish the step that forms epitaxial film; By using mask to come epitaxial film surface on the polished silicon substrate main surface side as polishing stop layer, thus the main surface side of planarization silicon substrate; And after the step on polishing epitaxial film surface, remove this mask.

Perhaps, this method can further comprise step: the first type surface of silicon oxide substrate after the step of removing mask, on first type surface, to form sacrificial oxide layer; And remove this sacrificial oxide layer.

In said method, because halide gas is used to form epitaxial film, therefore this epitaxial film in groove does not have hole basically.And, simplified the planarization of device surface.

Perhaps, in the step that forms epitaxial film, the epitaxial film on the mask can be made by monocrystalline.And in the step that forms epitaxial film, the epitaxial film on mask can be made by polycrystalline.

By using said apparatus, in groove, form epitaxial film and do not have hole substantially.And, simplified the planarization of device surface.

In said method, the second epitaxial film covering groove opening of no use before with the second epitaxial film filling groove.And, because first epitaxial film between two adjacent grooves has the width bigger than groove width, therefore increased the speed of growth of second epitaxial film

Though described the present invention, be appreciated that to the invention is not restricted to preferred embodiment and structure with reference to its preferred embodiment.The present invention is intended to cover various modifications and equivalence is provided with.In addition, though preferred various combination and structure comprise other combination more, still less or only discrete component and structure also within the spirit and scope of the present invention.

Claims

1, a kind of method that is used for producing the semiconductor devices may further comprise the steps:

On the first type surface of silicon substrate (70), form groove (72); And

In this groove (72), form epitaxial film (73) by the mist that uses silicon source gas and halide gas, thereby fill this groove (72), wherein with this epitaxial film (73)

In the step that forms this epitaxial film (73), on the first type surface of this silicon substrate (70), do not form this epitaxial film (73), and

When the first type surface of the end face of this epitaxial film (73) in this groove (72) and this silicon substrate (70) at grade the time, finish the step that forms this epitaxial film (73).

2, a kind of method that is used for producing the semiconductor devices may further comprise the steps:

On the first type surface of silicon substrate (80), be formed for the mask (82) of groove (83);

The first type surface of this silicon substrate of opening etching (80) by passing this mask (82) forms groove (83) on the first type surface of this silicon substrate (80);

In the groove (83) of this silicon substrate (80), form epitaxial film (84) by the mist that uses silicon source gas and halide gas, thereby fill this groove (83) with this epitaxial film (84) with this mask (82); And

After the step that forms this epitaxial film (84), remove this mask (82), wherein

In the step that forms this epitaxial film (84), on this mask (82), do not form this epitaxial film (84), and

When the first type surface of the end face of this epitaxial film (84) in this groove (4) and this silicon substrate (80) at grade the time, finish the step that forms this epitaxial film (84).

3, a kind of method that is used for producing the semiconductor devices may further comprise the steps:

On the first type surface of silicon substrate (90), be formed for the mask (92) of groove (93);

The first type surface of this silicon substrate of opening etching (90) by passing this mask (92) forms groove (93) on the first type surface of this silicon substrate (90);

By using the mist of silicon source gas and halide gas, in the groove (93) of this silicon substrate (90), form epitaxial film (94) with this mask (92), thereby fill this groove (93) with this epitaxial film (94), wherein on this mask (92), do not form epitaxial film (94), and when the end face of this epitaxial film (94) in this groove (93) is higher than the first type surface of this silicon substrate (90), finish the step that forms this epitaxial film (94);

By using this mask (92) to come the surface of this epitaxial film (94) on the main surface side of this silicon substrate (90) is polished, with the main surface side of this silicon substrate of planarization (90) as polishing stop layer; And

After the step that the surface of this epitaxial film (94) is polished, remove this mask (92).

4, method as claimed in claim 3 also comprises step:

The first type surface of this silicon substrate of oxidation (90) after the step of removing this mask (92), thus on this first type surface, form sacrificial oxide layer; And

Remove this sacrificial oxide layer.

5, a kind of method that is used for producing the semiconductor devices may further comprise the steps:

Form epitaxial film (95) on this mask (92) and in this groove (93) by the mist that uses silicon source gas and halide gas, thereby fill this groove (93) with this epitaxial film (95);

By using this mask (92) to come the surface of this epitaxial film (95) on the main surface side of this silicon substrate (90) is polished, with the main surface side of this silicon substrate of planarization (90) as polishing stop layer; And

After the step that the surface of this epitaxial film (95) is polished, remove this mask (92).

6, method as claimed in claim 5 also comprises step:

Remove this sacrificial oxide layer.

7, as claim 5 or 6 described methods, wherein

In the step that forms epitaxial film (95), this epitaxial film (95) on this mask (92) is made by monocrystalline.

8, as claim 5 or 6 described methods, wherein

In the step that forms epitaxial film (95), this epitaxial film (95) on this mask (92) is made by polycrystalline.

9, a kind of method that is used for producing the semiconductor devices may further comprise the steps:

Silicon substrate (1) at first conduction type is gone up first epitaxial film (2) that forms first conduction type;

Form a plurality of grooves (4) in this first epitaxial film (2), this first epitaxial film (2) between wherein adjacent two grooves (4) has a width, and this width is bigger than the width of this groove (4);

Second epitaxial film (223) of formation second conduction type on this first epitaxial film (2) and in this groove (4), thereby fill this groove (4) with this second epitaxial film (223), wherein this second epitaxial film (223) has the high impurity concentration of impurity concentration than this first epitaxial film (2), wherein

The step that forms this second epitaxial film (223) comprises final step, in this final step, the mist of silicon source gas and halide gas is used to form this second epitaxial film (223).

10, method as claimed in claim 9, wherein

In the final step of the step that forms this second epitaxial film (223), near the speed of growth of this second epitaxial film (223) this groove (4) opening than this groove (4) in the speed of growth of this second epitaxial film (223) little.

11, method as claimed in claim 9, wherein

The width of this groove (4) is defined as W,

The width of this first epitaxial film (2) between adjacent two grooves (4) is defined as L,

The impurity concentration of this first epitaxial film (2) is defined as N1,

The impurity concentration of this second epitaxial film (223) is defined as N2,

The impurity concentration of the impurity concentration of the width of the width of this groove (4), this first epitaxial film (2), this first epitaxial film (2) and this second epitaxial film (223) has following relation:

N2×W＝N1×L。

12, as each described method among the claim 9-11, wherein

In the step that forms this second epitaxial film (223), halide gas is used to form this second epitaxial film (223),

This halide gas has standard flow rate, and it is restricted to X, and unit is slm,

This second epitaxial film (223) is with a growth, and this speed of growth is restricted to Y, and unit is the micron per minute,

This groove (4) has the aspect ratio less than 10, and

The speed of growth of the standard flow rate of this halide gas and this second epitaxial film (223) has following relation:

Y＜0.2X+0.1。

13, as each described method among the claim 9-11, wherein

This groove (4) has and is equal to or greater than 10 and less than 20 aspect ratio, and

Y＜0.2X+0.05。

14, as each described method among the claim 9-11, wherein

This second epitaxial film (223) is with a growth, and this speed of growth is restricted to Y, and unit is a micron per minute,

This groove (4) has and is equal to or greater than 20 aspect ratio, and

Y＜0.2X。