CN101330106A - Thin film transistor substrate of display panel, thin film transistor and manufacturing method thereof - Google Patents

Abstract

The invention discloses a thin film transistor formed on a transparent substrate. The thin film transistor includes a patterned semiconductor layer, a gate insulating layer on the patterned semiconductor layer, a gate on the gate insulating layer, and a patterned light absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region respectively located in the patterned semiconductor layer on two sides of the channel region. The patterned light absorbing layer is located between the transparent substrate and the patterned semiconductor layer.

Description

Thin film transistor substrate of display panel, thin film transistor and manufacturing method thereof

technical field

The invention relates to a thin film transistor substrate of a display panel, a thin film transistor and a manufacturing method thereof, in particular to a thin film transistor capable of suppressing light leakage current and a manufacturing method thereof.

Background technique

Please refer to Figure 1. FIG. 1 is a schematic diagram of a thin film transistor of a conventional liquid crystal display panel. As shown in FIG. 1 , a conventional thin film transistor 10 is formed above a thin film transistor substrate 1 of a liquid crystal display panel. The thin film transistor 10 includes a semiconductor layer, a gate insulating layer 18 on the semiconductor layer, and a gate 20 on the gate insulating layer 18 . The semiconductor layer includes a channel region 12 , and a source region 14 and a drain region 16 respectively located on two sides of the channel region 12 .

Since the liquid crystal display panel is a non-self-illuminating display device, it must rely on the backlight provided by the backlight module as a light source. The thin film transistor is a pixel switch component of the liquid crystal display panel, in which the gate is connected to the scanning line and is controlled by it to be turned on, the source region is connected to the data line to receive signals, and the drain region is connected to the pixel electrode. Through the above connection method, when the gate receives the gate voltage, the thin film transistor will be turned on so that the signal sent by the data line can reach the pixel electrode through the source region, the channel region and the drain region, and at this time, the pixel electrode and the common A liquid crystal capacitor is formed between the electrodes, whereby the transmittance of the backlight can be changed to achieve the purpose of controlling the brightness of the grayscale. However, as shown in FIG. 1 , since the channel region 12 of the existing thin film transistor 10 is completely exposed to the illumination of the backlight or the external light source, the light leakage current will increase and affect the normal operation of the thin film transistor 10 .

Contents of the invention

One object of the present invention is to provide a thin film transistor of a display panel and a manufacturing method thereof, so as to reduce light leakage current of the thin film transistor.

To achieve the above purpose, the present invention provides a thin film transistor formed on a transparent substrate. The thin film transistor includes a patterned semiconductor layer, a gate insulating layer on the patterned semiconductor layer, a gate on the gate insulating layer, and a patterned light absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region respectively located in the patterned semiconductor layer on two sides of the channel region. The patterned light absorbing layer is located between the transparent substrate and the patterned semiconductor layer.

The thin film transistor, wherein the patterned light absorbing layer includes a silicon-rich dielectric layer.

The thin film transistor, wherein the silicon-rich dielectric layer includes a silicon-rich silicon oxide layer, a silicon-rich silicon nitride layer or a silicon-rich oxynitride layer.

In the thin film transistor, the refractive index of the silicon-rich dielectric layer is between 1.7 and 3.7.

The thin film transistor, wherein the patterned light absorbing layer has a thickness between 100nm and 300nm.

The thin film transistor, wherein the silicon-rich dielectric layer includes a silicon nano-grain dielectric layer.

In the thin film transistor, the diameter of the silicon nanocrystal grains in the silicon nanocrystal grain dielectric layer is generally between 5 and 500 angstroms.

The thin film transistor, wherein the patterned light absorbing layer substantially shields the patterned semiconductor layer.

The thin film transistor further includes a buffer layer located between the patterned semiconductor layer and the transparent substrate.

The thin film transistor, wherein the buffer layer includes a buffer oxide layer or a buffer nitride layer.

To achieve the above purpose, the present invention further provides a thin film transistor substrate suitable for a display panel, comprising a transparent substrate, and a plurality of thin film transistors located on the transparent substrate. Each thin film transistor includes a patterned semiconductor layer, a gate insulating layer located on the patterned semiconductor layer, a gate located on the gate insulating layer, and a patterned light absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region respectively located in the patterned semiconductor layer on two sides of the channel region. The patterned light absorbing layer is located between the transparent substrate and the patterned semiconductor layer.

In the thin film transistor substrate, the patterned light absorbing layer includes a silicon-rich dielectric layer.

The thin film transistor substrate, wherein the silicon-rich dielectric layer includes a silicon-rich silicon oxide layer, a silicon-rich silicon nitride layer or a silicon-rich oxynitride layer.

In the thin film transistor substrate, the refractive index of the silicon-rich dielectric layer is between 1.7 and 3.7.

The TFT substrate, wherein the patterned light absorbing layer has a thickness between 100nm and 300nm.

In the thin film transistor substrate, the silicon-rich dielectric layer includes a silicon nano-grain dielectric layer.

In the thin film transistor substrate, the diameter of the silicon nanocrystal grains in the silicon nanocrystal grain dielectric layer is generally between 5 and 500 angstroms.

The thin film transistor substrate, wherein the patterned light absorbing layer substantially shields the patterned semiconductor layer.

The thin film transistor substrate further includes a buffer layer located between the patterned semiconductor layer and the transparent substrate.

In the thin film transistor substrate, the buffer layer includes a buffer oxide layer or a buffer nitride layer.

To achieve the above purpose, the present invention further provides a method for manufacturing a thin film transistor, comprising the following steps. A transparent substrate is provided. Then a patterned light absorbing layer and a patterned semiconductor layer are sequentially formed on the transparent substrate, wherein the patterned light absorbing layer substantially shields the patterned semiconductor layer. Then a thin film transistor is formed on the patterned semiconductor layer.

The method, wherein forming the thin film transistor on the patterned semiconductor layer comprises the following steps:

forming a gate insulating layer on the patterned semiconductor layer, and forming a gate on the gate insulating layer; and

A channel region is formed in the patterned semiconductor layer, and a source region and a drain region are respectively formed in the patterned semiconductor layer on both sides of the channel region.

The method further includes forming a buffer layer on the transparent substrate before forming the patterned semiconductor layer.

Said method, wherein, the buffer layer includes a buffer oxide layer or a buffer nitride layer.

The method, wherein the patterned light absorbing layer includes a silicon-rich dielectric layer.

The method, wherein the silicon-rich dielectric layer includes a silicon nano-grain dielectric layer.

The method, wherein the silicon nanocrystal grains of the silicon nanocrystal grain dielectric layer have a diameter substantially between 5 and 500 angstroms.

The thin film transistor of the display panel of the present invention uses the light absorbing layer to shield the backlight emitted by the backlight module, so that the direct irradiation of the backlight to the semiconductor layer is reduced, so the light leakage current problem of the thin film transistor can be reduced.

The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

Description of drawings

FIG. 1 is a schematic diagram of a thin film transistor of an existing liquid crystal display panel;

2 to 5 are schematic diagrams of a method for manufacturing a thin film transistor for a display panel according to a preferred embodiment of the present invention;

6 and 7 illustrate schematic diagrams of other two embodiments of the thin film transistor of the present invention;

FIG. 8 is a graph showing the relationship between drain current and gate voltage of a thin film transistor.

Among them, reference signs:

1 thin film transistor substrate 10 thin film transistor

12 channels 14 source regions

16 Drain region 18 Gate insulating layer

20 Grid 30 Transparent Substrate

32 patterned light absorbing layer 34 buffer layer

36 patterned semiconductor layer 36C channel region

36S source region 36D drain region

38 grid insulating layer 40 grid

50 Thin Film Transistors

Detailed ways

The technical solutions of the present invention will be further described in more detail in conjunction with the accompanying drawings and specific embodiments.

Please refer to Figure 2 to Figure 5. 2 to 5 are schematic diagrams of a preferred embodiment of a method for manufacturing a thin film transistor for a display panel according to the present invention, wherein the display panel of this embodiment is a liquid crystal display panel, but not limited thereto. As shown in FIG. 2 , firstly, a transparent substrate 30 is provided, wherein the transparent substrate 30 is used as a thin film transistor substrate of a liquid crystal display panel, which can be a substrate made of transparent materials such as a glass substrate, a quartz substrate or a plastic substrate. Then a patterned light absorbing layer 32 is formed on the transparent substrate 30 . The patterned light absorbing layer 32 may include a silicon-rich dielectric layer, such as a silicon-rich silicon oxide (silicon-rich silicon oxide; Si-rich SiOx) layer, a silicon-rich silicon nitride (silicon-rich silicon nitride) layer ; Si-richSiNy) layer or silicon-rich silicon oxynitride (silicon-rich silicon oxynitride; Si-rich SiOxNy) layer, at least one of which is either its stacked layer or other silicon-rich compound. When the material of the silicon-rich dielectric layer is silicon-rich silicon oxide, the molecular formula of the silicon-rich silicon oxide is SiOx, where x is greater than 0 and less than 2. When the material of the silicon-rich dielectric layer is, for example, silicon-rich silicon nitride, the molecular formula of the silicon-rich silicon nitride is SiNy, wherein y is greater than 0 and less than 4/3 (about 1.67). When the silicon-rich dielectric material is, for example, silicon-rich silicon oxynitride, its molecular formula is SiOxNy, where (x+y) is greater than 0 and less than 2.

In this embodiment, the silicon-rich dielectric layer can be formed by plasma-assisted chemical vapor deposition (PECVD), and the plasma-assisted chemical vapor deposition process is through the introduction of silane (SiH ₄ ) , nitrous oxide (N ₂ O) or ammonia (NH ₃ ) and other mixed gases and adjust the appropriate ratio to deposit a silicon-rich dielectric layer, thereby depositing silicon-rich silicon oxide, silicon-rich silicon nitride or silicon-rich nitrogen silicon oxide. For example, if the mixed gas fed in is silane and nitrous oxide, silicon-rich silicon oxide (Si-rich SiOx) can be deposited; if the mixed gas fed in is silane and ammonia (NH ₃ ), it can deposit Silicon-rich silicon nitride (Si-rich SiNy) is deposited. If the mixed gas of silane, nitrous oxide and ammonia gas is introduced, silicon-rich silicon oxynitride (Si-rich SiOxNy) can be deposited. In addition, the higher the silicon content in the silicon-rich dielectric layer, the higher the refractive index, and the refractive index is between 1.7 and 3.7, and its thickness can be approximately between 100 nm and 300 nm.

The patterned light-absorbing layer 32 is preferably a silicon nanocrystal grain (nanocrystalline silicon) dielectric layer, wherein the diameter of the silicon nanocrystal grains of the silicon nanocrystal grain dielectric layer is generally between 5 and 500 angstroms, and can utilize low temperature Formed by laser annealing process, but not limited thereto. The function of the patterned light absorbing layer 32 is to absorb the backlight incident from below the transparent substrate 30 , so as to avoid the light leakage current of the thin film transistor due to the backlight irradiation, and has a better effect.

As shown in FIG. 3 , a buffer layer 34 may then be optionally formed on the transparent substrate 30 and/or the patterned light absorbing layer 32 . The function of the buffer layer 34 is to prevent the impurity in the transparent substrate 30 from diffusing into the semiconductor layer during the subsequent manufacturing process, thereby affecting the normal operation of the thin film transistor. In this embodiment, the buffer layer 34 is not limited to be formed on the patterned light-absorbing layer 32, and may also be formed on the transparent substrate 30 before forming the patterned light-absorbing layer 32, and the buffer layer 32 may be a single-layer structure The layer is, for example, a buffer oxide layer or a buffer nitride layer, or a multi-layer structure layer, for example, including both a buffer oxide layer and a buffer nitride layer.

As shown in FIG. 4 , a patterned semiconductor layer 36 , such as a polysilicon layer, is then formed on the buffer layer 34 . In this embodiment, the patterned light absorbing layer 32 , the buffer layer 34 and the patterned semiconductor layer 36 can be defined by one photolithography and etching process using the same mask, but the method of the present invention is not limited thereto. In addition, the patterns of the patterned light absorbing layer 32 and the patterned semiconductor layer 36 are substantially equal in size and corresponding in shape, so that the patterned light absorbing layer 32 can shield the patterned semiconductor layer 36 to prevent the patterned semiconductor layer 36 from being illuminated by backlight. However, the leakage current will not affect the aperture ratio of the display panel.

As shown in FIG. 5 , a gate insulating layer 38 is then formed on the patterned semiconductor layer 36 , and a gate 40 is formed on the gate insulating layer 38 . Subsequently, a channel region 36C is formed in the patterned semiconductor layer 36 at the position corresponding to the gate 40 by ion implantation process, and a source region 36S and a source region 36S and a source region 36S are respectively formed in the patterned semiconductor layer 36 on both sides of the channel region 36C. In the drain region 36D, a thin film transistor 50 is formed.

It can be known from the above that the thin film transistor 50 of the present invention is provided with a light absorbing layer 32 under the semiconductor layer 36 to absorb backlight to prevent the thin film transistor 50 from generating light leakage current. The light absorbing layer 32 is preferably selected from a material with a high absorption rate in the wavelength range of the backlight (mostly in the wavelength range of visible light), so as to effectively shield the backlight. In the above embodiments, the silicon-rich dielectric layer containing silicon nanocrystal grains is selected as the material of the light absorbing layer 32 , however, the present invention is not limited thereto and other suitable light absorbing materials can be selected.

Please refer to Figure 6 and Figure 7. FIG. 6 and FIG. 7 show schematic diagrams of two other embodiments of the thin film transistor of the present invention, wherein for the convenience of comparing the similarities and differences of each embodiment, the same components of the thin film transistor in each embodiment are marked with the same symbols. As shown in FIG. 6 , in this embodiment, the patterned light absorbing layer 32 is formed first and then the buffer layer 34 is formed, so the patterned light absorbing layer 32 is located below the buffer layer 34 . In this embodiment, the buffer layer 34 can be a single-layer structure layer such as a buffer oxide layer or a buffer nitride layer, or a multi-layer structure layer such as including both a buffer oxide layer and a buffer nitride layer. As shown in FIG. 7 , since the patterned light-absorbing layer 32 itself also has the function of preventing impurity diffusion, the TFT 50 in this embodiment is provided with the patterned light-absorbing layer 32 but not provided with a buffer layer.

Please refer to Figure 8. FIG. 8 is a graph showing the relationship between the drain current (Drain Current) and the gate voltage (Gate Voltage) of the thin film transistor. Fig. 8 contains four curves, and its experimental conditions are as follows:

Curve A: no light absorbing layer and backlight off;

Curve B: No light absorbing layer is provided and the backlight is turned on (the brightness of the backlight is 5000 nits);

Curve C: with a light absorbing layer (using a silicon-rich dielectric layer with a thickness of approximately 2000 to 3000 angstroms) and with the backlight turned on; and

Curve D: with a light absorbing layer and with the backlight off.

As shown in Figure 8, when the gate voltage does not reach the threshold voltage, the drain current of the TFT with the light absorbing layer is significantly smaller than that without the backlight when the backlight is turned on (curve C). Drain current of a TFT with a light absorbing layer when the backlight is turned on (curve B).

From the above, it can be seen that the thin film transistor of the display panel of the present invention can effectively reduce the leakage current problem of the thin film transistor by disposing the light absorbing layer, thereby improving the reliability.

Of course, the present invention can also have other various embodiments, and those skilled in the art can make various corresponding changes and deformations according to the present invention without departing from the spirit and essence of the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.

Claims (27)

1. a thin-film transistor is formed on the transparency carrier, it is characterized in that, this thin-film transistor comprises:

One patterned semiconductor layer is positioned on this transparency carrier, comprising:

One channel region; And

An one source pole district and a drain region lay respectively in this patterned semiconductor layer of these channel region both sides;

One gate insulator is positioned on this patterned semiconductor layer;

One grid is positioned on this gate insulator; And

One patterning light absorbing zone is between this transparency carrier and this patterned semiconductor layer.

2. thin-film transistor according to claim 1 is characterized in that, this patterning light absorbing zone comprises a silicic dielectric layer.

3. thin-film transistor according to claim 2 is characterized in that, this silicic dielectric layer comprises a silicon rich silicon oxide layer, a silicon-rich silicon nitride layer or a Silicon-rich nitrogen oxide layer.

4. thin-film transistor according to claim 2 is characterized in that the refractive index of this silicic dielectric layer is between 1.7 to 3.7.

5. thin-film transistor according to claim 1 is characterized in that, this patterning light absorbing zone has a thickness between between the 100nm to 300nm.

6. thin-film transistor according to claim 2 is characterized in that, this silicic dielectric layer comprises a silicon nanocrystal grain dielectric layer.

7. thin-film transistor according to claim 6 is characterized in that, the diameter of the silicon nanocrystal grain of this silicon nanocrystal grain dielectric layer is substantially between 5 to 500 dusts.

8. thin-film transistor according to claim 1 is characterized in that, this patterning light absorbing zone covers this patterned semiconductor layer substantially.

9. thin-film transistor according to claim 1 is characterized in that other comprises a resilient coating, between this patterned semiconductor layer and this transparency carrier.

10. thin-film transistor according to claim 9 is characterized in that, this resilient coating comprises a buffer oxide layer or a buffering nitration case.

11. a thin film transistor base plate is applicable to a display floater, it is characterized in that, comprising:

One transparency carrier; And

A plurality of thin-film transistors are positioned on this transparency carrier, and respectively this thin-film transistor comprises:

One patterned semiconductor layer comprises:

One channel region; And

An one source pole district and a drain region lay respectively in this patterned semiconductor layer of these channel region both sides;

One gate insulator is positioned on this patterned semiconductor layer;

One grid is positioned on this gate insulator; And

One patterning light absorbing zone is between this transparency carrier and this patterned semiconductor layer.

12. thin film transistor base plate according to claim 11 is characterized in that, this patterning light absorbing zone comprises a silicic dielectric layer.

13. thin film transistor base plate according to claim 12 is characterized in that, this silicic dielectric layer comprises a silicon rich silicon oxide layer, a silicon-rich silicon nitride layer or a Silicon-rich nitrogen oxide layer.

14. thin film transistor base plate according to claim 12 is characterized in that, the refractive index of this silicic dielectric layer is between 1.7 to 3.7.

15. thin film transistor base plate according to claim 11 is characterized in that, this patterning light absorbing zone has a thickness between between the 100nm to 300nm.

16. thin film transistor base plate according to claim 12 is characterized in that, this silicic dielectric layer comprises a silicon nanocrystal grain dielectric layer.

17. thin film transistor base plate according to claim 16 is characterized in that, the diameter of the silicon nanocrystal grain of this silicon nanocrystal grain dielectric layer is substantially between 5 to 500 dusts.

18. thin film transistor base plate according to claim 11 is characterized in that, this patterning light absorbing zone covers this patterned semiconductor layer substantially.

19. thin film transistor base plate according to claim 11 is characterized in that, other comprises a resilient coating, between this patterned semiconductor layer and this transparency carrier.

20. thin film transistor base plate according to claim 19 is characterized in that, this resilient coating comprises a buffer oxide layer or a buffering nitration case.

21. a method of making thin-film transistor is characterized in that, comprising:

One transparency carrier is provided;

Form a patterning light absorbing zone and a patterned semiconductor layer on this transparency carrier in regular turn, this patterning light absorbing zone covers this patterned semiconductor layer substantially; And

Form a thin-film transistor in this patterned semiconductor layer.

22. method according to claim 21 is characterized in that, forms this thin-film transistor in this patterned semiconductor layer and comprises the following steps:

On this patterned semiconductor layer, form a gate insulator, and on this gate insulator, form a grid; And

In this patterned semiconductor layer, form a channel region, and in this patterned semiconductor layer of the both sides of this channel region, form an one source pole district and a drain region respectively.

23. method according to claim 21 is characterized in that, other is included in and forms before this patterned semiconductor layer, prior to forming a resilient coating on this transparency carrier.

24. method according to claim 23 is characterized in that, this resilient coating comprises a buffer oxide layer or a buffering nitration case.

25. method according to claim 21 is characterized in that, this patterning light absorbing zone comprises a silicic dielectric layer.

26. method according to claim 25 is characterized in that, this silicic dielectric layer comprises a silicon nanocrystal grain dielectric layer.

27. method according to claim 26 is characterized in that, the diameter of the silicon nanocrystal grain of this silicon nanocrystal grain dielectric layer is substantially between 5 to 500 dusts.

Images