[go: up one dir, main page]

CN101290890B - Circuit board with embedded conductive circuit and manufacturing method thereof - Google Patents

Circuit board with embedded conductive circuit and manufacturing method thereof Download PDF

Info

Publication number
CN101290890B
CN101290890B CN 200810129055 CN200810129055A CN101290890B CN 101290890 B CN101290890 B CN 101290890B CN 200810129055 CN200810129055 CN 200810129055 CN 200810129055 A CN200810129055 A CN 200810129055A CN 101290890 B CN101290890 B CN 101290890B
Authority
CN
China
Prior art keywords
substrate
metal layer
layer
circuit board
copper layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN 200810129055
Other languages
Chinese (zh)
Other versions
CN101290890A (en
Inventor
廖国成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Semiconductor Engineering Inc
Original Assignee
Advanced Semiconductor Engineering Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Engineering Inc filed Critical Advanced Semiconductor Engineering Inc
Priority to CN 200810129055 priority Critical patent/CN101290890B/en
Publication of CN101290890A publication Critical patent/CN101290890A/en
Application granted granted Critical
Publication of CN101290890B publication Critical patent/CN101290890B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

The invention provides a method for manufacturing a circuit board with embedded conductive circuits, which is characterized in that an embedded conductive circuit layer is formed on the surface of a substrate, and the heights of pads and fingers are increased so as to facilitate the subsequent glue filling process.

Description

Circuit board and manufacture method thereof with internally embedded conductive wire
Technical field
The invention relates to a kind of circuit board and manufacture method thereof, more be particularly to a kind of circuit board and manufacture method thereof with internally embedded conductive wire.
Background technology
Because electronic building brick has become multi-functional and volume is more and more littler, the technology of base plate for packaging is development fast also in recent years, so that realize the line pattern of light, thin, short, little and highly dense.Especially, so line pattern light, thin, short, little and highly dense is to need to use at chip size packages structure (chip scale package; CSP) on the product group.In order on undersized substrate, to form intensive line pattern, generally be to adopt the mode of pressing on substrate, to form the conducting wire of built-in type.
With reference to figure 1a to Fig. 1 h, having now in the manufacture method that forms internally embedded conductive wire on the substrate is to form a bronze medal layer 120 on prior to a support plate 110, the structure 122 and 124 that has projection on this copper layer 120, the pattern of those raised structures 122,124 are (see Fig. 1 a and Fig. 1 b) corresponding with the pattern of the conducting wire of desiring to form on substrate., for example be BT (Bismaleimide Triazine) substrate 130 pressings of B stage (B stage) then, make the raised structures 122,124 on the copper layer 120 imbed a surface 132 of substrate 130 support plate 110 and a soft substrate.Another surface 134 of substrate 130 also can have copper layer 140 pressing (seeing Fig. 1 c) of raised structures 142 as required with another.Again support plate 110 is removed from copper layer 120,140, and utilize etched mode with 120,140 thinning of copper layer, make the surface 132,134 of substrate 130 expose, originally the raised structures 122,124,142 on copper layer 120,140 still was retained in the surface 132,134 of substrate 130 and flushed with substrate surface 132,134 this moment.These are embedded in raised structures 122,124,142 on the surface 132,134 of substrate 130 can form conducting wire layer (seeing Fig. 1 d) on the substrate 130 at last.
Then, utilize the mode of etching or boring on substrate 130, to form through hole 150, and the mode of utilizing electroless-plating form a bronze medal layer 160 (seeing Fig. 1 e) on the inwall of the surface 132,134 of substrate 130 and through hole 150.On substrate surface 132,134, form one deck dry film 170 again with shielding layer as plating, so that the conducting wire layer on the substrate surface 132,134, that is the structure 122,124,142 that is embedded on the substrate surface 132,134 is covered by dry film 170, through hole 150 is then exposed, and electroplates layer of copper 180 (seeing Fig. 1 f) afterwards again on the inwall of through hole 150.Then remove with dry film 170 and with the copper layer 160 that the mode of electroless-plating is formed on the substrate surface 132,134.On substrate surface 132,134, form a welding resisting layer 190 subsequently, and structure 122,124,142 is exposed, simultaneously at structure 122,142 last layer organic solderability preservative (organicsolderability preservative; OSP) (see Fig. 1 g).On structure 122 and 142, form dry film 170 again, and on structure 124, electroplate one deck nickel/gold 195 (seeing Fig. 1 h).Again dry film 170 is removed at last.
The above-mentioned structure 124 that is coated with nickel/gold layer 195 is as finger (finger), and in order to electrically connect by bonding wire and external circuitry, structure 122,142 is then as connection pad (pad), in order to electrically connect by tin ball and external circuitry.Because the structure 124 as finger need be done plating, all structures 124 are to be electrically connected, in order to the carrying out of electroplating.Yet,, therefore can't when dispatching from the factory, do testing electrical property to it because structure 124 is to be electrically connected to each other.
In addition, because formed connection pad 122 is to flush with the surface 132 of substrate 130 and welding resisting layer 190 generally all has a no small thickness, when chip electrically connects by tin ball and connection pad 122, tin club only has the height of part to expose welding resisting layer 190 (not shown)s, this can make that the gap (Die Gap) between chip and the substrate 130 is too small, when encapsulation, make primer (underfill) or the black glue (Molding compound) of envelope mould be difficult for filling up the gap between chip and the substrate 130, therefore cause the generation of hole (void).
In view of this, just having needs to propose a kind of manufacture method with circuit board of internally embedded conductive wire, to address the above problem.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method with circuit board of internally embedded conductive wire, wherein the height of connection pad is increased.
For reaching above-mentioned purpose, the manufacture method of the circuit board with internally embedded conductive wire of first embodiment of the invention is prior to forming a bronze medal layer on the support plate, the second surface of this copper layer is to be attached on the support plate, with the structure that then has projection on the second surface opposite first, the pattern of those raised structures is corresponding with the pattern of the conducting wire of desiring to form on substrate.Then with the BT substrate pressing in support plate and B stage, make the raised structures on the copper layer imbed a surface of substrate.Another surface of substrate also can be closed with another copper lamination with raised structures as required.Again support plate is removed from the copper layer, make the second surface of copper layer expose, and on the copper layer, form one deck dry film, offer opening on the dry film simultaneously, so that first and second zone on the second surface of copper layer is exposed with as the shielding layer of electroplating.
Then, substrate is electroplated, be electroplate with a nickel/gold layer on feasible first and second exposed zone.Afterwards, dry film is removed, and the copper layer is carried out etching, make the surface exposure of substrate go out, this moment, original raised structures on the copper layer still was retained in the surface of substrate, and flushed with substrate surface.In etch process, because nickel/gold layer can protect the copper layer of its below can be not etched as shielding layer, to form the structure of giving prominence to substrate.At last, on substrate, form an electroplating ventilating hole, on substrate surface, form a welding resisting layer again, and nickel/gold layer is exposed.
The manufacture method of the circuit board with internally embedded conductive wire of second embodiment of the invention is the manufacture method that is same as the circuit board with internally embedded conductive wire of first embodiment substantially, institute's difference is that first and second zone on the second surface of copper layer must not be coated with nickel/gold layer with as shielding layer, but dry film only is formed on first and second zone, and the copper layer carried out etching, so that the surface exposure of substrate goes out, and original raised structures on the copper layer still is retained in the surface of substrate, and flushes with substrate surface.In etch process, dry film can protect the copper layer of its below can be not etched as shielding layer, to form the structure of outstanding substrate.Afterwards, dry film is removed, and on substrate, form an electroplating ventilating hole, on substrate surface, form a welding resisting layer again, and first and second zone is exposed last layer organic solderability preservative simultaneously.
Another object of the present invention is to provide more than one circuit boards that method of stating manufactures.
According to the manufacture method with circuit board of internally embedded conductive wire of the present invention, the lip-deep raised structures that is embedded in substrate is the conducting wire that forms on the substrate, the position then is used for respectively as connection pad and finger at first and second regional copper layer, in order to external circuitry, for example usefulness of a chip electric connection.Because the first area as connection pad is outstanding substrate, make when chip utilizes tin ball and first area to electrically connect, tin club has more part of height to expose welding resisting layer, increase the gap between chip and the substrate by this, when encapsulation, allow primer or envelope mould deceive the easier gap of filling up between chip and the substrate of glue, avoid the generation of hole.In addition, owing to do not need to be electrically connected, therefore when dispatching from the factory, can do testing electrical property to it as the second area of finger.
In order to allow above and other objects of the present invention, feature and the advantage can be more obvious, the embodiment of the invention cited below particularly, and cooperate appended icon, be described in detail below.
Description of drawings
Fig. 1 a to Fig. 1 h: be known manufacture method with circuit board of internally embedded conductive wire.
Fig. 2 a to Fig. 2 g: be the manufacture method of the circuit board with internally embedded conductive wire of first embodiment of the invention.
Fig. 3 a to Fig. 3 b: be the manufacture method of the circuit board with internally embedded conductive wire of second embodiment of the invention.
Embodiment
With reference to figure 2a to Fig. 2 g, the manufacture method of the circuit board with internally embedded conductive wire of first embodiment of the invention is to form a metal level 220 on a support plate 210, it for example is a bronze medal layer, the second surface 223 of this copper layer 220 is to be attached on the support plate 210, with the structure 222 and 224 that then has projection on second surface 223 opposite first 221, the pattern of those raised structures 222,224 is (see Fig. 2 a and Fig. 2 b) corresponding with the pattern of the conducting wire of desiring to form on substrate., for example be BT (BismaleimideTriazine) substrate 230 pressings in B stage (B stage) then, make the raised structures 222,224 on the copper layer 220 imbed a surface 232 of substrate 230 support plate 210 and a soft substrate.Another surface 234 of substrate 230 also can be as required and another metal level 240 with raised structures 242, for example is that the copper lamination closes (seeing 2c figure).Again support plate 210 is removed from copper layer 220,240, make the copper layer 240 and the second surface 223 of copper layer 220 expose, and on the second surface 223 of copper layer 240 and copper layer 220, form one deck dry film 270 with shielding layer as plating, offer opening 272 on the dry film 270 simultaneously, so that zone 226 on the second surface 223 of copper layer 220 and the zone 246 on the copper layer 240 are exposed (seeing Fig. 2 d).
Then, substrate 230 being electroplated, made to be electroplate with a metal level 280 on exposed regions 226 and 246, for example is a nickel/gold layer (seeing Fig. 2 e).Afterwards, dry film 270 is removed, and copper layer 220,240 is carried out etching, make the surface 232,234 of substrate 230 expose, this moment, original raised structures 222,224,242 on copper layer 220,240 still was retained in the surface 232,234 of substrate 230, and flushed with substrate surface 232,234.In etch process, because nickel/gold layer 280 can protect the copper layer 220 of its below can be not etched as shielding layer, to form the structure (seeing Fig. 2 f) of giving prominence to substrate 230.At last, on substrate 230, form an electroplating ventilating hole 250, on substrate surface 232,234, form a welding resisting layer 290 again, and nickel/gold layer 280 is exposed (seeing Fig. 2 g).
With reference to figure 3a to Fig. 3 b, the manufacture method of the circuit board with internally embedded conductive wire of second embodiment of the invention is the manufacture method that is same as the circuit board with internally embedded conductive wire of first embodiment substantially, institute's difference is that zone 226 on the second surface 223 of copper layer 220 and the zone 246 on the copper layer 240 must not be coated with nickel/gold layer 280 with as shielding layer, but dry film 270 only is formed on the zone 226 and 246, and to copper layer 220,240 carry out etching, so that the surface 232 of substrate 230,234 expose, and originally at copper layer 220, raised structures 222 on 240,224,242 still are retained in the surface 232 of substrate 230,234, and with substrate surface 232,234 flush.In etch process, dry film 270 can protect the copper layer 220 of its below can be not etched as shielding layer, (sees Fig. 3 a) with the structure that forms outstanding substrate 230.Afterwards, dry film 270 is removed, and on substrate 230, form an electroplating ventilating hole 250, on substrate surface 232,234, form a welding resisting layer 290 again, and zone 226,246 is exposed last layer organic solderability preservative (seeing Fig. 3 b) simultaneously.
With reference to figure 2g, circuit board of the present invention includes substrate 230, has two facing surfaces 232,234, and has the through hole 250 that is coated with the copper layer.Conducting wire layer 222 is embedded in substrate 230 in being and is exposed on the surface 232, conducting wire layer 242 is embedded in substrate 230 in then and is exposed on the surface 234, wherein conducting wire layer 222 has zone 226, it is the surface 232 that protrudes in substrate 230, and conducting wire layer 242 has zone 246, and it is the surface 234 that protrudes in substrate 230.Nickel/gold layer 280 is to be formed on the zone 226, and with as connection pad or finger, in order to electrically connecting with external circuitry by tin ball or bonding wire, and nickel/gold layer 280 also is formed on regional 246, with in order to another circuit board electric connection.
According to the manufacture method with circuit board of internally embedded conductive wire of the present invention, be embedded in the surface 232 of substrate 230, raised structures 222 on 234,224, the 242nd, form the conducting wire on the substrate 230, the position in zone 226 copper layer 220 and position on 240 on the copper layer in zone 246 in order to electrically connect with external circuitry, wherein the zone 226 on the structure 222 is as connection pad, in order to electrically connect by tin ball and for example chip, zone 226 on the structure 224 is as finger, in order to electrically connect by bonding wire and for example chip, and the zone 246 on the structure 242 is as connection pad, in order to electrically connect (not shown) by tin ball and for example another circuit board.Because the zone 226 as connection pad is outstanding substrates 230, make when chip utilizes the tin ball to electrically connect with zone 226, tin club has more part of height to expose welding resisting layer 290 (not shown)s, increase the gap between chip and the substrate 230 by this, the time allow the easier gap of filling up between chip and the substrate 230 of primer in encapsulation, avoid the generation of hole.In addition, owing to do not need to be electrically connected, therefore when dispatching from the factory, can do testing electrical property to it as the zone 226 on the structure 224 of finger.
Though the present invention discloses with aforementioned preferred embodiment, so it is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention, and when doing various changes and modification.Therefore protection scope of the present invention is as the criterion when looking appended the claim person of defining.

Claims (5)

1.一种制造电路板的方法,包含下列步骤:1. A method for manufacturing a circuit board, comprising the steps of: 提供基板,该基板具有两相对的第一表面与第二表面;providing a substrate having two opposite first and second surfaces; 于该基板的第一表面上形成第一金属层,该第一金属层具有两相对的第一表面与第二表面,该第一金属层的第一表面上形成有突起结构,其是埋入该基板的第一表面,其中该第一金属层的第二表面上具有一第一区域;A first metal layer is formed on the first surface of the substrate, the first metal layer has two opposite first surfaces and second surfaces, and a protruding structure is formed on the first surface of the first metal layer, which is buried the first surface of the substrate, wherein the first metal layer has a first region on the second surface; 于该第一区域上形成遮蔽层;forming a shielding layer on the first region; 对该第一金属层进行蚀刻,使得裸露于该遮蔽层之外的第一金属层被移除;etching the first metal layer, so that the first metal layer exposed outside the masking layer is removed; 将该遮蔽层移除;及remove the masking layer; and 于该基板的第一表面上形成防焊层,并裸露出该第一金属层。A solder resist layer is formed on the first surface of the substrate, and the first metal layer is exposed. 2.如权利要求1所述的方法,其中于该基板的第一表面上形成第一金属层的步骤包含:2. The method of claim 1, wherein the step of forming a first metal layer on the first surface of the substrate comprises: 提供载板;Provide the carrier board; 于该载板上形成该第一金属层,其中该第一金属层的第二表面是贴附于该载板上;forming the first metal layer on the carrier, wherein the second surface of the first metal layer is attached to the carrier; 将该载板与该基板压合,使得该第一金属层的突起结构埋入该基板的第一表面;及pressing the carrier plate to the substrate, so that the protruding structure of the first metal layer is embedded in the first surface of the substrate; and 将该载板移除。Remove the carrier board. 3.一种制造电路板的方法,包含下列步骤:3. A method of manufacturing a circuit board, comprising the steps of: 提供基板,该基板具有两相对的第一表面与第二表面;providing a substrate having two opposite first and second surfaces; 于该基板的第一表面上形成第一金属层,该第一金属层具有两相对的第一表面与第二表面,其第一表面上形成有突起结构,是埋入该基板的第一表面,其中该第一金属层的第二表面上具有第一区域与第二区域;A first metal layer is formed on the first surface of the substrate, the first metal layer has two opposite first surfaces and second surfaces, and a protruding structure is formed on the first surface, which is embedded in the first surface of the substrate , wherein the second surface of the first metal layer has a first region and a second region; 于该第一金属层的第二表面上形成遮蔽层,并裸露出该第一与第二区域;forming a shielding layer on the second surface of the first metal layer, and exposing the first and second regions; 于该第一与第二区域上形成第二金属层;forming a second metal layer on the first and second regions; 将该遮蔽层移除;remove the masking layer; 对该第一金属层进行蚀刻,使得裸露于该第二金属层之外的第一金属层被移除;及etching the first metal layer such that the first metal layer exposed outside the second metal layer is removed; and 于该基板的第一表面上形成防焊层,并裸露出该第二金属层。A solder resist layer is formed on the first surface of the substrate, and the second metal layer is exposed. 4.如权利要求3所述的方法,其中于该基板的第一表面上形成第一金属层的步骤包含:4. The method of claim 3, wherein the step of forming a first metal layer on the first surface of the substrate comprises: 提供载板;Provide the carrier board; 于该载板上形成该第一金属层,其中该第一金属层的第二表面是贴附于该载板上;forming the first metal layer on the carrier, wherein the second surface of the first metal layer is attached to the carrier; 将该载板与该基板压合,使得该第一金属层的突起结构埋入该基板的第一表面;及pressing the carrier plate to the substrate, so that the protruding structure of the first metal layer is embedded in the first surface of the substrate; and 将该载板移除。Remove the carrier board. 5.如权利要求3所述的方法,更包含:5. The method of claim 3, further comprising: 于该基板的第二表面上形成第三金属层,该第三金属层具有两相对的第一表面与第二表面,该第三金属层的第一表面上形成有突起结构,其是埋入该基板的第二表面,其中该第三金属层的第二表面上具有第三区域;A third metal layer is formed on the second surface of the substrate, the third metal layer has two opposite first surfaces and second surfaces, a protruding structure is formed on the first surface of the third metal layer, which is embedded the second surface of the substrate, wherein the third metal layer has a third region on the second surface; 于该第三金属层的第二表面上形成该遮蔽层,并裸露出该第三区域;forming the shielding layer on the second surface of the third metal layer, and exposing the third region; 于该第三区域上形成第四金属层;forming a fourth metal layer on the third region; 将该第三金属层的第二表面上的遮蔽层移除;removing the masking layer on the second surface of the third metal layer; 对该第三金属层进行蚀刻,使得裸露于该第四金属层之外的第三金属层被移除;及etching the third metal layer so that the third metal layer exposed outside the fourth metal layer is removed; and 于该基板的第二表面上形成该防焊层,并裸露出该第四金属层。The solder resist layer is formed on the second surface of the substrate, and the fourth metal layer is exposed.
CN 200810129055 2008-06-20 2008-06-20 Circuit board with embedded conductive circuit and manufacturing method thereof Active CN101290890B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200810129055 CN101290890B (en) 2008-06-20 2008-06-20 Circuit board with embedded conductive circuit and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200810129055 CN101290890B (en) 2008-06-20 2008-06-20 Circuit board with embedded conductive circuit and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN101290890A CN101290890A (en) 2008-10-22
CN101290890B true CN101290890B (en) 2011-07-27

Family

ID=40035071

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200810129055 Active CN101290890B (en) 2008-06-20 2008-06-20 Circuit board with embedded conductive circuit and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN101290890B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9437565B2 (en) 2014-12-30 2016-09-06 Advanced Seminconductor Engineering, Inc. Semiconductor substrate and semiconductor package structure having the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI581378B (en) * 2008-11-21 2017-05-01 先進封裝技術私人有限公司 Semiconductor substrate
US10462901B1 (en) 2018-07-26 2019-10-29 International Business Machines Corporation Implementing embedded wire repair for PCB constructs

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9437565B2 (en) 2014-12-30 2016-09-06 Advanced Seminconductor Engineering, Inc. Semiconductor substrate and semiconductor package structure having the same

Also Published As

Publication number Publication date
CN101290890A (en) 2008-10-22

Similar Documents

Publication Publication Date Title
TWI425896B (en) Circuit board with buried conductive trace formed thereon and method for manufacturing the same
CN101887874B (en) Single-layer metal layer substrate structure, manufacturing method thereof, and package structure for application
CN102640283B (en) There is semiconductor packages and the manufacture method thereof of embedded tube core
US20100187691A1 (en) Chip package without core and stacked chip package structure
US20080102410A1 (en) Method of manufacturing printed circuit board
CN101282622B (en) Circuit board and method for manufacturing the same
KR20090055316A (en) Semiconductor package, method for manufacturing electronic device and semiconductor package having same
CN106206508B (en) Package board, the method for manufacturing package board and the stacked package part with package board
JP2009302505A (en) Semiconductor device and method of manufacturing semiconductor device
CN112802757B (en) Substrate preparation method, substrate structure, chip packaging method and chip packaging structure
TWI819808B (en) Semiconductor package and method for producing same
CN101383301A (en) Method of forming flip-chip bump carrier type package
KR100736636B1 (en) Printed circuit board for electronic device package and manufacturing method thereof
CN101290890B (en) Circuit board with embedded conductive circuit and manufacturing method thereof
JP2009528707A (en) Multilayer package structure and manufacturing method thereof
CN103456715B (en) Intermediary substrate and manufacturing method thereof
KR100732385B1 (en) Package Board Manufacturing Method
KR100923501B1 (en) Package Board Manufacturing Method
CN109545691B (en) Manufacturing method of ultrathin fan-out type packaging structure
TWI471984B (en) Circuit board with buried conductive trace formed thereon and method for manufacturing the same
US6420207B1 (en) Semiconductor package and enhanced FBG manufacturing
US9941208B1 (en) Substrate structure and manufacturing method thereof
CN101916751B (en) Encapsulation structure and manufacturing method thereof
KR101187913B1 (en) Leadframe for semiconductor package and the fabrication method thereof
CN102723291B (en) Flip chip double-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip double-faced three-dimensional circuit encapsulation structure

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant