CN101290890A - Circuit board with embedded conductive circuit and manufacturing method thereof - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 102
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000002184 metal Substances 0.000 claims description 44
- 229910052751 metal Inorganic materials 0.000 claims description 44
- 229910000679 solder Inorganic materials 0.000 claims description 25
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 24
- 239000010931 gold Substances 0.000 claims description 13
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 9
- 230000000873 masking effect Effects 0.000 claims description 8
- 238000003825 pressing Methods 0.000 claims description 3
- 238000005429 filling process Methods 0.000 abstract 1
- 239000003292 glue Substances 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 47
- 229910052802 copper Inorganic materials 0.000 description 47
- 239000010949 copper Substances 0.000 description 47
- 238000009713 electroplating Methods 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 239000003755 preservative agent Substances 0.000 description 1
- 230000002335 preservative effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
本发明提供一种具有内埋式导电线路的电路板的制造方法,是于基板的表面上形成内埋的导电线路层,并增加接垫及手指的高度,以利后续灌胶的制程。
The invention provides a method for manufacturing a circuit board with embedded conductive circuits, which forms an embedded conductive circuit layer on the surface of a substrate and increases the height of pads and fingers to facilitate the subsequent glue filling process.
Description
技术领域 technical field
本发明是有关于一种电路板及其制造方法,更特别有关于一种具有内埋式导电线路的电路板及其制造方法。The present invention relates to a circuit board and its manufacturing method, more particularly to a circuit board with embedded conductive lines and its manufacturing method.
背景技术 Background technique
近年来由于电子组件已经变得多功能且体积越来越小,封装基板的技术也快速的发展,以便实现轻、薄、短、小以及高度密集的线路图案。特别地,如此轻、薄、短、小以及高度密集的线路图案是需要使用在芯片尺寸封装构造(chip scale package;CSP)的产品群上。为了能够在小尺寸的基板上形成密集的线路图案,一般是采用压合的方式在基板上形成内埋式的导电线路。In recent years, as electronic components have become multifunctional and smaller, the technology of packaging substrates has also developed rapidly in order to achieve light, thin, short, small and highly dense circuit patterns. In particular, such light, thin, short, small and highly dense circuit patterns are required to be used in chip scale package (CSP) product groups. In order to form dense circuit patterns on a small-sized substrate, embedded conductive circuits are generally formed on the substrate by pressing.
参考图1a至图1h,现有于基板上形成内埋式导电线路的制造方法是先于一载板110上形成一铜层120,该铜层120上具有突起的结构122与124,该些突起结构122、124的图案是与欲在基板上形成的导电线路的图案相对应(见图1a与图1b)。接着将载板110与一软的基板,例如是B阶段(B stage)的BT(Bismaleimide Triazine)基板130压合,使得铜层120上的突起结构122、124埋入基板130的一表面132。基板130的另一表面134亦可根据需要与另一具有突起结构142的铜层140压合(见图1c)。再将载板110从铜层120、140上移除,并利用蚀刻的方式将铜层120、140薄化,使得基板130的表面132、134裸露出,此时原先在铜层120、140上的突起结构122、124、142仍保留在基板130的表面132、134并与基板表面132、134齐平。这些埋入在基板130的表面132、134上的突起结构122、124、142最后会形成基板130上的导电线路层(见图1d)。Referring to FIG. 1a to FIG. 1h, the existing manufacturing method for forming embedded conductive circuits on a substrate is to form a
接着,利用蚀刻或钻孔的方式在基板130上形成通孔150,并利用无电电镀的方式在基板130的表面132、134以及通孔150的内壁上形成一铜层160(见图1e)。再于基板表面132、134上形成一层干膜170以做为电镀的遮蔽层,以使得基板表面132、134上的导电线路层,亦即埋在基板表面132、134上的结构122、124、142被干膜170所覆盖,而通孔150则被裸露出,之后再于通孔150的内壁上电镀一层铜180(见图1f)。接着将干膜170以及以无电电镀的方式形成在基板表面132、134上的铜层160移除。随后在基板表面132、134上形成一防焊层190,并将结构122、124、142裸露出,同时在结构122、142上一层有机保焊剂(organicsolderability preservative;OSP)(见图1g)。再于结构122与142上形成干膜170,并于结构124上电镀一层镍/金195(见图1h)。最后再将干膜170移除。Next, a
上述镀有镍/金层195的结构124做为手指(finger),用以藉由焊线与外界电路电性连接,而结构122、142则做为接垫(pad),用以藉由锡球与外界电路电性连接。由于做为手指的结构124需要做电镀,所有的结构124是电性连接在一起,以利电镀的进行。然而,由于结构124是彼此电性连接,因此无法在出厂时对其做电性测试。The
另外,由于所形成的接垫122是与基板130的表面132齐平且防焊层190一般均具有一个不小的厚度,当芯片藉由锡球与接垫122电性连接时,锡球会仅有部分的高度露出防焊层190(未显示),这会使得芯片与基板130之间的间隙(Die Gap)过小,在封装时使得底胶(underfill)或封模黑胶(Molding compound)不易填满芯片与基板130之间的间隙,因此造成孔洞(void)的产生。In addition, since the
有鉴于此,便有需要提出一种具有内埋式导电线路的电路板的制造方法,以解决上述问题。In view of this, it is necessary to propose a method for manufacturing a circuit board with embedded conductive circuits to solve the above problems.
发明内容 Contents of the invention
本发明的目的在于提供一种具有内埋式导电线路的电路板的制造方法,其中接垫的高度被增加。The object of the present invention is to provide a method of manufacturing a circuit board with embedded conductive traces, wherein the height of the pads is increased.
为达上述目的,本发明第一实施例的具有内埋式导电线路的电路板的制造方法是先于一载板上形成一铜层,该铜层的第二表面是贴附于载板上,而与第二表面相对的第一表面上则具有突起的结构,该些突起结构的图案是与欲在基板上形成的导电线路的图案相对应。接着将载板与B阶段的BT基板压合,使得铜层上的突起结构埋入基板的一表面。基板的另一表面亦可根据需要与另一具有突起结构的铜层压合。再将载板从铜层上移除,使得铜层的第二表面裸露出,并于铜层上形成一层干膜以做为电镀的遮蔽层,同时干膜上开设有开口,以将铜层的第二表面上的第一及第二区域裸露出。In order to achieve the above purpose, the manufacturing method of the circuit board with embedded conductive circuit according to the first embodiment of the present invention is to form a copper layer on a carrier board first, and the second surface of the copper layer is attached to the carrier board , and the first surface opposite to the second surface has protruding structures, and the patterns of these protruding structures correspond to the patterns of the conductive lines to be formed on the substrate. Then, the carrier board is pressed against the B-stage BT substrate, so that the protruding structure on the copper layer is embedded in a surface of the substrate. The other surface of the substrate can also be laminated with another copper layer having a protrusion structure as required. Then the carrier board is removed from the copper layer, so that the second surface of the copper layer is exposed, and a layer of dry film is formed on the copper layer as a shielding layer for electroplating. The first and second regions on the second surface of the layer are exposed.
接着,对基板进行电镀,使得裸露的第一及第二区域上电镀有一镍/金层。之后,将干膜移除,并对铜层进行蚀刻,使得基板的表面裸露出,此时原先在铜层上的突起结构仍保留在基板的表面,并与基板表面齐平。于蚀刻制程中,由于镍/金层做为遮蔽层可保护其下方的铜层不会被蚀刻掉,以形成突出基板的结构。最后,在基板上形成一电镀通孔,再于基板表面上形成一防焊层,并将镍/金层裸露出。Then, the substrate is electroplated, so that a nickel/gold layer is electroplated on the exposed first and second regions. Afterwards, the dry film is removed, and the copper layer is etched to expose the surface of the substrate. At this time, the protrusion structure on the copper layer remains on the surface of the substrate and is flush with the surface of the substrate. During the etching process, since the nickel/gold layer serves as a masking layer to protect the underlying copper layer from being etched away, a structure protruding from the substrate is formed. Finally, an electroplating through hole is formed on the substrate, and a solder resist layer is formed on the surface of the substrate, and the nickel/gold layer is exposed.
本发明第二实施例的具有内埋式导电线路的电路板的制造方法是大体上相同于第一实施例的具有内埋式导电线路的电路板的制造方法,所不同之处在于铜层的第二表面上的第一及第二区域不须镀有镍/金层以做为遮蔽层,而是将干膜仅形成在第一及第二区域上,并对铜层进行蚀刻,以使得基板的表面裸露出,而原先在铜层上的突起结构仍保留在基板的表面,并与基板表面齐平。于蚀刻制程中,干膜做为遮蔽层可保护其下方的铜层不会被蚀刻掉,以形成突出基板的结构。之后,将干膜移除,并在基板上形成一电镀通孔,再于基板表面上形成一防焊层,并将第一及第二区域裸露出同时上一层有机保焊剂。The manufacturing method of the circuit board with embedded conductive circuit of the second embodiment of the present invention is substantially the same as the manufacturing method of the circuit board with embedded conductive circuit of the first embodiment, the difference lies in the copper layer The first and second areas on the second surface do not need to be plated with nickel/gold as a masking layer, but a dry film is formed only on the first and second areas, and the copper layer is etched so that The surface of the substrate is exposed, while the protrusion structure on the copper layer remains on the surface of the substrate and is flush with the surface of the substrate. In the etching process, the dry film is used as a masking layer to protect the underlying copper layer from being etched away, so as to form a structure protruding from the substrate. Afterwards, the dry film is removed, and an electroplated through hole is formed on the substrate, and a solder mask layer is formed on the surface of the substrate, and the first and second regions are exposed and a layer of organic solder flux is applied.
本发明的另一目的在于提供一种以上述的方法所制造出的电路板。Another object of the present invention is to provide a circuit board manufactured by the above method.
根据本发明的具有内埋式导电线路的电路板的制造方法,埋在基板的表面上的突起结构是形成基板上的导电线路,而位在第一及第二区域的铜层则分别用来做为接垫及手指,用以与外界电路,例如一芯片电性连接之用。由于做为接垫的第一区域是突出基板,使得芯片利用锡球与第一区域电性连接时,锡球会有更多部分的高度露出防焊层,藉此增加芯片与基板之间的间隙,在封装时让底胶或封模黑胶更易填满芯片与基板之间的间隙,避免孔洞的产生。另外,由于做为手指的第二区域不需要电性连接在一起,因此在出厂时即可对其做电性测试。According to the method for manufacturing a circuit board with embedded conductive circuits of the present invention, the protruding structure buried on the surface of the substrate forms the conductive circuits on the substrate, and the copper layers in the first and second regions are respectively used to As pads and fingers, it is used to electrically connect with external circuits, such as a chip. Since the first area used as a pad protrudes from the substrate, when the chip is electrically connected to the first area by using solder balls, more of the height of the solder balls will expose the solder resist layer, thereby increasing the distance between the chip and the substrate. The gap makes it easier for the primer or mold sealer to fill the gap between the chip and the substrate during packaging to avoid the generation of holes. In addition, because the second area used as the finger does not need to be electrically connected together, it can be electrically tested before leaving the factory.
为了让本发明的上述和其它目的、特征、和优点能更明显,下文特举本发明实施例,并配合所附图标,作详细说明如下。In order to make the above and other objects, features, and advantages of the present invention more apparent, the embodiments of the present invention, together with the attached figures, are described in detail below.
附图说明 Description of drawings
图1a至图1h:为习知具有内埋式导电线路的电路板的制造方法。FIG. 1a to FIG. 1h are conventional manufacturing methods of circuit boards with embedded conductive circuits.
图2a至图2g:为本发明第一实施例的具有内埋式导电线路的电路板的制造方法。2a to 2g are the manufacturing method of the circuit board with embedded conductive circuit according to the first embodiment of the present invention.
图3a至图3b:为本发明第二实施例的具有内埋式导电线路的电路板的制造方法。3a to 3b are the manufacturing method of the circuit board with embedded conductive lines according to the second embodiment of the present invention.
具体实施方式 Detailed ways
参考图2a至图2g,本发明第一实施例的具有内埋式导电线路的电路板的制造方法是于一载板210上形成一金属层220,例如是一铜层,该铜层220的第二表面223是贴附于载板210上,而与第二表面223相对的第一表面221上则具有突起的结构222与224,该些突起结构222、224的图案是与欲在基板上形成的导电线路的图案相对应(见图2a与图2b)。接着将载板210与一软的基板,例如是B阶段(B stage)的BT(BismaleimideTriazine)基板230压合,使得铜层220上的突起结构222、224埋入基板230的一表面232。基板230的另一表面234亦可根据需要与另一具有突起结构242的金属层240,例如是铜层压合(见第2c图)。再将载板210从铜层220、240上移除,使得铜层240与铜层220的第二表面223裸露出,并于铜层240与铜层220的第二表面223上形成一层干膜270以做为电镀的遮蔽层,同时干膜270上开设有开口272,以将铜层220的第二表面223上的区域226以及铜层240上的区域246裸露出(见图2d)。2a to 2g, the manufacturing method of the circuit board with embedded conductive lines according to the first embodiment of the present invention is to form a
接着,对基板230进行电镀,使得裸露的区域226与246上电镀有一金属层280,例如是一镍/金层(见图2e)。之后,将干膜270移除,并对铜层220、240进行蚀刻,使得基板230的表面232、234裸露出,此时原先在铜层220、240上的突起结构222、224、242仍保留在基板230的表面232、234,并与基板表面232、234齐平。于蚀刻制程中,由于镍/金层280做为遮蔽层可保护其下方的铜层220不会被蚀刻掉,以形成突出基板230的结构(见图2f)。最后,在基板230上形成一电镀通孔250,再于基板表面232、234上形成一防焊层290,并将镍/金层280裸露出(见图2g)。Next, electroplating is performed on the
参考图3a至图3b,本发明第二实施例的具有内埋式导电线路的电路板的制造方法是大体上相同于第一实施例的具有内埋式导电线路的电路板的制造方法,所不同之处在于铜层220的第二表面223上的区域226以及铜层240上的区域246不须镀有镍/金层280以做为遮蔽层,而是将干膜270仅形成在区域226与246上,并对铜层220、240进行蚀刻,以使得基板230的表面232、234裸露出,而原先在铜层220、240上的突起结构222、224、242仍保留在基板230的表面232、234,并与基板表面232、234齐平。于蚀刻制程中,干膜270做为遮蔽层可保护其下方的铜层220不会被蚀刻掉,以形成突出基板230的结构(见图3a)。之后,将干膜270移除,并在基板230上形成一电镀通孔250,再于基板表面232、234上形成一防焊层290,并将区域226、246裸露出同时上一层有机保焊剂(见图3b)。Referring to Fig. 3a to Fig. 3b, the manufacturing method of the circuit board with embedded conductive circuit of the second embodiment of the present invention is substantially the same as the manufacturing method of the circuit board with embedded conductive circuit of the first embodiment, so The difference is that the
参考图2g,本发明的电路板包含有基板230,具有两相对的表面232、234,并具有镀有铜层的通孔250。导电线路层222是内埋在基板230且裸露于表面232上,而导电线路层242则内埋在基板230且裸露于表面234上,其中导电线路层222具有区域226,其是突出于基板230的表面232,而导电线路层242具有区域246,其是突出于基板230的表面234。镍/金层280是形成于区域226上,以做为接垫或手指,用以藉由锡球或焊线与外界电路电性连接,而镍/金层280亦形成于区域246上,以用以与另一电路板电性连接。Referring to FIG. 2g, the circuit board of the present invention includes a
根据本发明的具有内埋式导电线路的电路板的制造方法,埋在基板230的表面232、234上的突起结构222、224、242是形成基板230上的导电线路,位在区域226的铜层220以及位在区域246的铜层240则用以与外界电路电性连接,其中结构222上的区域226做为接垫,用以藉由锡球与例如芯片电性连接,结构224上的区域226做为手指,用以藉由焊线与例如芯片电性连接,而结构242上的区域246做为接垫,用以藉由锡球与例如另一电路板电性连接(未显示)。由于做为接垫的区域226是突出基板230,使得芯片利用锡球与区域226电性连接时,锡球会有更多部分的高度露出防焊层290(未显示),藉此增加芯片与基板230之间的间隙,在封装时让底胶更易填满芯片与基板230之间的间隙,避免孔洞的产生。另外,由于做为手指的结构224上的区域226不需要电性连接在一起,因此在出厂时即可对其做电性测试。According to the manufacturing method of the circuit board with embedded conductive lines of the present invention, the protruding
虽然本发明已以前述较佳实施例揭示,然其并非用以限定本发明,任何熟习此技艺者,在不脱离本发明的精神和范围内,当可作各种的更动与修改。因此本发明的保护范围当视所附的权利要求所界定者为准。Although the present invention has been disclosed by the aforementioned preferred embodiments, it is not intended to limit the present invention. Any skilled person can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the appended claims.
Claims (11)
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104392968A (en) * | 2008-11-21 | 2015-03-04 | 先进封装技术私人有限公司 | Semiconductor substrate |
CN106033752A (en) * | 2014-12-30 | 2016-10-19 | 日月光半导体制造股份有限公司 | Semiconductor substrate and semiconductor packaging structure with same |
US10462901B1 (en) | 2018-07-26 | 2019-10-29 | International Business Machines Corporation | Implementing embedded wire repair for PCB constructs |
-
2008
- 2008-06-20 CN CN 200810129055 patent/CN101290890B/en active Active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104392968A (en) * | 2008-11-21 | 2015-03-04 | 先进封装技术私人有限公司 | Semiconductor substrate |
CN106033752A (en) * | 2014-12-30 | 2016-10-19 | 日月光半导体制造股份有限公司 | Semiconductor substrate and semiconductor packaging structure with same |
CN106033752B (en) * | 2014-12-30 | 2018-01-09 | 日月光半导体制造股份有限公司 | Semiconductor substrate and semiconductor packaging structure with same |
US9978705B2 (en) | 2014-12-30 | 2018-05-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor substrate and semiconductor package structure having the same |
US10462901B1 (en) | 2018-07-26 | 2019-10-29 | International Business Machines Corporation | Implementing embedded wire repair for PCB constructs |
US11412612B2 (en) | 2018-07-26 | 2022-08-09 | International Business Machines Corporation | Implementing embedded wire repair for PCB constructs |
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