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CN101266961A - Flip chip package structure and method for manufacturing the same - Google Patents

Flip chip package structure and method for manufacturing the same Download PDF

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Publication number
CN101266961A
CN101266961A CN 200810095843 CN200810095843A CN101266961A CN 101266961 A CN101266961 A CN 101266961A CN 200810095843 CN200810095843 CN 200810095843 CN 200810095843 A CN200810095843 A CN 200810095843A CN 101266961 A CN101266961 A CN 101266961A
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chip
substrate
flip
slot
package structure
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CN100573863C (en
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陈光雄
赖庆峰
孙余青
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

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Abstract

The invention relates to a flip chip package structure and a manufacturing method thereof, wherein a support colloid is arranged between a chip with a plurality of gold bumps and a substrate with a slot hole and is positioned in a space which is not covered by the gold bumps at the periphery of the slot hole. The gold bump is arranged between the substrate and the chip and around the slot hole, and is electrically connected with the substrate and the chip by a flip chip bonding method. Finally, an encapsulation material at least covers the gold bump and the slot. Therefore, the invention can reduce the processing time, increase the welding reliability of the gold bump, improve the yield, reduce the processing temperature of flip chip bonding and reduce the production cost.

Description

覆晶封装结构及其制造方法 Flip-chip package structure and manufacturing method thereof

技术领域 technical field

本发明是关于一种封装结构及其制造方法,详言之,是关于一种覆晶封装结构及其制造方法。The present invention relates to a packaging structure and a manufacturing method thereof, in particular, to a flip-chip packaging structure and a manufacturing method thereof.

背景技术 Background technique

参考图1,其显示传统覆晶封装结构的制造方法的流程图;图2显示传统覆晶封装结构的示意图。配合参考图1及图2,首先参考步骤S11,以植凸块制程形成数个焊料凸块11于一芯片10上。参考步骤S12,设置该芯片10于一基板12上,所述焊料凸块11电性连接该芯片10与该基板12的数个接垫(图未示出),该芯片10与该基板12是利用回焊制程进行覆晶接合。其中,所述焊料凸块11需预先沾附助焊剂(pre-solder),并与该基板12的所述接垫对位,再进行回焊制程(制程温度约240-260℃/分钟),以覆晶接合该芯片10与该基板12。参考步骤S13,填设一底胶材料13于该芯片10与该基板12之间,并覆盖所述焊料凸块11。参考步骤S14,进行一第一烘烤步骤,以固化该底胶材料13。参考步骤S15,进行一封胶制程,以封胶14包覆该芯片10与该基板12。参考步骤S16,最后,进行一第二烘烤步骤,以固化该封胶14,以完成一传统覆晶封装结构1。Referring to FIG. 1 , it shows a flowchart of a manufacturing method of a conventional flip-chip package structure; FIG. 2 shows a schematic diagram of a conventional flip-chip package structure. Referring to FIG. 1 and FIG. 2 , first referring to step S11 , a plurality of solder bumps 11 are formed on a chip 10 by a bump implantation process. Referring to step S12, the chip 10 is set on a substrate 12, and the solder bumps 11 are electrically connected to several pads (not shown) of the chip 10 and the substrate 12, the chip 10 and the substrate 12 are Flip-chip bonding is performed using a reflow process. Wherein, the solder bumps 11 need to be pre-coated with flux (pre-solder), and aligned with the pads of the substrate 12, and then undergo a reflow process (the process temperature is about 240-260° C./minute), The chip 10 and the substrate 12 are flip-chip bonded. Referring to step S13 , a primer material 13 is filled between the chip 10 and the substrate 12 to cover the solder bumps 11 . Referring to step S14 , a first baking step is performed to cure the primer material 13 . Referring to step S15 , an encapsulation process is performed to cover the chip 10 and the substrate 12 with the encapsulant 14 . Referring to step S16 , finally, a second baking step is performed to cure the encapsulant 14 to complete a conventional flip-chip package structure 1 .

该传统覆晶封装结构的制造方法具有以下缺点:The manufacturing method of the conventional flip-chip packaging structure has the following disadvantages:

(1)利用植凸块(bumping)制程制作含有焊料凸块的芯片成本较高。(1) The cost of manufacturing chips with solder bumps using a bumping process is relatively high.

(2)需要使用助焊剂,故增加成本,且,若是使用非挥发性助焊剂时,需有清洗制程,除增加制程时间及成本外,并会有助焊剂残留的问题。(2) Flux needs to be used, so the cost is increased, and if non-volatile flux is used, a cleaning process is required. In addition to increasing the process time and cost, there will be a problem of flux residue.

(3)以回焊制程进行覆晶接合,以及对底胶材料进行烘烤制程,其制程中的高温会造成基板有翘曲的缺陷。(3) The reflow process is used for flip-chip bonding, and the primer material is baked. The high temperature in the process will cause the substrate to warp.

(4)需以回焊制程进行覆晶接合,加上需针对每一芯片逐一进行底胶材料的点胶充填,以及后续底胶材料进行烘烤制程,其所需的制程时间长,故会大幅降低产品的产率。(4) Flip-chip bonding needs to be carried out in a reflow process, plus the dispensing and filling of the primer material for each chip is required, and the subsequent baking process of the primer material is required. The required process time is long, so it will be Significantly reduce the yield of the product.

因此,有必要提供一种创新且具进步性的覆晶封装结构及其制造方法,以解决上述问题。Therefore, it is necessary to provide an innovative and progressive flip-chip packaging structure and its manufacturing method to solve the above problems.

发明内容 Contents of the invention

本发明的一目的在于提供一种覆晶封装结构。该覆晶封装结构包括一基板、一芯片、至少一支撑胶体及一封胶材料。该基板具有一槽孔。该芯片设置于该基板上,该芯片具有一主动表面,该主动表面具有数个金凸块,所述金凸块设置于该基板与该芯片之间且于该槽孔周边,并电性连接该基板及该芯片。该支撑胶体设置于该基板与该芯片之间,并位于该槽孔周边未被所述金凸块覆盖的空间。该封胶材料至少包覆所述金凸块及该槽孔。An object of the present invention is to provide a flip-chip package structure. The flip-chip packaging structure includes a substrate, a chip, at least one supporting colloid and sealing glue material. The substrate has a slot. The chip is arranged on the substrate, the chip has an active surface, the active surface has several gold bumps, the gold bumps are arranged between the substrate and the chip and around the slot hole, and are electrically connected The substrate and the chip. The supporting colloid is disposed between the substrate and the chip, and is located in a space around the slot not covered by the gold bumps. The sealing material covers at least the gold bump and the slot.

本发明的另一目的在于提供一种覆晶封装结构的制造方法。该制造方法包括以下步骤:(a)提供一基板,该基板具有一槽孔;(b)提供一芯片,该芯片具有一主动表面,该主动表面具有数个金凸块;(c)设置至少一支撑胶体于该基板与该芯片之间,并使该支撑胶体位于该槽孔周边未被所述金凸块覆盖的空间,且不覆盖所述金凸块及该槽孔;(d)接合该基板与该芯片,该芯片的所述金凸块设置于该基板与该芯片之间且位于该槽孔周边,并电性连接该基板及该芯片;及(e)设置一封胶材料以至少包覆所述金凸块及该槽孔。Another object of the present invention is to provide a method for manufacturing a flip-chip package structure. The manufacturing method comprises the following steps: (a) providing a substrate, the substrate has a slot hole; (b) providing a chip, the chip has an active surface, and the active surface has several gold bumps; (c) setting at least A supporting colloid is between the substrate and the chip, and the supporting colloid is located in the space around the slot that is not covered by the gold bump, and does not cover the gold bump and the slot; (d) bonding The substrate and the chip, the gold bumps of the chip are arranged between the substrate and the chip and are located around the slot hole, and are electrically connected to the substrate and the chip; and (e) setting a sealing material to At least the gold bump and the slot are covered.

本发明覆晶封装结构及其制造方法,其是形成数个金凸块于该芯片表面(打线或电镀制程),以取代传统高成本的植凸块制程。并且,一次性地设置该支撑胶体于该芯片上或该基板上(点胶方式、网板印刷方式或贴胶方式),以免去传统底胶制程中,逐一缓慢点胶所造成产率降低的问题。再者,本发明可以超音波制程或热压合制程进行覆晶接合该基板与该芯片,以大幅地降低传统覆晶接合的制程温度及时间,同时亦可省略助焊剂的使用。The flip-chip packaging structure and its manufacturing method of the present invention form several gold bumps on the surface of the chip (wire bonding or electroplating process) to replace the traditional high-cost bump planting process. In addition, the support colloid is placed on the chip or the substrate at one time (dispensing method, screen printing method or glue application method), so as to avoid the production rate reduction caused by slow dispensing one by one in the traditional primer process. question. Furthermore, the present invention can carry out flip-chip bonding of the substrate and the chip through an ultrasonic process or a thermocompression bonding process, so as to greatly reduce the process temperature and time of traditional flip-chip bonding, and can also omit the use of flux.

另外,因为该支撑胶体及该封胶材料封胶材料可填满于该芯片与该基板之间,即可省去传统底胶制程且可确保焊接凸块的可靠度,故可节省制程时间。此外,本发明的该支撑胶体可一并于封胶后烘烤制程(post moldcure)制程中进行烘烤,故所需的烘烤固化时间较传统底胶制程所需的时间大幅缩短。In addition, since the supporting gel and the sealing material can be filled between the chip and the substrate, the traditional undercoating process can be omitted and the reliability of the welding bump can be ensured, thereby saving process time. In addition, the supporting colloid of the present invention can be baked in the post moldcure process, so the required baking and curing time is greatly shortened compared with the traditional primer process.

附图说明 Description of drawings

图1显示传统覆晶封装结构的制造方法的流程图;FIG. 1 shows a flowchart of a manufacturing method of a conventional flip-chip package structure;

图2显示传统覆晶封装结构的示意图;FIG. 2 shows a schematic diagram of a conventional flip chip package structure;

图3显示依据本发明第一实施例覆晶封装结构的制造方法的流程图;FIG. 3 shows a flowchart of a manufacturing method of a flip-chip package structure according to a first embodiment of the present invention;

图4显示依据本发明第一实施例一芯片利用一支撑胶体设置于一基板上的示意图;4 shows a schematic diagram of a chip disposed on a substrate using a supporting gel according to the first embodiment of the present invention;

图5显示依据本发明第一实施例金凸块设置于槽孔一侧的周边的覆晶封装结构的示意图;5 shows a schematic diagram of a flip-chip package structure in which gold bumps are disposed on the periphery of one side of the slot hole according to the first embodiment of the present invention;

图6显示依据本发明第一实施例金凸块设置于槽孔一侧的周边的覆晶封装结构的另一实施态样示意图;6 shows a schematic diagram of another implementation of the flip-chip package structure in which gold bumps are disposed on the periphery of one side of the slot hole according to the first embodiment of the present invention;

图7显示依据本发明第一实施例金凸块形成于基板的槽孔二侧的周边的覆晶封装结构示意图;7 shows a schematic diagram of a flip-chip package structure in which gold bumps are formed on the periphery of both sides of the slot hole of the substrate according to the first embodiment of the present invention;

图8显示依据本发明第一实施例金凸块形成于基板的槽孔二侧的周边的覆晶封装结构的另一实施态样示意图;8 is a schematic diagram showing another implementation of the flip-chip package structure in which gold bumps are formed on the periphery of both sides of the slot hole of the substrate according to the first embodiment of the present invention;

图9显示依据本发明第二实施例金凸块设置于槽孔一侧的周边的覆晶封装结构的示意图;9 shows a schematic diagram of a flip-chip package structure in which gold bumps are disposed on the periphery of one side of the slot hole according to the second embodiment of the present invention;

图10显示依据本发明第二实施例金凸块设置于槽孔一侧的周边的覆晶封装结构的另一实施态样示意图;10 is a schematic diagram showing another implementation of the flip-chip package structure in which gold bumps are disposed on the periphery of one side of the slot hole according to the second embodiment of the present invention;

图11显示依据本发明第二实施例金凸块形成于基板的槽孔二侧的周边的覆晶封装结构示意图;FIG. 11 shows a schematic diagram of a flip-chip package structure in which gold bumps are formed on the periphery of both sides of the slot hole of the substrate according to the second embodiment of the present invention;

图12显示依据本发明第二实施例金凸块形成于基板的槽孔二侧的周边的覆晶封装结构的另一实施态样示意图。FIG. 12 is a schematic diagram of another implementation of the flip-chip package structure in which gold bumps are formed on the periphery of both sides of the slot hole of the substrate according to the second embodiment of the present invention.

具体实施方式 Detailed ways

图3显示本发明第一实施例覆晶封装结构的制造方法的流程图;图4显示本发明第一实施例设置一芯片于一基板上的示意图;图5显示本发明第一实施例覆晶封装结构的示意图。配合参考图3、图4及图5,首先参考步骤S21,提供一基板21,该基板具有一槽孔211。参考步骤S22,提供一芯片22,该芯片22具有一主动表面221,该主动表面221具有数个金凸块222。其中,所述金凸块222可利用打线制程形成于该芯片22的该主动表面221,或者,所述金凸块222亦可利用电镀制程形成于该芯片22的该主动表面221。接着,设置一支撑胶体23于该基板21与该芯片22之间,并位于该槽孔211周边未被所述金凸块222覆盖的空间。其中,该支撑胶体23可利用点胶方式、网板印刷方式或贴胶方式设置于该芯片22的该主动表面221上。要注意的是,亦可先设置该支撑胶体23于该基板21上,然后再贴合该基板21与该芯片22。Fig. 3 shows the flow chart of the manufacturing method of the flip-chip packaging structure according to the first embodiment of the present invention; Fig. 4 shows the schematic diagram of setting a chip on a substrate according to the first embodiment of the present invention; Fig. 5 shows the flip-chip according to the first embodiment of the present invention Schematic diagram of the package structure. With reference to FIG. 3 , FIG. 4 and FIG. 5 , first referring to step S21 , a substrate 21 is provided, and the substrate has a slot 211 . Referring to step S22 , a chip 22 is provided, and the chip 22 has an active surface 221 with a plurality of gold bumps 222 . Wherein, the gold bumps 222 can be formed on the active surface 221 of the chip 22 by a wire bonding process, or the gold bumps 222 can also be formed on the active surface 221 of the chip 22 by an electroplating process. Next, a supporting colloid 23 is disposed between the substrate 21 and the chip 22 , and is located in a space around the slot 211 not covered by the gold bump 222 . Wherein, the supporting colloid 23 can be disposed on the active surface 221 of the chip 22 by dispensing, screen printing or pasting. It should be noted that the supporting colloid 23 can also be disposed on the substrate 21 first, and then the substrate 21 and the chip 22 are bonded together.

参考步骤S23,接合该基板21与该芯片22。其中,该芯片22的所述金凸块222设置于该基板21与该芯片22之间且于该槽孔211周边(在本实施例中所述金凸块222设置于该槽孔211的一侧的周边),并电性连接该基板21及该芯片22。较佳地,该基板21及该芯片22是以一超音波制程进行覆晶接合,或者,该基板21及该芯片22亦可以一热压合制程进行覆晶接合。较佳地,在接合该基板21与该芯片22步骤之后,可另包括一第一烘烤的步骤,以固化该支撑胶体23。Referring to step S23 , the substrate 21 and the chip 22 are bonded. Wherein, the gold bump 222 of the chip 22 is arranged between the substrate 21 and the chip 22 and around the slot 211 (in this embodiment, the gold bump 222 is arranged on a side of the slot 211 side), and electrically connect the substrate 21 and the chip 22. Preferably, the substrate 21 and the chip 22 are flip-chip bonded by an ultrasonic process, or the substrate 21 and the chip 22 can also be flip-chip bonded by a thermocompression bonding process. Preferably, after the step of bonding the substrate 21 and the chip 22 , a first baking step may be further included to cure the supporting glue 23 .

参考步骤S24,最后,进行一封胶制程,以一封胶材料24覆盖部分该基板21、该芯片22、该支撑胶体23、所述金凸块222及该槽孔211。较佳地,在设置该封胶材料24步骤之后,可另包括一第二烘烤步骤,以固化该封胶材料24。Referring to step S24 , finally, an encapsulation process is performed to cover part of the substrate 21 , the chip 22 , the supporting colloid 23 , the gold bumps 222 and the slots 211 with an encapsulant material 24 . Preferably, after the step of setting the sealing material 24 , a second baking step may be included to cure the sealing material 24 .

再参考图5,其显示本发明第一实施例覆晶封装结构的示意图。该覆晶封装结构2包括一基板21、一芯片22、一支撑胶体23及一封胶材料24。该基板21具有一槽孔211,在本实施例中,该基板21为一印刷电路板。Referring to FIG. 5 again, it shows a schematic diagram of the flip-chip package structure according to the first embodiment of the present invention. The flip-chip package structure 2 includes a substrate 21 , a chip 22 , a supporting colloid 23 and a sealing material 24 . The substrate 21 has a slot 211 , and in this embodiment, the substrate 21 is a printed circuit board.

该芯片22具有一主动表面221,该主动表面221具有数个金凸块222,所述金凸块222设置于该基板21与该芯片22之间且位于该槽孔211的一侧的周边,并电性连接该基板21及该芯片22。在本实施例中该主动表面221具有数个接垫(图未示出),所述金凸块222是与所述接垫电性连接。The chip 22 has an active surface 221, and the active surface 221 has a plurality of gold bumps 222, and the gold bumps 222 are arranged between the substrate 21 and the chip 22 and are located on the periphery of one side of the slot hole 211, And electrically connect the substrate 21 and the chip 22 . In this embodiment, the active surface 221 has several pads (not shown), and the gold bumps 222 are electrically connected to the pads.

该支撑胶体23设置于该基板21与该芯片22之间,并位于该槽孔211周边未被所述金凸块222覆盖的空间。较佳地,该支撑胶体23为B阶酚醛树脂,或者,该支撑胶体23可为环氧树脂(epoxy)。要注意的是,该支撑胶体23可为环状或不连续状。The supporting colloid 23 is disposed between the substrate 21 and the chip 22 , and is located in a space around the slot 211 not covered by the gold bumps 222 . Preferably, the supporting colloid 23 is B-stage phenolic resin, or the supporting colloid 23 can be epoxy resin. It should be noted that the supporting colloid 23 can be ring-shaped or discontinuous.

该封胶材料24覆盖该基板21的一表面、该芯片22、该支撑胶体23、该金凸块222及该槽孔211,其中,该封胶材料24的一侧表面与该基板21的一侧边齐平。较佳地,该封胶材料24为一固态环氧树脂模封材料。在本实施例中,覆盖该槽孔211部分的该封胶材料24相对于该基板21的一底面为一凸部。在其它应用中,覆盖该槽孔211部分的该封胶材料24亦可与该基板21的该底面齐平,如图6所示。The sealing material 24 covers a surface of the substrate 21 , the chip 22 , the support colloid 23 , the gold bump 222 and the slot 211 , wherein one side surface of the sealing material 24 and a surface of the substrate 21 The sides are flush. Preferably, the sealing material 24 is a solid epoxy resin molding material. In this embodiment, the sealing material 24 covering the slot 211 is a protrusion relative to a bottom surface of the substrate 21 . In other applications, the sealing material 24 covering the slot 211 may also be flush with the bottom surface of the substrate 21 , as shown in FIG. 6 .

参考图7及图8,要注意的是,主动表面221所述金凸块22可分别设置于该基板21上且于该槽孔211周边的二侧的周边。其中,覆盖该槽孔211部分的该封胶材料24相对于该基板21的一底面亦可为一凸部(如图7所示),或与该基板21的该底面齐平(如图8所示)。Referring to FIG. 7 and FIG. 8 , it should be noted that the gold bumps 22 on the active surface 221 can be respectively disposed on the substrate 21 at the periphery of two sides of the periphery of the slot hole 211 . Wherein, the sealing material 24 covering the slot 211 can also be a convex portion (as shown in FIG. 7 ) relative to a bottom surface of the substrate 21, or be flush with the bottom surface of the substrate 21 (as shown in FIG. 8 ). shown).

参考图9,其显示本发明第二实施例覆晶封装结构的示意图。该覆晶封装结构3包括一基板31、一芯片32、一支撑胶体33及一封胶材料34。该第二实施例覆晶封装结构3与上述该第一实施例覆晶封装结构2不同的处在于,在该第一实施例中该封胶材料24是覆盖该基板21的一表面、该芯片22、该支撑胶体23、所述金凸块222及该槽孔211,在该第二实施例中该封胶材料34是覆盖该基板31的槽孔311中该芯片32的部分该主动表面321、部分该支撑胶体33、所述金凸块322及该槽孔311。Referring to FIG. 9 , it shows a schematic diagram of a flip-chip package structure according to a second embodiment of the present invention. The flip-chip package structure 3 includes a substrate 31 , a chip 32 , a supporting gel 33 and a sealing material 34 . The difference between the flip-chip package structure 3 of the second embodiment and the flip-chip package structure 2 of the first embodiment is that in the first embodiment, the sealing material 24 covers a surface of the substrate 21, the chip 22. The supporting colloid 23, the gold bump 222 and the slot 211, in the second embodiment, the sealing material 34 covers the part of the active surface 321 of the chip 32 in the slot 311 of the substrate 31 , part of the supporting colloid 33 , the gold bump 322 and the slot 311 .

较佳地,在该第二实施例中,该封胶材料34为一底胶或一液态模封材料。其中,覆盖该槽孔311部分的该封胶材料34相对于该基板31的一底面亦可为一凸部(如图9所示),或与该基板31的该底面齐平(如图10所示)。Preferably, in the second embodiment, the sealing material 34 is a primer or a liquid molding material. Wherein, the sealing material 34 covering the slot 311 can also be a convex portion (as shown in FIG. 9 ) relative to a bottom surface of the substrate 31, or be flush with the bottom surface of the substrate 31 (as shown in FIG. 10 ). shown).

要注意的是,所述金凸块322亦可分别设置于该基板31与该芯片32之间且位于该槽孔311周边的二侧的周边。另外,覆盖该槽孔311部分的该封胶材料34相对于该基板31的一底面亦可为一凸部(如图11所示),或与该基板31的该底面齐平(如图12所示)。It should be noted that the gold bumps 322 can also be respectively disposed between the substrate 31 and the chip 32 and located on two sides of the periphery of the slot 311 . In addition, the sealing material 34 covering the slot 311 can also be a convex portion relative to a bottom surface of the substrate 31 (as shown in FIG. 11 ), or be flush with the bottom surface of the substrate 31 (as shown in FIG. 12 ). shown).

本发明覆晶封装结构及其制造方法,其是利用打线或电镀制程形成数个金凸块于芯片表面,以取代传统高成本的植凸块制程。并且,一次性地设置支撑胶体于芯片上或基板上(点胶方式、网板印刷方式或贴胶方式),以免去传统底胶制程中,逐一缓慢点胶所造成产率降低的问题。再者,本发明可以超音波制程或热压合制程进行覆晶接合该基板与该芯片,以大幅地降低传统覆晶接合的制程温度及时间,同时亦可省略助焊剂的使用。The flip-chip packaging structure and its manufacturing method of the present invention utilize wire bonding or electroplating process to form several gold bumps on the surface of the chip to replace the traditional high-cost bump planting process. In addition, the support colloid is placed on the chip or the substrate at one time (dispensing method, screen printing method or glue application method), so as to avoid the problem of lower productivity caused by slow dispensing one by one in the traditional primer process. Furthermore, the present invention can carry out flip-chip bonding of the substrate and the chip through an ultrasonic process or a thermocompression bonding process, so as to greatly reduce the process temperature and time of traditional flip-chip bonding, and can also omit the use of flux.

另外,因为支撑胶体及封胶材料可填满于芯片与基板之间,即可省去传统底胶制程且可确保焊接凸块的可靠度,故可节省制程时间。此外,本发明的支撑胶体可一并于封胶后烘烤制程(post mold cure)中进行烘烤,故所需的烘烤固化时间较传统底胶制程所需的时间大幅缩短。In addition, because the supporting colloid and sealing material can be filled between the chip and the substrate, the traditional undercoating process can be omitted and the reliability of the solder bump can be ensured, thereby saving process time. In addition, the supporting colloid of the present invention can be baked in a post mold cure process, so the required baking and curing time is greatly shortened compared with the traditional primer process.

惟上述实施例仅为说明本发明的原理及其功效,而非用以限制本发明。因此,习于此技术的人士对上述实施例进行修改及变化仍不脱本发明的精神。本发明的权利范围应如后述的权利要求所列。However, the above-mentioned embodiments are only to illustrate the principles and effects of the present invention, not to limit the present invention. Therefore, those skilled in the art can modify and change the above embodiments without departing from the spirit of the present invention. The scope of rights of the present invention should be listed in the following claims.

Claims (15)

1.一种覆晶封装结构,包括:1. A flip-chip packaging structure, comprising: 基板,具有一槽孔;the substrate has a slot; 芯片,设置于该基板上,该芯片具有一主动表面,该主动表面具有数个金凸块,所述金凸块设置于该基板与该芯片之间且于该槽孔周边,并电性连接该基板及该芯片;Chip, arranged on the substrate, the chip has an active surface, the active surface has several gold bumps, the gold bumps are arranged between the substrate and the chip and around the slot hole, and are electrically connected the substrate and the chip; 至少一支撑胶体,设置于该基板与该芯片之间,并位于该槽孔周边未被所述金凸块覆盖的空间;及At least one supporting colloid is arranged between the substrate and the chip, and is located in the space around the slot not covered by the gold bump; and 封胶材料,至少包覆所述金凸块及该槽孔。The sealing material covers at least the gold bump and the slot. 2.如权利要求1所述的覆晶封装结构,其中该支撑胶体可为环状或不连续状。2. The flip-chip package structure as claimed in claim 1, wherein the supporting colloid can be ring-shaped or discontinuous. 3.如权利要求1所述的覆晶封装结构,其中该封胶材料更包覆该基板的一表面、该芯片及该支撑胶体。3. The flip-chip package structure as claimed in claim 1, wherein the encapsulant further covers a surface of the substrate, the chip and the supporting colloid. 4.如权利要求3所述的覆晶封装结构,其中该封胶材料的一侧表面与该基板的一侧边齐平。4. The flip-chip package structure as claimed in claim 3, wherein one side surface of the encapsulant is flush with one side of the substrate. 5.如权利要求1所述的覆晶封装结构,其中该封胶材料更包覆该芯片的部份该主动表面及部份该支撑胶体。5. The flip-chip package structure as claimed in claim 1, wherein the encapsulant further covers part of the active surface and part of the supporting colloid of the chip. 6.如权利要求1所述的覆晶封装结构,其中所述金凸块是设置于该槽孔至少一侧的周边。6. The flip-chip package structure as claimed in claim 1, wherein the gold bump is disposed on at least one side of the slot hole. 7.如权利要求1所述的覆晶封装结构,其中覆盖该槽孔部分的该封胶材料是与该基板的一底面齐平。7. The flip-chip package structure as claimed in claim 1, wherein the encapsulant covering the slot portion is flush with a bottom surface of the substrate. 8.如权利要求1的覆晶封装结构,其中覆盖该槽孔部分的该封胶材料相对于该基板的一底面为一凸部。8 . The flip chip package structure of claim 1 , wherein the encapsulant covering the slot portion is a protrusion relative to a bottom surface of the substrate. 9.一种覆晶封装结构的制造方法,包括以下步骤:9. A method for manufacturing a flip-chip packaging structure, comprising the following steps: (a)提供一基板,该基板具有一槽孔;(a) providing a substrate having a slot; (b)提供一芯片,该芯片具有一主动表面,该主动表面具有数个金凸块;(b) providing a chip having an active surface with gold bumps; (c)设置至少一支撑胶体于该基板与该芯片之间,并使该支撑胶体位于该槽孔周边未被所述金凸块覆盖的空间,且不覆盖所述金凸块及该槽孔;(c) at least one supporting colloid is arranged between the substrate and the chip, and the supporting colloid is located in the space around the slot hole not covered by the gold bump, and does not cover the gold bump and the slot hole ; (d)接合该基板与该芯片,该芯片的所述金凸块设置于该基板与该芯片之间且位于该槽孔周边,并电性连接该基板及该芯片;及(d) bonding the substrate and the chip, the gold bumps of the chip are disposed between the substrate and the chip and are located around the slot hole, and are electrically connected to the substrate and the chip; and (e)设置一封胶材料以至少包覆所述金凸块及该槽孔。(e) disposing a sealing material to at least cover the gold bump and the slot. 10.如权利要求9所述的制造方法,其中步骤(c)包括以下步骤:10. The manufacturing method as claimed in claim 9, wherein step (c) comprises the steps of: (c1)设置该支撑胶体于该芯片的该主动表面上;及(c1) disposing the support colloid on the active surface of the chip; and (c2)贴合该基板与该芯片,使该支撑胶体设置于该基板与该芯片之间。(c2) bonding the substrate and the chip, so that the supporting colloid is disposed between the substrate and the chip. 11.如权利要求10所述的制造方法,其中在步骤(c1)中是利用点胶方式、网板印刷方式或贴胶方式设置该支撑胶体于该芯片的该主动表面上。11. The manufacturing method as claimed in claim 10, wherein in the step (c1), the supporting colloid is disposed on the active surface of the chip by dispensing, screen printing or pasting. 12.如权利要求9所述的制造方法,其中步骤(c)包括以下步骤:12. The manufacturing method as claimed in claim 9, wherein step (c) comprises the steps of: (c1)设置该支撑胶体于该基板上;及(c1) disposing the supporting colloid on the substrate; and (c2)贴合该基板与该芯片,使该支撑胶体设置于该基板与该芯片之间。(c2) bonding the substrate and the chip, so that the supporting colloid is disposed between the substrate and the chip. 13.如权利要求12所述的制造方法,其中在步骤(c1)中是利用点胶方式、网板印刷方式或贴胶方式设置该支撑胶体于该基板上。13. The manufacturing method according to claim 12, wherein in the step (c1), the supporting colloid is disposed on the substrate by dispensing, screen printing or pasting. 14.如权利要求9的制造方法,其中在步骤(e)中,该封胶材料更包覆该基板的一表面、该芯片及该支撑胶体。14. The manufacturing method of claim 9, wherein in step (e), the encapsulant further covers a surface of the substrate, the chip and the supporting colloid. 15.如权利要求9的制造方法,其中在步骤(e)中,该封胶材料更包覆该芯片的部份该主动表面及部份该支撑胶体。15. The manufacturing method according to claim 9, wherein in step (e), the encapsulant further covers part of the active surface and part of the supporting colloid of the chip.
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Cited By (4)

* Cited by examiner, † Cited by third party
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CN103000599A (en) * 2011-09-15 2013-03-27 南茂科技股份有限公司 Flip chip package structure and method for forming the same
CN104465598A (en) * 2014-12-19 2015-03-25 江苏长电科技股份有限公司 Metal lead frame high thermal conductivity flip chip packaging structure and technological method thereof
CN113140660A (en) * 2020-01-20 2021-07-20 光宝光电(常州)有限公司 Packaging structure and manufacturing method thereof
CN119742278A (en) * 2025-03-06 2025-04-01 深圳市秀武电子有限公司 Flip chip packaging structure and method

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US6528408B2 (en) * 2001-05-21 2003-03-04 Micron Technology, Inc. Method for bumped die and wire bonded board-on-chip package
US6984866B1 (en) * 2003-03-17 2006-01-10 National Semiconductor Corporation Flip chip optical semiconductor on a PCB
US20060099736A1 (en) * 2004-11-09 2006-05-11 Nagar Mohan R Flip chip underfilling

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103000599A (en) * 2011-09-15 2013-03-27 南茂科技股份有限公司 Flip chip package structure and method for forming the same
CN104465598A (en) * 2014-12-19 2015-03-25 江苏长电科技股份有限公司 Metal lead frame high thermal conductivity flip chip packaging structure and technological method thereof
CN113140660A (en) * 2020-01-20 2021-07-20 光宝光电(常州)有限公司 Packaging structure and manufacturing method thereof
CN119742278A (en) * 2025-03-06 2025-04-01 深圳市秀武电子有限公司 Flip chip packaging structure and method
CN119742278B (en) * 2025-03-06 2025-04-29 深圳市秀武电子有限公司 A flip chip packaging structure and method

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