Summary of the invention
The purpose of this invention is to provide a kind ofly, have the infrared light supply of characteristics such as volume is little, energy consumption is low, emissive porwer is high, modulating frequency is high, electrical-optical energy conversion efficiency height based on the silicon on the insulator (SOI) wafer.
Another object of the present invention provides a kind of based on microelectron-mechanical (MEMS) process technology, use the SOI wafer, adopt INFRARED ABSORPTION from heating technique and sealed package form, preparation technology simplifies, production cost is lower, the preparation method of the infrared light supply that is suitable for producing in enormous quantities.
The technical solution adopted in the present invention is:
A kind of microelectron-mechanical infrared light supply based on the SOI die/wafer configuration, the multilayer light-emitting film structure of its project organization on existing SOI wafer material, preparing.The composition of SOI wafer material is followed successively by single-crystal silicon device layer-buried silicon oxide layer-monocrystal silicon substrate from top to bottom.The monocrystal silicon substrate of SOI wafer is prepared to the support frame structure of light source, and the buried silicon oxide layer on it is used as etching stop layer.Single-crystal silicon device layer on the SOI wafer becomes infrared absorption layer by dense boron diffusion.On infrared absorption layer, prepare electric isolation oxidation silicon layer by thermal oxidation technology, growing polycrystalline silicon luminescent layer on electric isolation oxidation silicon layer, and above the polysilicon luminescent layer, form the silica protective layer by thermal oxidation technique.Erode away electrode hole at the silica protective layer at last, the metal electrode that contacts with the polysilicon luminescent layer by sputter formation.
Infrared light supply of the present invention is provided with support frame, light-emitting film structure and electrode; the light-emitting film structure is followed successively by silica protective layer, polysilicon luminescent layer, electric isolation oxidation silicon layer, infrared absorption layer and buried silicon oxide layer from top to bottom; the light-emitting film support structure is in the support frame top; electrode is positioned at the support frame top; the heat of being convenient to the electrode part conducts to silicon frame; electrode contacts with the polysilicon luminescent layer by offer electrode hole at the silica protective layer, and electrode links to each other with the shell pin by the pressure welding wire.
Support frame can be made as rectangular frame, and the height of support frame is 300~500 μ m.The polysilicon luminescent layer mixes by boron and realizes the purpose of resistance heating; its thickness is 400~1000nm; the silica protective layer on polysilicon luminescent layer surface is used to improve the emission effciency and the light source life of infrared light; electricity between polysilicon luminescent layer and the infrared absorption layer is isolated the electric isolation oxidation silicon layer that passes through therebetween and is realized that the thickness of silica protective layer and electric isolation oxidation silicon layer is 200~500nm.Infrared absorption layer mainly absorbs infrared radiation dorsad, and plays the purpose of store heat and heating luminescent layer, and its thickness is 3~4 μ m.Buried silicon oxide layer can play the effect of etching stop layer in the preparation, and its thickness is 1~2 μ m.
Infrared light supply adopts SOI wafer or common silicon single crystal wafer manufacturing, the overall dimensions area of light source is (1~5) mm * (1~5) mm, the overall dimensions area of light source is preferably 3mm * 3mm, and the area of light-emitting film structure is (0.5~3) mm * (0.7~4) mm.
Infrared light supply can adopt dark reaction and plasma etching or wet etching to etch support frame structure and light-emitting film structure from the SOI chip back surface, and the buried oxide layer in the SOI wafer is as etching stop layer.
When infrared light source adopts dark reaction and plasma etching to prepare support frame structure and light-emitting film structure, compare with the wet-etching technology that employing is traditional, because the 54.7 degree oblique cone shape sections that anisotropic etch brings are replaced by vertical section, therefore under the constant situation of light-emitting film area, the chip surface size can reduce about 20%, and therefore the design quantity of chip can improve on the wafer.
Infrared light supply can only form support frame structure and light-emitting film structure with wet etching if adopt common silicon single crystal wafer to replace the SOI wafer, and dense diffused layer of boron is as etching stop layer.
In order to reduce the energy consumption of infrared light supply, SOI wafer device layer is designed to dense boron doped infrared absorption layer, and the doping content of boron is not less than 10
20Cm
-3Infrared absorption layer absorbs infrared radiation dorsad, reaches store heat and heats the purpose of luminescent layer certainly.
Support frame can adopt single crystal silicon material; electricity isolation oxidation silicon layer can adopt silica material; polysilicon luminescent layer material can be monocrystalline silicon, polysilicon, carborundum or metal oxide materials, and the silica protective layer on polysilicon luminescent layer surface can be silica, silicon nitride or nitrogen-oxygen-silicon material.
Polysilicon luminescent layer material reaches the resistance heating purpose by boron or phosphorus doping design.Resistivity after the doping is 1 * 10
-2~1 * 10
-3Ω cm.
Contact resistance between two electrodes of infrared light supply determines that by polycrystalline silicon material doped resistor rate with three-dimensional dimension the contact resistance between the electrode is controlled in 50~500 Ω.Electrode material is a metal, and in order to reduce the working temperature of metal electrode, the design electrode is positioned at the support frame top, and the heat of being convenient to the electrode part conducts to silicon frame.
Infrared light supply adopts encapsulation structure, and infrared light supply is sealed in the middle of the coaxial shell (TO8 or TO5), and metal electrode links to each other with the shell pin by the pressure welding wire.Infrared radiation is by infrared transparent window (sapphire, CaF
2Or BaF
2Deng) to external radiation.
Link by hot isolated material (as calcium silicates, mica, asbestos or carbon fiber etc.) between infrared light supply and the metal base, high-temp glue is used to realize bonding.This design can reduce the heat conduction losses of infrared light supply to the metal base, has therefore reduced the energy consumption of device.
Infrared light supply can be formed the infrared light supply array, realizes the function of infrared demonstration, infrared sign, infrared illumination and infrared enhancing emission.Infrared light supply can use powered battery, and direct voltage is at 5~80V.Can realize pulse modulation work by transistor-transistor logic circuit.
The preparation method of infrared light supply of the present invention may further comprise the steps:
1) the SOI wafer is cleaned;
2) wafer pre-oxidation at 900~1200 ℃ of following wet oxygens 4h at least, is protected chip back surface with glue, erodes the silicon oxide layer on the wafer device layer then in hydrofluoric acid;
3) the dense boron diffusion of device layer forms infrared absorption layer;
4) the boron glass layer and the boron-silicon layer of the dense boron diffusion of removal rear surface, the boron glass layer corrodes with hydrofluoric acid, and boron-silicon layer adopts the low temperature oxidation technology oxidation, and corrodes with hydrofluoric acid;
5) at infrared absorption layer surface heat oxide-silicon oxide layer;
6) use the low-pressure chemical vapor deposition technology at the thick polysilicon of silicon oxide layer surface deposition 400~1000nm; Temperature is 600~900 ℃ in the stove, SiH
4Flow is 200~350sccm, and pressure 200~300mTorr, sedimentation time are between 50~120min;
7) photoetching for the first time: the polysilicon layer pattern etching, at polysilicon surface spin coating positive photoresist, after the oven dry, utilize the mask uv-exposure, develop, post bake is a mask with the photoresist, uses reactive ion etching process to etch polysilicon luminescent layer figure;
8) at polysilicon layer surface heat oxide-silicon oxide protective layer.
9) utilize sputtering technology deposition aluminium lamination as ion injecting mask layer;
10) photoetching for the second time; The preparation of aluminium mask pattern at aluminium lamination surface spin coating positive photoresist, after the oven dry, utilizes the mask uv-exposure, develops, and post bake is a mask with the photoresist, uses the aluminium corrosive liquid to open ion on aluminium lamination and injects window;
11) boron ion implanted polysilicon layer injects energy 150~200KeV, and implantation dosage is 5 * 10
14Cm
-2~5 * 10
15Cm
-2
12) annealing process after ion injects erodes aluminium lamination, anneals under blanket of nitrogen subsequently, carries out the annealing process after ion injects;
13) photoetching for the third time: the preparation electrode hole, at surface oxidation silicon layer spin coating positive photoresist, after the oven dry, utilize the mask uv-exposure, develop, post bake is that mask erodes away electrode hole in silica erosion liquid with the photoresist;
14) utilize sputtering technology at the silicon oxide surface depositing metal layers;
15) the 4th photoetching: the metal electrode preparation, at layer on surface of metal spin coating positive photoresist, after the oven dry, utilize the mask uv-exposure, develop, post bake is that mask corrosion goes out metal electrode structure with the photoresist;
16) at SOI chip back surface sputtering sedimentation aluminium lamination;
17) the 5th photoetching: the preparation of wafer back aluminium mask layer, at aluminium lamination surface spin coating positive photoresist, after the oven dry, utilize the mask uv-exposure, develop, post bake is opened the window for preparing frame structure and suspension light-emitting film layer structure with the photoresist for the mask corrosion aluminium lamination;
18) preparation of frame structure and suspension light-emitting film layer structure uses dark reaction and plasma etching technics to go out the light-emitting film structure from back-etching;
19) wafer alloying annealing;
20) along the scribe line sliver;
21) in the TO8 base, the pressure welding aluminium wire is with the pipe cap encapsulation of windowless or band infrared window with the high-temp glue paster for encapsulation, infraluminescence chip.
In step 1), the SOI wafer is the strict cleaning process of carrying out of wet clean process according to industrial standard; Wafer thickness can be 500 μ m, and buried silicon oxide layer thickness can be 1.5 μ m, and the monocrystalline silicon layer thickness of buried silicon oxide layer top can be 5 μ m, 100 crystal orientation twin polishing sheets.
In step 2) in, requiring the wafer surface oxidated layer thickness is 1.5 μ m ± 0.5 μ m.
In step 3), the junction depth of diffusion is 3.5 μ m ± 0.5 μ m, and the doping content of boron is not less than 10
20Cm
-3Temperature is at least 1200 ℃ in the solid-state boron source diffusion, stove, diffusion time 8~12h.
In step 4), after the hydrofluoric acid corrosion, the measuring resistance rate should reach 10
-4~10
-5Ω cm.
In step 5), the thickness of silicon oxide layer can be 200~500nm.
In step 7), can be 1500~2500r/min in the whirl coating speed of polysilicon surface spin coating positive photoresist, the temperature of oven dry can be 80~100 ℃, and the time of oven dry can be 8~15min; The time of uv-exposure can be 5.0~7.0s, and the time of development can be 1min, and the temperature of post bake can be 120~150 ℃, and the time of post bake can be 10~15min.
In step 8), the thickness of silica protective layer can be 200~500nm.
In step 9), the thickness of aluminium lamination can be 1.0~1.5 μ m.
In step 10), can be 1500~2500r/min in the whirl coating speed of aluminium lamination surface spin coating positive photoresist, the temperature of oven dry can be 80~100 ℃, and the time of oven dry can be 8~15min; The time of uv-exposure can be 5.0~7.0s, and the time of development can be 1min, and the temperature of post bake can be 120~150 ℃, and the time of post bake can be 10~15min.
In step 12), the temperature of annealing is preferably 1000 ℃, and the temperature of annealing is preferably 15min.
In step 13), can be 1500~2500r/min in the whirl coating speed of surface oxidation silicon layer spin coating positive photoresist, the temperature of oven dry can be 80~100 ℃, and the time of oven dry can be 8~15min; The time of uv-exposure can be 5.0~7.0s, and the time of development can be 1min, and the temperature of post bake can be 120~150 ℃, and the time of post bake can be 10~15min.
In step 14), metal layer thickness can be 1.0~1.5 μ m.
In step 15), can be 1500~2500r/min in the whirl coating speed of layer on surface of metal spin coating positive photoresist, the temperature of oven dry can be 80~100 ℃, and the time of oven dry can be 8~15min; The time of uv-exposure can be 5.0~7.0s, and the time of development can be 1min, and the temperature of post bake can be 120~150 ℃, and the time of post bake can be 10~15min.
In step 16, the thickness of aluminium lamination can be 1.0~1.5 μ m.
In step 17) in, can be 1500~2500r/min in the whirl coating speed of Al laminar surface spin coating positive photoresist, the temperature of oven dry can be 80~100 ℃, and the time of oven dry can be 8~15min; The time of uv-exposure can be 5.0~7.0s, and the time of development can be 1min, and the temperature of post bake can be 120~150 ℃, and the time of post bake can be 10~15min.
In step 19) in, annealing is under nitrogen atmosphere, and annealing temperature can be 450 ℃, and annealing time can be 20min.
In step 21) in, window material can adopt aluminium oxide, calcirm-fluoride or barium fluoride etc.
The invention provides a kind of MEMS infrared light supply based on the SOI wafer preparation and preparation method thereof, the present invention has following outstanding advantage and good effect:
1. light source has that volume is little, energy consumption is low, can modulate and characteristics that the life-span is long.Can be packaged into the single or array device of standard according to different application targets and requirement, plug and play, convenient and reliable.
2. light source can be worked under continuous operation mode and pulse mode, and the high modulation characteristic can realize code modulated hidden working method, and therefore big application prospect is arranged in military target enemy and we identification.
3. owing to adopted INFRARED ABSORPTION from thermal technology and encapsulation structure, this light source has high radiation efficiency and energy conversion efficiency.
4. owing to used the SOI wafer, the manufacturing process of MEMS infrared light supply is simplified, and under the condition that does not influence performance, this area of chip can reduce about 20% than like product.Therefore can realize low-cost large batch of manufacturing.
5. the main material that uses of light source is silicon, and device technology is compatible mutually with existing C OMS technology, and production cost is low, has improved the possibility of industrialization.
6. light source is green, environmental protection, pollution-free light source.
Embodiment
In order to further specify technology contents of the present invention, the invention will be further described below in conjunction with drawings and Examples.
Fig. 1 provides the vertical view of the MEMS infrared light supply based on the SOI wafer preparation of the present invention.Substrate support framework 1 is supporting the light-emitting film structure, and Al electrode 6 is positioned at support frame 1 top.Chip area is (1~5) mm * (1~5) mm, and representative value is 3mm * 3mm.The light-emitting film area is (0.5~3) mm * (0.7~4) mm, and representative value is 1.6mm * 2.2mm.
Fig. 2 and Fig. 3 provide the A-A direction of the MEMS infrared light supply based on the SOI wafer preparation of the present invention and the profile of B-B direction.The light-emitting film structure from top to bottom is made up of silica protective layer 4, polysilicon luminescent layer 5, electric isolation oxidation silicon layer 3, infrared absorption layer 7 and buried silicon oxide layer 2 successively.
Fig. 4 provides process chart of the present invention, and concrete implementation step is:
1) prepares SOI wafer and the strict RCA of execution cleaning process.Require wafer thickness 500 μ m, device layer thickness 5 μ m, buried silicon oxide layer thickness 1.5 μ m, 100 crystal orientation twin polishing sheets;
2) wafer pre-oxidation.At 1100 ℃ of following wet oxygen 4h.Require the wafer surface oxidated layer thickness to be about 1.5 μ m ± 0.5 μ m.Protect chip back surface with glue, in hydrofluoric acid, erode the silicon oxide layer on the wafer device layer then;
3) the dense boron diffusion of device layer forms infrared absorption layer.The strict RCA cleaning process of carrying out before the diffusion.The junction depth of diffusion is 3.5 μ m ± 0.5 μ m, solid-state boron source diffusion, temperature is 1200 ℃ in the stove, diffusion time 12h.
4) the boron glass layer and the boron-silicon layer of the dense boron diffusion of removal rear surface.The boron glass layer corrodes with hydrofluoric acid, and boron-silicon layer adopts the low temperature oxidation technology oxidation, and corrodes with hydrofluoric acid.
5) infrared absorption layer surface oxide layer.The strict RCA cleaning process of carrying out before the oxidation is at the thick silicon oxide layer of infrared absorption layer surface heat oxidation 400nm;
6) polycrystalline silicon growth.The strict RCA cleaning process of carrying out uses the LPCVD technology at the thick low stress polysilicon of silicon oxide layer surface deposition 500nm before the polycrystalline silicon growth; Temperature is 700 ℃ in the stove, SiH
4Flow is 250sccm, and pressure 225mTorr, sedimentation time are 60min.
7) photoetching for the first time: polysilicon layer pattern etching.At polysilicon surface spin coating positive photoresist, whirl coating speed 2000r/min.Whirl coating speed 2000r/min.In 90 ℃ of baking ovens, after the oven dry 10min, utilize mask uv-exposure 6.8s, development 1min, post bake 15min in 135 ℃ baking oven then.With the photoresist is mask, uses reactive ion etching process to etch polysilicon luminescent layer figure.
8) polysilicon layer surface heat oxidation.The strict RCA cleaning process of carrying out before the oxidation is at the thick silica protective layer of polysilicon layer surface heat oxidation 350nm.
9) Al layer deposition.The strict RCA cleaning process of carrying out utilizes sputtering technology to deposit the thick Al layer of 1.2 μ m as ion injecting mask layer before the Al layer deposition.
10) photoetching for the second time; The preparation of Al mask pattern.At Al laminar surface spin coating positive photoresist, whirl coating speed 2000r/min.In 90 ℃ of baking ovens, after the oven dry 10min, utilize mask uv-exposure 6.8s, development 1min, post bake 15min in 135 ℃ baking oven then.With the photoresist is mask, uses the Al corrosive liquid to open ion on the Al layer and injects window.
11) boron ion implanted polysilicon layer.Inject energy 190KeV, implantation dosage is about 8 * 10
15Cm
-2
12) annealing process after ion injects.Erode the Al layer.The strict RCA cleaning process of carrying out before the annealing.At 1000 ℃, under the blanket of nitrogen, 15min anneals subsequently.Carry out the annealing process after ion injects;
13) photoetching for the third time: preparation electrode hole.At surface oxidation silicon layer spin coating positive photoresist, whirl coating speed 2000r/min.In 90 ℃ of baking ovens, after the oven dry 10min, utilize mask uv-exposure 6.8s, development 1min, post bake 15min in 135 ℃ baking oven then.With the photoresist is that mask erodes away electrode hole in silica erosion liquid.
14) Al layer deposition.The strict RCA cleaning process of carrying out utilizes sputtering technology to deposit the thick Al layer of 1.0 μ m at silicon oxide surface before the Al layer deposition;
15) the 4th photoetching: Al electrode preparation.At Al laminar surface spin coating positive photoresist, whirl coating speed 2000r/min.In 90 ℃ of baking ovens, after the oven dry 10min, utilize mask uv-exposure 6.8s, development 1min, post bake 15min in 135 ℃ baking oven then.With the photoresist is that mask corrosion goes out the Al electrode structure.
16) chip back surface Al layer deposition.At the thick Al layer of SOI chip back surface sputtering sedimentation 1.2 μ m.
17) the 5th photoetching: the preparation of wafer back Al mask layer.At Al laminar surface spin coating positive photoresist, whirl coating speed 2000r/min.In 90 ℃ of baking ovens, after the oven dry 10min, utilize mask uv-exposure 6.8s, development 1min, post bake 15min in 135 ℃ baking oven then.With the photoresist is the window that mask corrosion Al layer open prepares frame structure and suspension light-emitting film layer structure.
18) preparation of frame structure and suspension light-emitting film layer structure.Use dark reaction and plasma etching technics to go out the light-emitting film structure from back-etching.
19) wafer alloying annealing.20min under 450 ℃ of temperature in nitrogen;
20) along the scribe line sliver.
21) encapsulation.In the TO8 base, pressure welding A1 silk is with band infrared window (sapphire, CaF with the high-temp glue paster for the infraluminescence chip
2Or BaF
2Deng) pipe cap encapsulation.