CN101090033B - Symmetrical Differential Inductance Structure - Google Patents

Abstract

The invention discloses a symmetrical differential inductance structure, which comprises a winding layer and a shielding layer. The winding layer is disposed on the substrate. The winding layer comprises a first spiral conducting wire and a second spiral conducting wire. The first spiral lead has a first end and a second end, and the second end is screwed into the inner side of the first spiral lead. The second spiral conductor is symmetrical to a symmetrical plane and is mutually wound with the first spiral conductor. The second spiral lead is provided with a third end and a fourth end, and the fourth end is screwed into the inner side of the second spiral lead and connected with the second end to form a winding layer with a plurality of windings. The shielding layer is arranged between the winding layer and the substrate corresponding to the orthographic projection of the innermost circle of the winding layer, wherein the orthographic projection of the winding layer at the part except the innermost circle of the winding layer is fallen on the shielding layer. The shielding layer is coupled to the innermost coil of the winding layer in parallel.

Description

Symmetrical Differential Inductance Structure

technical field

The present invention relates to an inductor structure, and in particular to a symmetrical differential inductor structure.

Background technique

Generally speaking, since an inductor has the function of storing and releasing energy through electromagnetic mutual conversion, the inductor can be used as a component for stabilizing current. In addition, the application range of the inductor is quite wide, for example, the inductor is often used in radio frequency (radio frequency, RF) circuits. In an integrated circuit, an inductor is an important but challenging passive component. As far as the performance of the inductor is concerned, the higher the quality of the inductor, the higher the quality factor of the inductor, represented by the Q value. The Q value is defined as follows:

Q=ω×L/R

where ω is the angular frequency, L is the inductance of the coil, and R is the resistance to take the loss of inductance into account at a specific frequency.

As far as current development is concerned, there are various methods and technologies for combining inductors with integrated circuit technology. However, in an integrated circuit, the limitations of the metal thickness of the inductor and the interference of the silicon substrate on the inductor will lead to poor quality of the inductor. In the known technology, thicker metal is arranged on the uppermost layer of the inductor to reduce the conductor loss and improve the Q value of the inductor. However, when the metal thickness increases to a certain extent, the improvement of Q value becomes insignificant. Since most inductors are placed close to the silicon substrate, the parasitic capacitance generated between the silicon substrate and the inductor will increase, resulting in an increase in the resistance of the inductor, resulting in a large amount of energy consumed and a decrease in the quality of the inductor. Therefore, how to solve the various problems encountered in the above-mentioned process, and how to improve the Q value of the inductor and reduce the conductor loss is the focus of active development in the industry at present.

Contents of the invention

The invention provides a symmetrical differential inductance structure, which can reduce the parasitic capacitance generated between the substrate and the inductance, and improve the conductor loss of the inductance, so as to increase the Q value of the inductance.

The invention proposes a symmetrical differential inductor structure, which includes a winding layer and a shielding layer. The winding layer is configured on the base. The winding layer includes a first helical wire and a second helical wire. The first helical wire has a first end and a second end, wherein the second end is screwed into the inner side of the first helical wire. The second helical wire is symmetrical to a symmetry plane and is intertwined with the first helical wire. The second helical wire has a third end and a fourth end, wherein the fourth end is screwed into the inner side of the second helical wire and connected with the second end of the first helical wire to form a winding with multiple turns of winding. line layer. The shielding layer is an orthographic projection corresponding to the innermost circle of the winding layer, and is arranged between the winding layer and the base, and the orthographic projection of the part of the winding layer outside the innermost circle of the winding layer falls on the shielding layer. The shielding layer is coupled to the innermost circle of the winding layer in parallel.

In the symmetric differential inductance structure proposed by the present invention, the shielding layer is used to block between the winding layer and the substrate, which can reduce the parasitic capacitance generated between the substrate and the metal, reduce energy consumption, and improve the performance of the symmetric differential inductance. quality.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

Description of drawings

FIG. 1A is a schematic top view of a symmetrical differential inductor structure according to an embodiment of the present invention.

FIG. 1B is a schematic top view of a shielding layer according to an embodiment of the invention.

Fig. 1C is a schematic cross-sectional view along the line I-I' in Fig. 1A.

FIG. 1D is a schematic cross-sectional view along line I-I' in FIG. 1A according to another embodiment of the present invention.

1E is a schematic top view of a symmetrical differential inductor structure according to yet another embodiment of the present invention.

FIG. 1F is a schematic top view of a shielding layer according to yet another embodiment of the present invention.

2A to 2C are schematic cross-sectional views along line I-I' in FIG. 1A according to other embodiments of the present invention.

FIG. 3 is a graph comparing Q values between the symmetrical differential inductor structure of the present invention and the known inductor structure.

[Description of main component symbols]

100, 200: Symmetrical differential inductance structure

102: Base

104: Dielectric layer

106: winding layer

108: masking layer

108a, 108b, 130, 132: ends

109: Masking pattern

110, 112: spiral wire

110a, 112a: Outer wires

110b, 112b: inner wire

110c, 112c: connecting wires

111a: first end

111b: second end

113a: third end

113b: fourth terminal

114, 122a, 122b, 126a, 126b: vias

116: Gain wire

120: Symmetry plane

124a, 124b, 128a, 128b: bonding wires

Detailed ways

FIG. 1A is a schematic top view of a symmetrical differential inductor structure according to an embodiment of the present invention. FIG. 1B is a schematic top view of a shielding layer according to an embodiment of the invention. Fig. 1C is a schematic cross-sectional view along the line I-I' in Fig. 1A. FIG. 1D is a schematic cross-sectional view along line I-I' in FIG. 1A according to another embodiment of the present invention.

Please refer to FIG. 1A , FIG. 1B and FIG. 1C at the same time. The symmetrical differential inductor structure 100 includes a winding layer 106 and a shielding layer 108 . The winding layer 106 is disposed in the dielectric layer 104 on the substrate 102 . The shielding layer 108 is disposed in the dielectric layer 104 between the wiring layer 106 and the substrate 102 . Since the symmetrical differential inductor structure 100 can be realized by semiconductor process, the substrate 102 can be a silicon substrate. The material of the dielectric layer 104 is, for example, silicon oxide or other dielectric materials. The material of the winding layer 106 can be metal, such as copper, aluminum-copper alloy and other materials. The material of the shielding layer 108 may be a conductive material such as polysilicon or metal. In addition, in this embodiment, the configuration of the symmetrical differential inductor structure 100 is an octagon (as shown in FIG. 1A ), but the symmetrical differential inductor structure of the present invention is not limited to the configuration shown in the embodiment Configuration method.

The winding layer 106 includes a helical wire 110 and a helical wire 112 , wherein the helical wire 110 and the helical wire 112 are disposed on the same height plane, for example. The winding layer 106 is, for example, a symmetrical helical loop structure with multiple turns of winding, that is to say, the helical wire 110 and the helical wire 112 are, for example, corresponding to the symmetry plane 120 , and are arranged as mirror images and intertwined, wherein the symmetry plane 120 The extension direction is, for example, towards the inside of the page.

The spiral wire 110 at least includes an outer wire 110a and an inner wire 110b, wherein the outer wire 110a and the inner wire 110b are connected in series. The spiral wire 110 has a first end 111a and a second end 111b. The first end 111a is, for example, an end point of the outer wire 110a, and the second end is, for example, an end point of the inner wire 110b. That is to say, the first end 111 a is disposed outside the helical wire 110 , and the second end 111 b is screwed into the inner side of the helical wire 110 .

The helical wire 112 is intertwined with the helical wire 110 in a manner corresponding to the symmetry plane 120 . The spiral wire 112 at least includes an outer wire 112a and an inner wire 112b, and the outer wire 112a and the inner wire 112b are connected in series. The spiral wire 112 has a third end 113a and a fourth end 113b. The third end 113 a is, for example, the end of the outer wire 112 a , and the fourth end 113 b is, for example, the end of the inner wire 112 . The third end 113 a is, for example, at a position corresponding to the first end 111 a and is disposed outside the helical wire 112 . The fourth end 113b is, for example, at a position corresponding to the second end 111b , screwed into the inner side of the helical wire 112 , and the second end 111b and the fourth end 113b intersect on the symmetry plane 120 to connect. That is to say, the helical wire 110 and the helical wire 112 intersect and connect to the innermost circle of the winding layer 106 .

As shown in FIG. 1A, in this embodiment, the winding layer 106 of the symmetrical differential inductance structure 100 is, for example, a three-turn winding structure. Therefore, the helical wire 110 and the helical wire 112 can also include connecting wires respectively. 110c and connecting wire 112c. The connection mode of the outer wire 110a and the inner wire 110b is, for example, connecting the outer wire 110a and the inner wire 110b in series through the connecting wire 110c. The outer wire 112a and the inner wire 112b are connected in series, for example, through the connecting wire 112c. However, the number of turns of the winding layer 106 is not limited to the three turns shown in the embodiment, and the above connection methods are not intended to limit the present invention.

When the structure of the winding layer 106 is two turns of winding, the outer wire 110 a and the inner wire 110 b can be directly connected in series, and the same is true for the outer wire 112 a and the inner wire 112 b. Of course, the winding layer 106 can also arrange multi-turn connecting wires 110c between the outer wire 110a and the inner wire 110b, and correspondingly arrange multi-turn connecting wires 112c between the outer wire 112a and the inner wire 112b, so that the winding The wire layer 106 is a structure with more than three turns of wire, and those skilled in the art can adjust it according to their needs.

Please continue to refer to FIG. 1A , the manner in which the helical wire 110 and the helical wire 112 are intertwined is, for example, that the helical wire 110 and the helical wire 112 intersect on the symmetry plane 120 . Moreover, the helical wires 110 and the helical wires 112 are not in contact with each other at alternate positions, so as to avoid the occurrence of a short circuit. For example, in the helical wire 112, the outer wire 112a is connected downwardly to the bonding wire 124a through the via 122a, and then connected to the connecting wire 112c through the via 122b, so that the helical wire 112 can be in an alternate position. The upper part passes under the helical wire 110 to avoid contact between the helical wires 110 and 112 . As for the outer wire 110a and the connection wire 110c, they are connected by the bonding wire 124b located at the same height plane. On the other hand, in the spiral wire 110, the connecting wire 110c and the inner wire 110b are connected, for example, through the vias 126a, 126b and the bonding wire 128a, so that the spiral wire 110 is separated from the spiral wire 112 at the alternate position. Pass below. As for the connection wire 112c and the inner wire 112b, they are connected by the bonding wire 128b located at the same height plane.

Based on the above, when operating the symmetrical differential inductor structure 100 , for example, the operating voltage is applied to the first end 111 a and the third end 113 a simultaneously. Since the voltage applied to the first end 111a and the voltage applied to the third end 113a are equal in absolute value and opposite in electrical properties, from the first end 111a and the third end 113a, the more the spiral wire 110 With the interior of the helical wire 112, the absolute value of the voltage will gradually decrease. The voltage value at the intersection junction of the second end 111b of the inner wire 110b and the fourth end 113b of the inner wire 112b is 0, that is, a virtual ground occurs at the innermost circle of the winding layer 106 .

Please continue to refer to FIG. 1A, FIG. 1B and FIG. 1C, the shielding layer 108 corresponds to the orthographic projection of the innermost circle of the winding layer 106, and is disposed between the winding layer 106 and the base 102. In this embodiment, the inner wire Orthographic projections of 110 b and inner wire 112 b fall on shielding layer 108 . For example, the shielding layer 108 has a gap instead of a complete ring structure. The shielding layer 108 has an end 108a and an end 108b at the notch. In addition, the shielding layer 108 is electrically coupled to the innermost circle of the winding layer 106 , and the electrical coupling manner is, for example, parallel connection. In this embodiment, for example, at least two vias 114 are arranged between the winding layer 106 and the shielding layer 108, and the end 108a and the end 108b of the shielding layer 108 are respectively coupled to the end 130 and the inner conductor 110b. end 132 of lead 112b. In this way, the shielding layer 108 can serve as a self-shading structure of the symmetrical differential inductor structure 100 .

Bearing the above, please refer to FIG. 1C and FIG. 1D at the same time, except that the orthographic projection of the innermost circle (the orthographic projection of the inner conductor 110b and the inner conductor 112b) falls on the shielding layer 108, at least a part of the other winding layers 106 The orthographic projection of the portion will also fall on the masking layer 108. That is to say, the orthographic projection of the entire winding layer 106 can fall completely on the shielding layer 108 (as shown in FIG. 1C ); Figure 1D). Furthermore, as long as the shielding layer 108 can cover part of the winding layer 106, the parasitic capacitance generated between the substrate 102 and the winding layer 106 can be reduced, and the quality of the symmetrical differential inductor can be improved. As shown in FIG. 1C , when the orthographic projection of the winding layer 106 completely falls on the shielding layer 108 , the shielding layer 108 can produce a better shielding effect between the symmetrical differential inductor structure 100 and the substrate 102 .

1E is a schematic top view of a symmetrical differential inductor structure according to yet another embodiment of the present invention. FIG. 1F is a schematic top view of a shielding layer according to yet another embodiment of the present invention. In FIGS. 1E to 1F , the same components as those in FIGS. 1A to 1B use the same reference numerals and their descriptions are omitted.

Please refer to FIG. 1E and FIG. 1F at the same time, the shielding layer 108 may also be composed of more than two shielding patterns 109 , for example. As shown in FIG. 1F , the shielding layer 108 includes four shielding patterns 109 , and the shielding patterns 109 are arranged, for example, as mirror images on both sides of the symmetry plane 120 . In addition, each shielding pattern 109 is individually connected in parallel with the innermost circle of the winding layer 106. The parallel connection is, for example, connecting the two ends of each shielding pattern 109 to corresponding positions through at least two vias 114. The wire 110b is also the inner wire 112b. The above embodiment is illustrated by taking the shielding layer 108 with four shielding patterns 109 as an example, but the present invention is not limited thereto. In other embodiments, the shielding layer 108 may include more than one shielding pattern 109 arranged symmetrically, as long as each shielding pattern 109 is connected in parallel with the innermost circle of the winding layer 106 .

It is particularly noted that, in the winding layer 106 , the absolute value of the voltage gradually decreases toward the inside of the winding layer 106 . That is to say, the innermost circle of the winding layer 106 has a smaller electric field. Since the shielding layer 108 is connected in parallel with the innermost coil of the winding layer 106 , the shielding layer 108 has electric field characteristics similar to that of the innermost coil of the winding layer 106 . Therefore, the parasitic capacitance generated between the shielding layer 108 and the substrate 102 is sufficiently negligible. The outermost circle of the winding layer 106 which has a larger voltage and thus generates a larger electric field can be blocked by the shielding layer 108 disposed between the winding layer 106 and the substrate 102 to reduce energy loss. Therefore, the present invention can reduce the generation of parasitic capacitance between the substrate 102 and the symmetrical differential inductor structure 100 , so as to reduce the resistance value caused by the substrate 102 , thereby increasing the Q value of the symmetrical differential inductor structure 100 .

2A to 2C are schematic cross-sectional views along line I-I' in FIG. 1A according to other embodiments of the present invention. In FIGS. 2A to 2C , the same components as those in FIGS. 1A to 1C are assigned the same reference numerals and their descriptions are omitted.

The present invention further proposes a symmetrical differential inductance structure. Referring to FIG. 2A , the symmetrical differential inductor structure 200 is, for example, disposed in the dielectric layer 104 above the substrate 102 . In other embodiments, the components constituting the symmetrical differential inductor structure 200 are substantially the same as the components constituting the symmetrical differential inductor structure 100, and the main difference is that the symmetrical differential inductor structure 200 further includes at least one gain wire 116 . For example, the gain wire 116 is disposed between the winding layer 106 and the shielding layer 108 corresponding to the innermost figure of the winding layer 106 .

According to the above, for example, the gain wire 116 is respectively coupled to the innermost circle of the winding layer 106 and the shielding layer 108 . The coupling method is, for example, connecting the two ends of the gain wire 116 in parallel to the end 130 of the inner wire 110b and the end 132 of the inner wire 112b through at least two vias 114; The two ends are connected in parallel to the end 108 a and the end 108 b of the shielding layer 108 . In addition, in the case of a plurality of gain wires 116 (three as shown in FIG. 2A ), the upper and lower adjacent gain wires 116 are, for example, connected in parallel through a plurality of vias 114 . The material of the gain wire 116 can be metal, such as copper, aluminum-copper alloy and other materials.

Please refer to FIG. 2B and FIG. 2C at the same time. The above-mentioned gain wire 116 can also be arranged between the shielding layer 108 and the substrate 102 corresponding to the innermost circle of the winding layer 106 (as shown in FIG. 2B ), or the gain wire 116 It can be disposed between the winding layer 106 and the shielding layer 108 and between the shielding layer 108 and the substrate 102 at the same time (as shown in FIG. 2C ).

It is explained here that the gain wire 116 is arranged between the winding layer 106 and the substrate 102, and the metal cross-sectional area in the symmetrical differential inductance structure 200 can be increased by stacking the gain wire 116, thereby effectively improving the problem of conductor loss. . In addition, since the gain wire 116 is connected in parallel with the innermost circle of the winding layer 106 , the gain wire 116 has an electric field characteristic similar to that of the innermost circle of the shielding layer 106 . That is to say, the electric field of the gain wire 116 is very small, which can increase the cross-sectional area of the metal without increasing the parasitic capacitance generated between the metals. Therefore, the symmetrical differential inductor structure 200 may have preferable qualities.

FIG. 3 is a graph comparing Q values between the symmetrical differential inductor structure of the present invention and the known inductor structure.

Referring to FIG. 3 , it can be seen from the actual test results that the symmetrical differential inductor of the present invention has a higher Q value than the known symmetrical differential inductor in the frequency range from 0 to 20 GHz. Therefore, no matter in the low-frequency or high-frequency range, the present invention can indeed significantly improve the quality of the symmetrical differential inductor, and further expand the frequency range used.

In summary, in the symmetrical differential inductance structure proposed by the present invention, the shielding layer is used to block between the winding layer and the substrate, which can reduce the parasitic capacitance generated between the substrate and the metal, reduce energy consumption, and improve symmetry. Type differential inductance quality. In addition, since the shielding layer is connected in parallel to the innermost circle with a lower electric field in the winding layer, the parasitic effect generated between the shielding layer and the substrate can also be ignored.

Furthermore, if the symmetrical differential inductor structure of the present invention is provided with a gain wire between the winding layer and the substrate, the conductor loss of the symmetrical differential inductor can be reduced by increasing the metal cross-sectional area, making the symmetrical differential inductor Kinetic performance has been improved. Moreover, by connecting the gain wire in parallel with the innermost coil of the winding layer, it is also possible to avoid the generation of parasitic capacitance between metal and metal, thereby improving the Q value of the inductor

On the other hand, the applicable frequency range of the symmetrical differential inductance structure of the present invention can be kept within the range used by radio frequency circuits, and the manufacturing process of the inductance can be integrated into the current process, which can help reduce the process required cost.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Claims (11)

1. symmetrical expression differential inductance structure comprises:

One wire winding layer is disposed in the substrate, comprising:

One first helical form lead, this first helical form lead has one first end and one second end, and this second end screws in the inboard of this first helical form lead; And

One second helical form lead, twine and be symmetrical in a symmetrical planar configuration mutually with this first helical form lead, this second helical form lead has one the 3rd end and one the 4th end, the 4th end screws in the inboard of this second helical form lead and is connected with this second end of this first helical form lead, has this wire winding layer of multi-turn coiling with formation; And

One shielding layer, orthographic projection corresponding to the inner ring of this wire winding layer is disposed between this wire winding layer and this substrate, and this wire winding layer of part beyond the inner ring of this wire winding layer, its orthographic projection drops on this shielding layer, and this shielding layer is coupled to the inner ring of this wire winding layer with parallel way.

2. symmetrical expression differential inductance structure as claimed in claim 1, wherein the orthographic projection of this wire winding layer drops on this shielding layer fully.

3. symmetrical expression differential inductance structure as claimed in claim 1, also comprise at least one gain lead, orthographic projection corresponding to the inner ring of this wire winding layer is disposed between this wire winding layer and this shielding layer, and should gain lead in parallel with the inner ring of this shielding layer, this wire winding layer.

4. symmetrical expression differential inductance structure as claimed in claim 1 also comprises at least one gain lead, corresponding to the orthographic projection of the inner ring of this wire winding layer, be disposed between this shielding layer and this substrate, and the lead that should gain is in parallel with this shielding layer.

5. symmetrical expression differential inductance structure as claimed in claim 1, wherein when this shielding layer by a plurality of when covering pattern and being constituted, each this cover pattern and be symmetrical in this symmetrical plane configuration.

6. symmetrical expression differential inductance structure as claimed in claim 1, wherein:

This first helical form lead comprises one first outer conductor and one first inside conductor at least, and wherein this first outer conductor is connected with this first inside conductor, and this first inside conductor screws in the inboard of this first helical form lead;

This second helical form lead comprises one second outer conductor and one second inside conductor at least, wherein this second outer conductor is connected with this second inside conductor, this second inside conductor screws in the inboard of this second helical form lead and is connected with this first inside conductor, has a symmetrical spiral loop structure of multi-turn coiling with formation;

This shielding layer is corresponding to the orthographic projection of the inner ring of this symmetry spiral loop structure, be disposed between this symmetry spiral loop structure and this substrate, and the part beyond the inner ring that should symmetry spiral loop structure should symmetry spiral loop structure, its orthographic projection drops on this shielding layer, and this shielding layer is in parallel with the inner ring of this symmetry spiral loop structure.

7. symmetrical expression differential inductance structure as claimed in claim 6, comprise that also at least one first connection lead is connected lead with at least one second, this first connection lead connects this first outer conductor and this first inside conductor, this second connects lead and connects this second outer conductor and this second inside conductor, and wherein this first connection lead second is connected lead and is symmetrical on this symmetrical plane with this.

8. symmetrical expression differential inductance structure as claimed in claim 6, also comprise at least one first gain lead, corresponding to the orthographic projection of this first inside conductor, be disposed between first inside conductor and this shielding layer, and this first gain lead and this first inside conductor, this shielding layer are in parallel.

9. symmetrical expression differential inductance structure as claimed in claim 8, also comprise at least one second gain lead, corresponding to the orthographic projection of this second inside conductor, be disposed between second inside conductor and this shielding layer, and this second gain lead and this second inside conductor, this shielding layer are in parallel.

10. symmetrical expression differential inductance structure as claimed in claim 6 also comprises at least one first gain lead, corresponding to the orthographic projection of this first inside conductor, be disposed between this shielding layer and this substrate, and this first gain lead is in parallel with this shielding layer.

11. symmetrical expression differential inductance structure as claimed in claim 10 also comprises at least one second gain lead, corresponding to the orthographic projection of this second inside conductor, be disposed between this shielding layer and this substrate, and this second gain lead is in parallel with this shielding layer.

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