CN101034539B - Power supply noise suppression method for multi-driver output circuit - Google Patents

Abstract

The invention belongs to the output circuit control technology, specially an application for multi-drive output circuit power source noise reduction method, mainly relates to the multi-drive output circuit power source noise reduction method. This application is one kind of the connection succession with 16 group strings transfers and constant current drive electric circuit. It has the following characteristic: the electric circuit input signal includes the data, the clock and the increase, the data signal value of electric circuit loading signal 1-16 clock signal before the rising edge in the rising edge time and memory, when the 1-16 clock signal after the loading signal falling edge drops in the rising edge, The electric circuit time sharing establishes 1-16 constant current drive states according to the memory value, each clock rising edge has only a constant current dirve condition to establish, that is to say each group drive output in a 1-n various time, according to the corresponding input condition data respectively changes to new states from the original states, each group drive output change time all receives the synchronized signal control, this method can effectively reduce power source transient state noise due to the greater electric current transient state change, thus, large scale promoted the data bandpass and promoted the power output which might realize.

Description

Power supply noise suppression method for multi-driver output circuit

technical field

The invention relates to a method for suppressing electrical noise of a multi-drive output circuit, in particular to a method for interface timing characteristics of a 16-way serial conversion and constant current drive circuit.

Background technique

At present, in the design of the existing multi-channel serial conversion and constant current drive circuit widely used in the market, the moment of setting the state of all constant current drives is the same, so the instantaneous current of the circuit changes greatly, resulting in the disadvantage of large power supply noise.

Contents of the invention

The purpose of the present invention is to provide a new timing sequence of a multi-channel serial conversion and constant current drive circuit for the deficiencies in the prior art.

The technical scheme of the present invention is: the input signal of the circuit includes data, clock and loading, and the circuit collects and stores the value on the data signal at 16 rising edges of the clock signal before the rising edge of the loading signal, and stores it at 16 immediately after the falling edge of the loading signal. On the rising edge of a clock signal, the circuit sets 16 constant current driving states in time division according to the stored value, and only one constant current driving state is set on each rising edge of the clock.

The effect of the invention is: the transient current change on the power supply is significantly reduced, thereby suppressing the power supply noise of the multi-channel serial conversion and constant current drive circuit.

The present invention will be described in detail with reference to the accompanying drawings in conjunction with the embodiments, so as to have a deeper understanding of the purpose, features and advantages of the present invention.

Description of drawings

Attached Figure 1: Functional structure diagram of 16-way serial conversion and constant current drive circuit;

Attached picture 2: 16-way serial conversion and constant current drive circuit interface timing diagram;

Accompanying drawing 3: The sequence diagram of delay controller work;

Detailed ways

The input signal of the circuit of the present invention includes instruction, state data, synchronous signal, and output signal includes 1-n road drive output, and the effect of these input signals is as follows:

Instruction: Used to indicate whether the 1-n road drive output port changes from the current state to the new state.

State data: provide data to determine the new state of the 1-n road drive output.

Synchronization signal: When the command indicates that the 1-n drive output port needs to change from the current state to the new state, the synchronization signal controls the moment when the 1-n drive output port changes, and the command, status data and synchronization signal cooperate with each other to complete control of the output circuit.

The input mode of commands and status data is divided into serial or parallel. In serial mode, commands and status data are respectively input into the circuit through one signal line; in parallel mode, commands and status data are input into the circuit through multiple signal lines. The signal line is input into the circuit.

The input methods of instructions and status data are divided into synchronous or asynchronous. In the synchronous mode, instructions, status data and synchronization signals have a strict time correspondence (for example: instructions or status data are only valid at the rising edge of the synchronization signal). With this time relationship, instructions and status data can be correctly input into the circuit and control the output of the circuit; in an asynchronous manner, instructions and status data do not depend on the synchronization signal, and there is no corresponding time relationship with the synchronization signal, but they are also The status data can be correctly input into the circuit and the output of the control circuit can be controlled.

The multi-drive output circuit includes at least 1-n drive output ports, and there are two drive modes for the ports: current mode and voltage mode; in current mode, the drive output port provides a drive current mode, and its state can be "on" current Or "no" current; in voltage mode, the drive output port provides control voltage mode, and its state can be "high" level or "low" level.

When the multi-drive output circuit receives the command, it judges the specific meaning of the command. If the meaning of the command is that the state of the drive output port does not change, the output port of the multi-drive output circuit will not respond; if the meaning of the command is the state of the drive output port If there is a change in the state, then many drive output circuits determine the new state of the 1-n road drive output ports according to the received state data, and then under the control of the synchronization signal, the 1-n road drive output ports change from the current state to the new state at different times. state change.

There are several methods for the multi-drive output circuit to determine the new state of each drive output port according to the input state data:

In current mode:

(1) "0" means there is current, "1" means no current

(2) "1" means there is current, "0" means no current

In voltage mode:

(1) "0" means high level, "1" means low level

(2) "1" means high level, "0" means low level

After the new state of the 1-n road drive output is determined, under the control of the synchronization signal, the 1-n road drive output port changes from the current state to the new state at different times, and the arrival of each synchronization signal will cause a drive output Port status changes; 1-n road drive output ports change at different times, there is a sequence relationship, the order of 1-n road drive output port changes can be attributed to the following three types: (1) According to the order from 1 to n the fixed order of

(2) According to the fixed order from n to 1;

(3) According to the defined random non-repeating sequence;

If the 1-n drive outputs are taken as a whole, then 1-n intermediate states are required to change all the 1-n drive outputs from the original state to the new state.

If the new state of a drive output port is the same as the state data corresponding to the current state, then the external performance of the drive output port remains unchanged from the original state.

Example

In the above content, there are many situations in the four items of the input mode of the input signal, the number and driving mode of the drive output port, the determination relationship between the state data and the state of the drive output port, and the order of the state change of the drive output port. The following In combination with the above, the working mode of the multi-drive output circuit in one of the cases is described.

The working method to be explained is shown in Figure 3, and its characteristics are as follows:

(1) The state data uses synchronous serial mode;

(2) The command uses asynchronous serial mode;

(3) The drive output port is current driven;

(4) There are 1-n channels of drive output ports, and n is 16;

(5) The corresponding relationship between the input state data and the drive output port is: "1" means that there is current, and "0" means that there is no current;

(6) The sequence of state changes of the drive output ports is a fixed sequence from 1 to n;

First, the status data enters the multi-driver output circuit through a data line. On each rising edge of the synchronous signal, the multi-driver output circuit collects a status data and stores it in the circuit. The circuit stores up to 16 status data, and enters the multi-driver Status data for the output circuit is queued in and out of the circuit.

The command signal enters the multi-drive output circuit through a data line, and adopts an asynchronous method. When the command signal indicates that the current state of the circuit remains unchanged, the state data is only collected in a queue and stored in the circuit. These data are important to the drive output port. The state has no effect; when the instruction signal indicates that the circuit changes from the current state to the new state, the circuit determines the new state of the 1-16 drive output ports according to the 1-16 state data currently stored in the circuit, and the 1-16 state The data corresponds to 1-16 drive output ports one by one, and then the drive output port starts to change from the current state to the new state under the control of the synchronous signal.

The circuit determines the new state of the drive output port according to the state data stored in the circuit. If the state data is "1", the new state of the corresponding drive output port is current; if the state data is "0", the corresponding drive output port The new state of is no current.

After the new state is determined, the 1-16 drive output ports change from the current state to the new state according to the following process. Road drive output port changes to a new state; the arrival of the second rising edge of the synchronization signal makes the second drive output port change to the new state, and so on, the arrival of the 16th synchronization signal rising edge makes the 16th drive output port Change to a new state; the sequence of 1-16 drive output ports changing from the current state to the new state under the control of the synchronization signal is a fixed sequence from 1-n.

1-16 drive output ports all change to the new state after 1-16 synchronization signals, after which the state of the drive output port will no longer change with the synchronization signal until a new command arrives, indicating that the drive output port needs to change from the current state to the new state. state change.

Claims (7)

1. the power noise restraining method of a multi-driving output circuit, it is characterized in that: input signal comprises data, clock and loading, output signal comprises 16 constant-current driving, each constant-current driving all has the opening and closing two states, the state of 16 constant-current driving be by 16 rising edge clock signals before the load signal rising edge constantly the value of data-signals decide, the state of 16 constant-current driving, in response to the 1st～16 clock after the load signal negative edge with enable 1～enable 16, open in turn, have only the state of a constant-current driving to change in each clock period.

2. power noise restraining method according to claim 1 is characterized in that: described 16 constant-current driving names are called constant-current driving 1 to constant-current driving 16.

3. power noise restraining method according to claim 1 is characterized in that: each constant-current driving all has the opening and closing two states: when open mode, electric current is a definite value; In the time of in off position, electric current is zero.

4. power noise restraining method according to claim 1, it is characterized in that: the state of described constant-current driving, be 16 bit data that are stored in the circuit, 1 data has determined the state of 1 drive output mouth, data are closed the decision of constant-current driving output port state: " 1 " expression is opened, and " 0 " expression is closed.

5. power noise restraining method according to claim 4, it is characterized in that: described 16 bit data are that 16 rising edge clocks of circuit before the load signal rising edge are gathered and are stored in the circuit from data signal line constantly, and 16 bit data and 16 constant-current driving are corresponding one by one.

6. according to claim 1,4 or 5 described power noise restraining methods, it is characterized in that: the state of constant-current driving 1 only the 1st rising edge clock signal behind the load signal negative edge is set up, and the state after being provided with is by the value decision of data-signal constantly of the 1st rising edge clock signal before the previous load signal rising edge.

7. according to claim 1,4 or 5 described power noise restraining methods, it is characterized in that: the state of constant-current driving 2～16 only the 2nd behind the load signal negative edge～the 16th rising edge clock signal is set up, and the state after being provided with is by the value decision of data-signal constantly of the 2nd～the 16th rising edge clock signal before the previous load signal rising edge.

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