CN100489737C - Data processing electronic device with double central processing units - Google Patents
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Abstract
本发明涉及一种具有双中央处理器(CPU)的数据处理电子装置,包括:第一中央处理器与第二中央处理器,其中第一中央处理器是连接第二中央处理器。第一中央处理器是低功率型的中央处理器,用来执行需要长执行时间的第一程序(Process)。第二中央处理器是一相较于第一中央处理器的计算能力更为强大的中央处理器用来执行需要快速运算的第二程序中。第一中央处理器是可输出中断信号至第二中央处理器,从而使第二中央处理器执行第二程序。第二中央处理器可输出中断信号至第一中央处理器,从而使第一中央处理器执行传送已由第一程序所处理过的数据。
The present invention relates to a data processing electronic device with dual central processing units (CPUs), comprising: a first central processing unit and a second central processing unit, wherein the first central processing unit is connected to the second central processing unit. The first central processing unit is a low-power central processing unit, which is used to execute a first program (Process) that requires a long execution time. The second central processing unit is a central processing unit with a more powerful computing power than the first central processing unit, which is used to execute a second program that requires fast calculation. The first central processing unit can output an interrupt signal to the second central processing unit, so that the second central processing unit executes the second program. The second central processing unit can output an interrupt signal to the first central processing unit, so that the first central processing unit executes and transmits data that has been processed by the first program.
Description
技术领域 technical field
本发明涉及一种具有双中央处理器(CPU)的数据处理电子装置,特别涉及一种结合两个不同属性中央处理器的数据处理电子装置。The invention relates to a data processing electronic device with dual central processing units (CPUs), in particular to a data processing electronic device combining two central processing units with different properties.
背景技术 Background technique
现有具有双中央处理器(CPU)的数据处理电子装置,例如双中央处理器的计算机主机板,其所配置的两个中央处理器皆是要采用同一型号的中央处理器,此种电路设计对于一些特殊应用(Applications)并非十分合适。因为在一些特殊应用上,必须要求数据处理电子装置能够非常省电且耐于长时间的运作,且数据处理电子装置又必须处理临时性所交付的大量工作量,例如大量运算的任务,且这大量工作量又必须在极短时间之内完成。因此,数据处理电子装置的电路设计乃必须足以胜任特殊应用的程序其在长时间且省电下来执行,且数据处理电子装置又必须具备高效能的运算能力,然而,高效能的运算能力的配置往往是必须付出高用电功率的代价。事实上,采用两个为同一型号中央处理器的数据处理电子装置实难以满足特殊应用的需求。Existing data processing electronic devices with dual central processing units (CPUs), such as computer motherboards with dual central processing units, are equipped with two central processing units of the same model. This circuit design Not very suitable for some special applications (Applications). Because in some special applications, the data processing electronic device must be able to save power and withstand long-term operation, and the data processing electronic device must deal with a large amount of workload temporarily delivered, such as a large number of computing tasks, and this A large amount of work must be completed in a very short time. Therefore, the circuit design of the data processing electronic device must be sufficient for the execution of special application programs for a long time and power saving, and the data processing electronic device must have high-performance computing capabilities. However, the configuration of high-performance computing capabilities Often it is necessary to pay the price of high power consumption. In fact, it is difficult to meet the requirements of special applications by using two data processing electronic devices with the same type of CPU.
本发明发明人有鉴于上述现有具有双中央处理器的数据处理电子装置的缺失,乃亟思发明改良而发明出一种结合两个不同属性中央处理器的数据处理电子装置。In view of the lack of the above-mentioned existing data processing electronic device with dual CPUs, the inventor of the present invention wanted to invent and improve and invented a data processing electronic device that combines two CPUs with different attributes.
发明内容 Contents of the invention
本发明第一目的是提供一种具有双中央处理器的数据处理电子装置,其兼具高运算能力,且能够在省电条件下耐于长时间的运作。The first object of the present invention is to provide a data processing electronic device with dual central processors, which has high computing power and can withstand long-term operation under power-saving conditions.
本发明第二目的是提供一种具有双中央处理器的数据处理电子装置,其兼具高运算能力,且能够在省电条件下耐于长时间的运作,同时,其中一个中央处理器依据数据量状态,以令另一个中央处理器加入数据处理的任务。The second object of the present invention is to provide a data processing electronic device with dual central processors, which has high computing power and can withstand long-term operation under power-saving conditions. state, so that another CPU can join the task of data processing.
为达成本发明上述目的,本发明提供一种具有双中央处理器(CPU)的数据处理电子装置,包括:第一中央处理器与第二中央处理器,其中,第一中央处理器是连接第二中央处理器。第一中央处理器是低功率型的中央处理器,用来执行需要长执行时间的第一程序(Process)。第二中央处理器是一相较于第一中央处理器的计算能力更为强大的中央处理器,用来执行需要快速运算的第二程序。第一中央处理器是可输出中断信号至第二中央处理器,从而使第二中央处理器执行第二程序。第二中央处理器是可输出中断信号至第一中央处理器,从而使第一中央处理器执行传送已由第一程序所处理过的数据。In order to achieve the above object of the present invention, the present invention provides a data processing electronic device with dual central processing units (CPU), including: a first central processing unit and a second central processing unit, wherein the first central processing unit is connected to the second central processing unit Two central processing units. The first CPU is a low-power CPU used to execute a first program (Process) that requires a long execution time. The second central processing unit is a central processing unit with a more powerful computing capability than the first central processing unit, and is used to execute the second program requiring fast calculation. The first central processing unit can output an interrupt signal to the second central processing unit, so that the second central processing unit executes the second program. The second CPU can output an interrupt signal to the first CPU, so that the first CPU executes and transmits the data processed by the first program.
为使本领域普通技术人员了解本发明的目的、特征及功效,现通过下述具体实施例,并配合附图,对本发明详加说明如后。In order to make those of ordinary skill in the art understand the purpose, features and effects of the present invention, the present invention will be described in detail below through the following specific embodiments and accompanying drawings.
附图说明 Description of drawings
图1显示本发明数据处理电子装置的电路方块图。FIG. 1 shows a circuit block diagram of the data processing electronic device of the present invention.
图2显示本发明第一中央处理器与第二中央处理器的状态模式图。FIG. 2 shows a state model diagram of the first central processing unit and the second central processing unit of the present invention.
图3显示本发明实施检测及处理人体心脏跳动信号的应用的数据处理电子装置的电路方块图。FIG. 3 shows a circuit block diagram of a data processing electronic device for implementing the application of detecting and processing human heart beating signals according to the present invention.
附图符号说明:Explanation of reference symbols:
10 数据处理电子装置10 Data processing electronics
11 第一中央处理器11 The first CPU
13 第二中央处理器13 Second CPU
15 显示器15 monitors
16 外部连接器16 external connectors
17 按键17 buttons
18 电力管理电路18 Power management circuit
20 存储卡20 memory cards
111 第一程序111 First procedure
131 第二程序131 Second procedure
具体实施方式 Detailed ways
请参见图1,本发明数据处理电子装置10的结构特色,乃是结合两个不同属性的中央处理器11、13来共同完成一项应用(Application)。依据本发明数据处理电子装置10所揭露的电路结构,乃特别适合于能够一方面去执行需要在能够节约用电功率条件下且长时间的程序,在另一方面,又能够去执行需要快速运算出结果的程序。Please refer to FIG. 1 , the structural feature of the data processing
第一中央处理器11是低功率型的中央处理器,以及是用来执行需要长执行时间的第一程序(Process)111。第二中央处理器13是运算能力更为强大的中央处理器,以及是用来需要快速运算的第二程序131。第一中央处理器11是连接于第二中央处理器13,而连接手段乃可以采用总线电性连接、通过光信号传输的连接、通过声音信号的连接。The
在图2中,第一中央处理器11与第二中央处理器13各自具有三个状态模式,其分别为初始(Initialize)模式、执行(Run)模式、待机(Slow)模式。当第一中央处理器11与第二中央处理器13开机(Power On)时,此时,第一中央处理器11与第二中央处理器13各自执行所属的初始(Initialize)模式的初始程序。当第一中央处理器11完成执行所属的初始程序之后,随即进入执行模式,如果在执行模式中,第一中央处理器11已完成执行所有程序,则自动进入待机模式,以节省用电。当第二中央处理器13完成执行所属的初始程序之后,随即进入执行模式,如果在执行模式中,第二中央处理器13已完成执行所有程序,则自动进入待机模式,以节省用电。In FIG. 2 , the first
在图2中,第一中央处理器11会主动输出中断信号给第二中央处理器13,以令第二中央处理器13从待机模式转移到执行模式。同理,第二中央处理器13会主动输出中断信号给第一中央处理器11,以令第二中央处理器13从待机模式转移到执行模式。同样地,第二中央处理器13可输出中断信号至第一中央处理器11,从而以令第一中央处理器11执行传送已由第一程序111所处理过的数据。In FIG. 2 , the first
请参见图3,本发明通过一项检测及处理人体心脏的跳动的应用范例,来进一步揭露与解释数据处理电子装置10。第一中央处理器11连接一些传感器(图未显示),且该些传感器接触于人体心脏附近。第一中央处理器11在执行模式下来执行外界数据收集程序,这外界数据收集程序即为第一程序111的范例程序。虽然长时间一直在执行外界数据收集程序111,然而由于第一中央处理器11在执行模式下所消耗的电功率极低,因此,第一中央处理器11足以胜任外界数据收集的任务。Please refer to FIG. 3 , the present invention further discloses and explains the data processing
上述第一程序111进一步包括人机提示程序,由第一中央处理器11执行人机提示程序来输出声音或光源至外界,以让数据处理电子装置10能够向外界通知其目前正进行收集该些外界数据中。使用数据处理电子装置10的使用人便可从声音或光源的提示,而知道数据处理电子装置10在进行收集该些外界数据。The above-mentioned
在图3中,第一中央处理器11的内部电路范例乃至少包含有:16位RISC核心(16 Bit RISC Core)、12 Bit模/数转换器(12 Bit ADC)、通用型输出入(GPIO)、通用异步接收器发送器(UART)。上述的第一程序(Process)111可采以固件手段来实现,且可以内建于第一中央处理器11。第二中央处理器13的内部电路范例乃至少包含有:16/32位ARM核心(16/32 Bit ARM Core)、随机存取内存(RAM)、闪存(Flash Memory)、外部内存传输接口(EMI)、串行周边接口(SPI)、两个通用异步接收器发送器(UART)、通用型输出入(GPIO)。上述的第二程序131可采以固件手段来实现,且可以内建于第二中央处理器13。In Fig. 3, the internal circuit example of the first
再者,第一中央处理器11当收集的数据量达到一预定量时,此时的第一中央处理器11会经由执行第一程序111,来输出中断信号至第二中央处理器13,之后,第二中央处理器13则进入执行模式而执行数据接收程序,以接收来自于第一中央处理器11所传送的对应于外界数据的心电数字化数据。执行数据接收程序即为第二程序131的其中之一的范例程序。请注意到:为了达成整体性节电的效果,在未接收到中断信号之前的第二中央处理器13可能是处于待机模式下,一经接收到中断信号,第二中央处理器13立即执行数据接收程序131,甚至于,接着执行数据显示程序131,来将心电数字化数据运算处理成心电波图形或其它与心电有关的图形,以显示在人机输出装置15,例如:显示器。上述心电波图形即为用于显示器15的显示数据。Furthermore, when the amount of data collected by the first
上述第一中央处理器11所要收集的数据量的预定量大小是可以弹性调整。当预定量调整成较小量时,则第二中央处理器13在极短时间之内便会完成分析该些数据,进而显示心电波图形或其它与心电有关图形,如此,则使得本发明数据处理电子装置10进一步具备数据实时收集与数据实时分析处理的能力。The predetermined amount of data to be collected by the first
再者,当第二中央处理器13完成数据处理时,第二中央处理器13亦能够主动向第一中央处理器11要求其传送心电数字化数据。第二中央处理器13可通过传送中断信号给第一中央处理器11,来达成要求传送心电数字化数据。Furthermore, when the second
虽然,处于执行模式下的第二中央处理器13所消耗的电功率会大于第一中央处理器11,但是,由于第二中央处理器13运算能力强大,能够在极短时间之内完成运算而获得结果,且随即再进入待机模式。因此,在经济的用电情况下,能够让数据处理电子装置10能够具备快速呈现处理结果的能力。Although the electric power consumed by the second
再者,数据处理电子装置10进一步包括外部连接器16,其用来连接外部电子装置。外部连接器16的具体手段可采行存储卡连接器,其用来插接存储卡20。在执行模式下,第二中央处理器13执行数据写入程序,以将心电数字化数据或对应的心电波图形存储于存储卡20。完成数据写入程序之后,第二中央处理器13随即再进入待机模式。数据写入程序即为第二程序131的其中之一的范例程序。Furthermore, the data processing
上述外部连接器16所连接的外部电子装置是属于远程电子装置,而其具体范例,乃可以是远程数据处理系统,据此,数据处理电子装置10可将数据经由外部连接器16的传输管道,而传送给远程数据处理系统,再由远程数据处理系统接续该些数据的处理作业。当然,远程数据处理系统亦可以经由外部连接器16的传输管道,向数据处理电子装置10传送数据。The external electronic device connected to the above-mentioned
再者,数据处理电子装置10进一步包括人机输入装置17,例如:至少一个以上的按键,且人机输入装置17是电性连接第二中央处理器13。该些按键17的信号是由第二中央处理器13处理。通过该些按键17的按压来指示第二中央处理器13执行一些功能(Functions)。例如标示为「存储(Store)」的按键17经被按压后,第二中央处理器13执行上述的数据写入程序131。又例如标示为「记录(Record)」的按键17经被按压后,第二中央处理器13会经由执行固件,来输出中断信号给第一中央处理器11,以令第一中央处理器11执行外界数据收集程序111。Moreover, the data processing
再者,数据处理电子装置10可选择性的包括电力管理电路18其电性连接第二中央处理器13。电力管理电路18主要用来管理第二中央处理器13的供电电力。Furthermore, the data processing
对于上述所揭露的检测及处理人体心脏的跳动的应用范例而言,第一程序111乃是属于前置作业,而第二程序131乃是属于后置作业。第一程序111与第二程序131彼此具有关连性。For the application example of detecting and processing the beating of the human heart disclosed above, the
本发明数据处理电子装置10通过中央处理器11、13传送中断信号的手段,来达到通知对方自待机模式转移至执行模式。使用中的数据处理电子装置10的其运作情形,在所有运作时间中,第一程序111的执行时间乃占据了所有运作时间的极大比例,相对地,而第二程序131的执行时间仅占据了所有运作时间的极小比例。因此,本发明一方面使用低功率型的第一中央处理器11来执行第一程序111,因而能够换取数据处理电子装置10耐于长时间的运作;本发明另一方面使用快速运算型的第二中央处理器13来执行第二程序111,因而在有效的节电控管下,乃能够换取数据处理电子装置10的快速输出。The data processing
本发明具有双中央处理器的数据处理电子装置的优点乃是在整体省电的条件下,能够耐于长时间的正常运作,此即为本发明优点与功效增进所在。The advantage of the data processing electronic device with dual central processors of the present invention is that it can withstand normal operation for a long time under the condition of overall power saving, which is where the advantages and efficacy of the present invention are improved.
上述检测及处理人体心脏的跳动的应用,其仅作为本发明数据处理电子装置的应用范例,本发明并不局限于上述所公开的应用。凡本领域普通技术人员,依照本发明所公开的精神,可将本发明数据处理电子装置实施在各种应用,凡此变化皆是属本发明的范畴以内,本发明的保护范围当视后附的申请专利范围所界定者为准。The above application of detecting and processing the beating of the human heart is only used as an application example of the data processing electronic device of the present invention, and the present invention is not limited to the application disclosed above. Those of ordinary skill in the art can implement the data processing electronic device of the present invention in various applications according to the spirit disclosed in the present invention, and all such changes are within the scope of the present invention, and the scope of protection of the present invention should be viewed as attached The one defined in the patent scope of the application shall prevail.
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CN1177147A (en) * | 1996-08-19 | 1998-03-25 | 三星电子株式会社 | System and method for handling software interrupt with parameter passing |
CN1496516A (en) * | 2001-03-22 | 2004-05-12 | �ֹ��� | Resource dedication system and method for computer architecture for broadband networks |
WO2005036332A2 (en) * | 2003-09-18 | 2005-04-21 | Vulcan Portals Inc. | Portable electronic device having high and low power processors operable in a low power mode |
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2006
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EP0519137A1 (en) * | 1991-06-20 | 1992-12-23 | Caliber Medical Corporation | Optical/electrical transceiver |
CN1177147A (en) * | 1996-08-19 | 1998-03-25 | 三星电子株式会社 | System and method for handling software interrupt with parameter passing |
CN1496516A (en) * | 2001-03-22 | 2004-05-12 | �ֹ��� | Resource dedication system and method for computer architecture for broadband networks |
WO2005036332A2 (en) * | 2003-09-18 | 2005-04-21 | Vulcan Portals Inc. | Portable electronic device having high and low power processors operable in a low power mode |
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