CN100406904C - Cross and sequent test interface device for low voltage differential signal - Google Patents
Cross and sequent test interface device for low voltage differential signal Download PDFInfo
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- CN100406904C CN100406904C CN2004100802070A CN200410080207A CN100406904C CN 100406904 C CN100406904 C CN 100406904C CN 2004100802070 A CN2004100802070 A CN 2004100802070A CN 200410080207 A CN200410080207 A CN 200410080207A CN 100406904 C CN100406904 C CN 100406904C
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Abstract
The present invention discloses a cross and sequent test interface device for low voltage differential signals, which comprises a control interface unit, an MCU unit, a jumper wire setting unit, an interlocking control unit and a cross matrix unit, wherein the control interface unit is used for communicating and connecting with an outer control desk. The jumper wire setting unit is used for selecting whether the operating mode of the device is configured by program control or manual control, and operating mode information is transmitted to the MCU unit and the interlocking control unit by the jumper wire setting unit. The interlocking control unit is used for gating a configuration mode by the unit and is output to the cross matrix unit, and simultaneously, the other configuration mode is locked. The MCU unit receives an instruction transferred from the control interface unit, the instruction is translated into a corresponding low-voltage differential signal connection relationship, and corresponding IO opening tube foot of MCU is set into a required level in a program control type. The cross matrix unit is controlled by the interlocking control unit, and the cross matrix unit is used for realizing cross connection of the low-voltage differential signal. The present invention provides the device which can realize the cross connection of an LVDS level signal to the LVDS level signal between two single plates or small systems; the present invention has the advantages of simple structure and low cost, and can be conveniently applied to an automatic test system.
Description
Technical field
The present invention relates to the digital signal interface measuring technology of electronics, communication field, particularly a kind of interface device of low voltage difference (LVDS) signal.
Background technology
In the signal transmission of electronics and communication system was used, for improving the signal transmission reliability, the external interface signal that the veneer medium velocity is higher was designed to LVDS level mode through regular meeting.As the external high-frequency clock transmission line of veneer or mini system, the external multichannel difference HW line in the time division multiplex system is usually designed to LVDS electric level interface form.
When the test external interface is the tested veneer or mini system of LVDS level signal, particularly batch testing the time, normally these LVDS signaling interfaces are docked with test platform the corresponding interface, confirm that by transmission clock or data these interfaces can realize normal function.If the external LVDS level signal interface of tested veneer or mini system is many (as the clock cable of clock unit multichannel differential transfer, the perhaps multichannel difference HW line of TSIU time slot interchange unit), under the LVDS interface quantity condition of limited that test platform provides, often need one of between affix can realize the interface device that the switching of multichannel LVDS signal cross connects.
In the patent No. of Qingdao Hisense Electric Appliance Co., Ltd is 02255362.2 Chinese patent " the multi-functional LVDS interface module of digital distance scope ", its major function is the interface module of conversion of signals chip structure TTL/CMOS level to the LVDS level conversion, by this module, send display message to display device with LVDS level form, to realize the high speed information stable transfer.
Xilinx house journal number is 6,218,858 United States Patent (USP) " Programmable input/output circuitfor FPGA for use in TTL; GTL; GTLP; LVPECL and LVDS circuits ", to the effect that at the scene programmable gate array FPGA (middle realization comprises five kinds of incoming levels of LVDS electric level interface and the cross connection relation between three kinds of output level interfaces, and can specify the connection pin of input and output level signal correspondence by program control configuration FPGA flexibly.
LVDS signaling interface in the above-mentioned patent all lays particular emphasis on the conversion or the cross connection that realize between LVDS level signal and other level signal, all be that a end in importing or exporting exists the LVDS electric level interface.All can not directly form the cross connection relation that input and output all have the LVDS electric level interface fully separately.
Summary of the invention
Purpose of the present invention is exactly to be to propose a kind of interface device that can finish the low-voltage differential signal cross splicing.
A kind of cross and sequent test interface device for low voltage differential signal comprises the control interface unit, microcontroller MCU unit, and wire jumper is provided with the unit, interlocking control module and cross matrix unit; Described control interface unit be used for the external control platform between communication be connected; It is program control configuration or manual configuration that described wire jumper is provided with the method for operation that the unit is used for selected this device, and gives MCU unit and interlocking control module with method of operation information conveyance; Described interlocking control module is used for a kind of configuration mode of gating and outputs to the cross matrix unit by this unit, simultaneously another kind of configuration mode is blocked; Described MCU unit receives the instruction that the control interface unit sends, instruction translation is become the corresponding low-voltage differential signal relation of continuing, the corresponding IO mouth of MCU pin is arranged to the level of needs program controlly, is gone to control the cross matrix unit by the interlocking control module; Described cross matrix unit is used to realize the cross splicing of low-voltage differential signal.
The device that the present invention proposes can be realized the LVDS level signal of two veneers or mini system to the cross splicing between the LVDS level signal, and can carry out the program control cross connection relation that is provided with between the input/output signal to this device by control interface.The device that the present invention proposes is applied to manual configuration or interface operation and continuation method is set can realizes that all static state continues, the user only need be provided with the wire jumper level or provide information according to the control desk interface and be provided with just passablely according to the relation of continuing that provides on the device, and its operation comes into plain view.The apparatus structure that the present invention proposes is simple, and cost is low, can be conveniently used in automatization test system.
Description of drawings
Fig. 1 is the principle assumption diagram of the interface device that proposes of the present invention;
Fig. 2 is the annexation exemplary plot of cross matrix unit among the present invention.
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
Fig. 1 is the principle assumption diagram of the interface device that proposes of the present invention.As shown in Figure 1, the interface device that the present invention proposes comprises the control interface unit, the MCU unit, and wire jumper is provided with the unit, interlocking control module and cross matrix unit.To be described in detail in conjunction with specific implementation respectively below.
The control interface unit
The control interface unit be used for realizing with external control platform (as computing machine) between communication be connected, mainly be can realize automatic program control configuration for this device to design.Externally customizable configuration control program module and the operation interface that calls on the control desk passed to this device by control interface with under the configuration information.Operation interface can be used for respectively organizing annexation between the level what debugging directly was provided with input and output; Can also be by the configurable control program module of routine call with this device and the tested system integration, so that form automatization test system.The control of external control platform (as computing machine etc.) is set up and can be comprised the two large divisions, a part is the debugging interface portion, be used for the user in the communication interface debugging that continues, can input/output signal cross splicing mode be set from the interface very intuitively, form static annexation; Another part is the function library that can call, the user can be in oneself application program the link block in the direct call function storehouse, the input/output signal annexation is set in function entrance, to realize dynamic connection, reach the purpose that PROGRAMMED AUTO continues.This two big assembly can independently mutually use, and the user can select according to actual needs.
Wire jumper is provided with the unit
It is program control configuration or manual configuration that wire jumper is provided with the method for operation that the unit is used for selected this device, and gives MCU unit and interlocking control module with method of operation information conveyance.If be set at the manual configuration mode, then can be according to the input and output level annexation diagram that provides on the device, realize that by the wire jumper contact pin that is provided with on this device the cross splicing of electric level interface connects, conveniently to debug or in test macro, to be configured to be fixedly coupled relation.This unit is fairly simple directly perceived in physics realization, can be designed to wire jumper the high-low level form to be set and realize, also can adopt the toggle switch mode to realize.In the manual configuration mode, the user is provided with the connected mode that high-low level combination (or dial-up combination) decides the cross matrix unit by wire jumper.The high-low level combination (or dial-up combination) that wire jumper is provided with is one to one with the annexation of cross matrix, has information to indicate to the user at device.
The MCU unit
MCU (micro-control unit) unit is that this device is realized program control core.The MCU unit is by the compatible microcontroller of 8051 series, compositions such as peripheral crystal oscillating circuit, supervisory circuit.Because the microcontroller working procedure of this device is fairly simple, MCU can select the inner band 8KB left and right sides FLASH program space, and the 8051 class single-chip microcomputers of 128 byte inner RAM get final product.
The MCU unit receives the instruction that control interface sends, and instruction translation is become corresponding continuing relation of LVDS signal, program control the corresponding IO mouth of MCU pin is arranged to the level (high or low) of needs, goes to control LVDS cross matrix unit by the interlocking control module.
The interlocking control module
The interlocking control module is used for a kind of configuration mode of gating and outputs to the cross matrix unit by this unit, simultaneously another kind of configuration mode is blocked.This unit is used for realizing the function interlocking between two kinds of methods of operation of the present invention, prevents false triggering.When the present invention operates in the PROGRAMMED AUTO configuration mode, manually be provided with ineffective automatically; When the present invention operated in user's manual configuration mode, proving installation did not then receive the control information that receives from the control interface unit.The interlocking control module is provided with the control signal that the unit is sent here with MCU unit and wire jumper, operate wire jumper according to the user configuration mode that the unit is provided with is set, a kind of configuration mode of decision gating outputs to the cross matrix unit by this unit, simultaneously another kind of configuration mode is blocked.
Owing to what handle by the interlocking control module is the TTL/CMOS level signal, and this unit can use the chips such as 74FCT16245 of band output control/OE end to realize according to " alternative " principle physically, and is both simple, reliable again.
The cross matrix unit
The cross matrix unit is used to realize the cross splicing of low-voltage differential signal.Cross connection relation in the cross matrix is controlled by the interlocking control module, and the cross matrix unit is that this device is realized the core that the LVDS signal cross continues.Cross matrix relatively flexibly, for the sake of simplicity, can be selected to have the gating control end and realize with the LVDS switch chip of output gate terminals in implementation design, as MAX9152 etc.Describe below in conjunction with Fig. 2.
Fig. 2 is the annexation exemplary plot of cross matrix unit among the present invention.Figure 2 shows that and adopt MAX9152 to form the cross matrix annexation figure with 4x4 cross splicing ability, D1 and D2 form the input receiver module, and D3 and D4 form output module.Be simplified design, the output gate terminals often can be designed as to be opened, and the cross splicing function is not constituted influence.Like this, the control signal of interlocking control end output is directly controlled the gating control end of cross matrix unit, annexation between input LVDS signal and the output LVDS signal can dynamically change along with the control signal of interlocking control module output, thereby realizes the cross splicing function.In actual applications, can form bigger crossing matrix modules according to above-mentioned principle.
The PROGRAMMED AUTO configuration mode of this device is the main method of operation, in order to realize LVDS signal dynamics cross splicing, the application of succeeding in a plurality of ATE (automatic test equipment).
Claims (7)
1. a cross and sequent test interface device for low voltage differential signal is characterized in that comprising the control interface unit, the MCU unit, and wire jumper is provided with the unit, interlocking control module and cross matrix unit, the MCU unit is a micro-control unit; Described control interface unit be used for the external control platform between communication be connected; It is program control configuration or manual configuration that described wire jumper is provided with the method for operation that the unit is used for selected this device, and gives MCU unit and interlocking control module with method of operation information conveyance; Described interlocking control module is used for a kind of configuration mode of gating and outputs to the cross matrix unit by this unit, simultaneously another kind of configuration mode is blocked; Described MCU unit receives the instruction that the control interface unit sends, instruction translation is become the corresponding low-voltage differential signal relation of continuing, the corresponding IO mouth of MCU pin is arranged to the level of needs program controlly, is gone to control the cross matrix unit by the interlocking control module; Described cross matrix unit is used to realize the cross splicing of low-voltage differential signal.
2. interface device according to claim 1 is characterized in that described external control platform is a computing machine.
3. interface device according to claim 1 is characterized in that described MCU unit comprises compatible microcontroller, peripheral crystal oscillating circuit and the supervisory circuit of 8051 series.
4. interface device according to claim 1 is characterized in that described wire jumper is provided with the unit and with wire jumper the high-low level mode is set and realizes.
5. interface device according to claim 1 is characterized in that described wire jumper is provided with the unit and adopts the toggle switch mode to realize.
6. interface device according to claim 1 is characterized in that described cross matrix unit adopts the low-voltage differential signal switch chip with gating control end and output gate terminals to realize.
7. interface device according to claim 6 is characterized in that described low-voltage differential signal switch chip is MAX9152.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2004100802070A CN100406904C (en) | 2004-09-27 | 2004-09-27 | Cross and sequent test interface device for low voltage differential signal |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2004100802070A CN100406904C (en) | 2004-09-27 | 2004-09-27 | Cross and sequent test interface device for low voltage differential signal |
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| Publication Number | Publication Date |
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| CN1755383A CN1755383A (en) | 2006-04-05 |
| CN100406904C true CN100406904C (en) | 2008-07-30 |
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| CN2004100802070A Expired - Lifetime CN100406904C (en) | 2004-09-27 | 2004-09-27 | Cross and sequent test interface device for low voltage differential signal |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101616035B (en) * | 2009-07-22 | 2011-10-05 | 浪潮电子信息产业股份有限公司 | A method for computer testing and monitoring network |
| CN105021974B (en) * | 2015-07-08 | 2018-01-30 | 航天科工防御技术研究试验中心 | A kind of difference interface circuit device test system |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6218858B1 (en) * | 1999-01-27 | 2001-04-17 | Xilinx, Inc. | Programmable input/output circuit for FPGA for use in TTL, GTL, GTLP, LVPECL and LVDS circuits |
| US6252419B1 (en) * | 1999-01-08 | 2001-06-26 | Altera Corporation | LVDS interface incorporating phase-locked loop circuitry for use in programmable logic device |
| CN1407725A (en) * | 2001-08-02 | 2003-04-02 | 皇家菲利浦电子有限公司 | Universal positive emitter coupling logic/low voltage differential command output structure |
| EP1353484A2 (en) * | 2002-04-12 | 2003-10-15 | STMicroelectronics, Inc. | Reconfigurable line driver |
| CN2590112Y (en) * | 2002-11-19 | 2003-12-03 | 青岛海信电器股份有限公司 | Multifunctional LVDS interface module of digital display equipment |
| JP2004072344A (en) * | 2002-08-05 | 2004-03-04 | Ricoh Co Ltd | Data transmission system provided with multiplexed lvds interface |
-
2004
- 2004-09-27 CN CN2004100802070A patent/CN100406904C/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6252419B1 (en) * | 1999-01-08 | 2001-06-26 | Altera Corporation | LVDS interface incorporating phase-locked loop circuitry for use in programmable logic device |
| US6218858B1 (en) * | 1999-01-27 | 2001-04-17 | Xilinx, Inc. | Programmable input/output circuit for FPGA for use in TTL, GTL, GTLP, LVPECL and LVDS circuits |
| CN1407725A (en) * | 2001-08-02 | 2003-04-02 | 皇家菲利浦电子有限公司 | Universal positive emitter coupling logic/low voltage differential command output structure |
| EP1353484A2 (en) * | 2002-04-12 | 2003-10-15 | STMicroelectronics, Inc. | Reconfigurable line driver |
| JP2004072344A (en) * | 2002-08-05 | 2004-03-04 | Ricoh Co Ltd | Data transmission system provided with multiplexed lvds interface |
| CN2590112Y (en) * | 2002-11-19 | 2003-12-03 | 青岛海信电器股份有限公司 | Multifunctional LVDS interface module of digital display equipment |
Non-Patent Citations (4)
| Title |
|---|
| LVDS促进3G基站的高速信号传送. Maxim公司Surawat，Promyotin.电子产品世界. 2001 |
| LVDS促进3G基站的高速信号传送. Maxim公司Surawat，Promyotin.电子产品世界. 2001 * |
| LVDS接口电路及设计. 司朝良.今日电子，第1期. 2003 |
| LVDS接口电路及设计. 司朝良.今日电子，第1期. 2003 * |
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