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CN100395951C - A method for suppressing common-mode interference of power converters - Google Patents

A method for suppressing common-mode interference of power converters Download PDF

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CN100395951C
CN100395951C CNB2004100157767A CN200410015776A CN100395951C CN 100395951 C CN100395951 C CN 100395951C CN B2004100157767 A CNB2004100157767 A CN B2004100157767A CN 200410015776 A CN200410015776 A CN 200410015776A CN 100395951 C CN100395951 C CN 100395951C
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common
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mode interference
field effect
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陈玮
钱照明
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Zhejiang University ZJU
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Abstract

一种功率变换器共模干扰抑制方法,是由整流滤波电路和升压(Boost)电路构成,在升压电路中是将其电感从直流输入的正母线上改接在直流输入的负母线上,其二极管改为共阳极二极管,将它从直流输出的正母线上改接在直流输出的负母线上。本发明是将直流输入正母线上的节点直接相连,因此其电位稳定,MOSFET漏极对地存在的分布电容和正母线上节点的分布电容对共模干扰影响很小。又因为电路正常工作状态时能输出稳定的直流电压,因此共阳极二极管分布电容对共模干扰的影响可以忽略。对共模干扰影响较大的导线分布电容可以通过印刷电路板的合理布线减小,从而达到抑制共模干扰的目的。此发明简单实用,能应用于现有的一些功率变换器拓扑中。

Figure 200410015776

A power converter common-mode interference suppression method is composed of a rectification filter circuit and a boost (Boost) circuit. In the boost circuit, the inductance is changed from the positive bus of the DC input to the negative bus of the DC input. , the diode is changed to a common anode diode, and it is connected from the positive bus of the DC output to the negative bus of the DC output. The invention directly connects the nodes on the direct current input positive bus, so its potential is stable, and the distributed capacitance of the MOSFET drain to the ground and the distributed capacitance of the nodes on the positive bus have little influence on the common mode interference. And because the circuit can output a stable DC voltage when it is in normal working state, the influence of the common-anode diode distributed capacitance on the common-mode interference can be ignored. The distributed capacitance of wires that has a greater impact on common-mode interference can be reduced through reasonable wiring of the printed circuit board, thereby achieving the purpose of suppressing common-mode interference. The invention is simple and practical, and can be applied to some existing topologies of power converters.

Figure 200410015776

Description

一种功率变换器共模干扰抑制方法 A method for suppressing common-mode interference of power converters

技术领域 technical field

本发明涉及功率变换器的共模电磁干扰(EMI)抑制方法。The present invention relates to a common-mode electromagnetic interference (EMI) suppression method for a power converter.

背景技术 Background technique

功率变换器传导共模电磁干扰的来源主要是电路中电位随时间剧烈改变的电节点在其对地的分布电容中产生位移电流并流过地回路而造成的。The source of the power converter's conducted common-mode electromagnetic interference is mainly caused by the displacement current generated in the distributed capacitance of the electric node in the circuit whose potential changes drastically with time and flows through the ground loop.

通常,金属氧化物场效应管(MOSFET)的漏极经其散热金属壳通过绝缘垫片固定在外接散热器上,散热器接地,因此,MOSFET的漏极对地存在一个大的分布电容。同理,对于常见的二极管,其封装的散热金属壳与二极管阴极相连,同样通过绝缘垫片固定在外接散热器上,即形成二极管阴极对地的分布电容。另外,电路中导线也存在对地的分布电容。Usually, the drain of a metal oxide field effect transistor (MOSFET) is fixed on an external heat sink through its heat dissipation metal shell through an insulating gasket, and the heat sink is grounded. Therefore, there is a large distributed capacitance between the drain of the MOSFET and the ground. In the same way, for common diodes, the heat-dissipating metal shell of the package is connected to the cathode of the diode, and is also fixed on the external heat sink through an insulating gasket, that is, the distributed capacitance of the cathode of the diode to ground is formed. In addition, the wires in the circuit also have distributed capacitance to the ground.

在这种电路中,与MOSFET的漏极相连的节点电位随MOSFET的通断状态的改变而剧烈变化,即du/dt很大。MOSFET的对地分布电容和与之相连导线的对地分布电容,会产生一个大的位移电流,通过散热器流入地回路,形成共模干扰电流。In this circuit, the potential of the node connected to the drain of the MOSFET changes drastically with the on-off state of the MOSFET, that is, the du/dt is very large. The ground-distributed capacitance of the MOSFET and the ground-distributed capacitance of the wire connected to it will generate a large displacement current, which will flow into the ground loop through the radiator to form a common-mode interference current.

通常,导线产生的分布电容可以通过印刷电路板的合理布线减小,但是对MOSFET的漏极对地存在的分布电容却无法减小。Generally, the distributed capacitance generated by wires can be reduced through reasonable wiring of the printed circuit board, but the distributed capacitance existing to the drain of the MOSFET to the ground cannot be reduced.

为了抑制这种电路中的共模干扰,不少学者提出了一些方法,如:共模电流反相抵消的方法,这需增加一个附加绕组和一个MOSFET,增加了成本;共模电流无源消除的方法,这仍需要一个附加绕组和一个附加电容;动态节点平衡的方法,这很难应用于升压功率因数校正(Boost PFC)电路,又增加了电路In order to suppress the common-mode interference in this circuit, many scholars have proposed some methods, such as: the common-mode current anti-phase offset method, which requires an additional winding and a MOSFET, which increases the cost; common-mode current passive elimination method, which still requires an additional winding and an additional capacitor; the method of dynamic node balancing, which is difficult to apply to a boost power factor correction (Boost PFC) circuit, and increases the circuit

中的动态节点,增加了印刷电路板布线的难度。The dynamic node in, increases the difficulty of printed circuit board layout.

发明内容 Contents of the invention

本发明的目的是通过在电路中构造稳态节点,减小MOSFET漏极对地存在的分部电容的影响,即提供一种节点电位稳定,分布电容对共模干扰影响小的功率变换器共模干扰抑制方法。The purpose of the present invention is to reduce the influence of the MOSFET drain on the sub-capacitance that exists on the ground by constructing a steady-state node in the circuit, that is, to provide a power converter with a stable node potential and a small influence of the distributed capacitance on the common-mode interference. Mode interference suppression method.

本发明的目的是通过下述方案实现的:由整流滤波电路和升压Boost电路构成,在所述升压Boost电路中是将电感由整流滤波电路正输出节点和功率场效应管的漏极节点之间改接到在原电路中直接连接的整流滤波电路负输出节点和功率场效应管的漏极节点之间,将整流滤波电路正输出节点和功率场效应管的漏极节点直接连接,将其常用二极管改为其散热金属壳与阳极相连的共阳极二极管,并将它由接在功率场效应管的漏极节点和储能电容正极节点之间改接到在原电路中直接连接的功率场效应管源极节点和储能电容负极节点之间,将功率场效应管漏极节点和储能电容正极节点直接连接。The purpose of the present invention is achieved by the following scheme: it is composed of a rectification filter circuit and a boost boost circuit, in which the inductance is made from the positive output node of the rectifier filter circuit and the drain node of the power field effect tube Connect between the negative output node of the rectification filter circuit directly connected in the original circuit and the drain node of the power field effect tube, directly connect the positive output node of the rectification filter circuit and the drain node of the power field effect tube, and connect them The commonly used diode is changed to a common anode diode whose heat dissipation metal shell is connected to the anode, and it is connected between the drain node of the power field effect transistor and the positive node of the energy storage capacitor to the power field effect directly connected in the original circuit. Between the source node of the transistor and the negative node of the energy storage capacitor, the drain node of the power field effect transistor is directly connected with the positive node of the energy storage capacitor.

本发明由于将整流滤波电路正输出端上电感连接在整流滤波电路负输出端上和将功率场效应管漏极和储能电容正极之间的二极管去掉,采用共阳极二极管连接在功率场效应管源极和储能电容负极之间,而在直流输入和直流输出的正母线上无任何元器件,因此导线节点电位稳定,MOSFET的漏极对地存在的分布电容和整流滤波电路正输出端线上节点的分布电容对共模干扰影响很小。又因为在正常工作状态时输出直流电压稳定,所以共阳极二极管阳极对地的分布电容和整流滤波电路负输出端线直流输出端对地的分电容对共模干扰的影响可以忽略。此时,在MOSFET开关动作时,在电路中仅有电感和共阳极二极管阴极连接的节点有高电位变化率,该节点对地的分布电容会成为影响共模干扰的主要因素,但通过印刷电路板的合理布线,能很容易减小该节点对地的分布电容。并具有简单实用,可以应用于现有的一些功率变换器拓扑中,如升压功率因数校正(Boost PFC)电路,降压(Buck)电路,升降(Buck-Boost)电路等。Because the present invention connects the inductance on the positive output end of the rectification filter circuit to the negative output end of the rectification filter circuit and removes the diode between the drain electrode of the power field effect transistor and the positive electrode of the energy storage capacitor, a common anode diode is used to connect the power field effect transistor Between the source and the negative pole of the energy storage capacitor, there are no components on the positive bus of the DC input and DC output, so the potential of the wire node is stable, and the distributed capacitance existing between the drain of the MOSFET and the positive output terminal of the rectification filter circuit The distributed capacitance of the node has little effect on the common mode interference. And because the output DC voltage is stable in the normal working state, the influence of the distributed capacitance of the anode of the common anode diode to the ground and the partial capacitance of the negative output terminal line of the rectifier filter circuit to the ground of the DC output terminal to the ground can be ignored. At this time, when the MOSFET switches, only the node connecting the inductor and the cathode of the common anode diode in the circuit has a high potential change rate, and the distributed capacitance of this node to the ground will become the main factor affecting the common mode interference, but through the printed circuit Reasonable layout of the board can easily reduce the distributed capacitance of the node to the ground. And it is simple and practical, and can be applied to some existing power converter topologies, such as boost power factor correction (Boost PFC) circuit, step-down (Buck) circuit, step-down (Buck-Boost) circuit, etc.

附图说明 Description of drawings

图1是本发明的电路原理图;Fig. 1 is a schematic circuit diagram of the present invention;

图2是现有技术参考图。Figure 2 is a prior art reference diagram.

具体实施方式 Detailed ways

参照图1,本发明是由整流滤波电路和升压Boost电路构成。整流滤波电路由4个二极管组成桥式整流与电容C1并联构成,在电路中有连接整流滤波电路正输出端节点n5、整流滤波电路负输出端节点n6。升压Boost电路由金属氧化物场效应管(MOSFET)Q、散热器T、电感L、共阳极二极管D及储能电容C2构成。MOSFET在电路中有连接漏极节点n1、源极节点n2,其漏极d与漏极节点n1连接,其漏极d对地存在一个大的分布电容Cm;电感L连接在整流滤波电路负输出端节点n6和源极节点n2之间。储能电容C2在电路中有连接正极节点n3、负极节点n4。共阳极二极管D连接在MOSFET源极节点n2和储能电容C2负极节点n4之间。MOSFET和共阳极二极管D的散热金属壳分别通过绝缘垫片固定在散热管T上。这时正阳极二极管D对散热管T的分布电容Cd实际上是二极管阳极对地的分布电容。电路中Cp1、Cp2、Cp3和Cp4分别是与功率场效应管Q的漏极节点n1、源极节点n2、储能电容C2正极节点n3、负极节点n4相连导线对地的分布电容。由此可见,功率场效应管Q漏极节点n1、储能电容C2正极节点n3直接相连,因此其电位稳定,分布电容Cm、Cp1和Cp3对共模干扰影响很小。同时,在电路正常工作时输出直流电压稳定,所以储能电容C2负极节点n4电位也是稳定的,分布电容Cd和Cp4对共模干扰的影响可以忽略。此时,在金属氧化物场效应管Q开关动作时,电路中仅有功率场效应管Q源极节点n2电位有高的du/dt,电容Cp2成为影响共模干扰的主要因素,这通过印刷电路板的合理布线,可以很容易减小这个电容,从而达到了抑制电路中共模干扰的目的。Referring to Fig. 1, the present invention is composed of a rectification filter circuit and a boost Boost circuit. The rectification filter circuit is composed of 4 diode bridge rectifiers connected in parallel with a capacitor C1 . In the circuit, there are node n5 connected to the positive output terminal of the rectifier filter circuit and node n6 to the negative output terminal of the rectifier filter circuit. The boost boost circuit is composed of a metal oxide field effect transistor (MOSFET) Q, a radiator T, an inductor L, a common anode diode D and an energy storage capacitor C2 . The MOSFET is connected to the drain node n1 and the source node n2 in the circuit, and its drain d is connected to the drain node n1, and there is a large distributed capacitance C m between the drain d and the ground; the inductance L is connected to the rectifier filter circuit negative between the output node n6 and the source node n2. The energy storage capacitor C2 is connected to the positive node n3 and the negative node n4 in the circuit. The common anode diode D is connected between the source node n2 of the MOSFET and the negative node n4 of the energy storage capacitor C2. The heat dissipation metal shells of the MOSFET and the common anode diode D are respectively fixed on the heat dissipation pipe T through insulating gaskets. At this time, the distributed capacitance C d of the positive anode diode D to the heat pipe T is actually the distributed capacitance of the diode anode to the ground. C p1 , C p2 , C p3 and C p4 in the circuit are the distributed capacitances of the wires connected to the drain node n1, the source node n2 of the power field effect transistor Q, the positive node n3 and the negative node n4 of the energy storage capacitor C2 to the ground respectively . It can be seen that the drain node n1 of the power field effect transistor Q and the positive node n3 of the energy storage capacitor C2 are directly connected, so their potentials are stable, and the distributed capacitances C m , C p1 and C p3 have little influence on the common mode interference. At the same time, the output DC voltage is stable when the circuit is working normally, so the potential of the negative node n4 of the energy storage capacitor C2 is also stable, and the influence of the distributed capacitors C d and C p4 on common-mode interference can be ignored. At this time, when the metal oxide field effect transistor Q is switched, only the source node n2 of the power field effect transistor Q in the circuit has a high du/dt potential, and the capacitance C p2 becomes the main factor affecting the common mode interference, which is passed through Reasonable wiring of the printed circuit board can easily reduce this capacitance, thereby achieving the purpose of suppressing the common mode interference of the circuit.

Claims (1)

1. power inverter common mode disturbances inhibition method, comprise current rectifying and wave filtering circuit and the Boost circuit that boosts, it is characterized in that: in the described Boost of boosting circuit be with inductance (L) by reconfiguration between the drain node (n1) of current rectifying and wave filtering circuit positive output node (n5) and power field effect pipe (Q) to the source node (n2) of direct-connected current rectifying and wave filtering circuit negative output node (n6) in primary circuit and power field effect pipe (Q), the drain node (n1) of current rectifying and wave filtering circuit positive output node (n5) and power field effect pipe (Q) directly is connected, change its diode into co-anode diode (D), reconfiguration directly is connected power field effect pipe (Q) drain node (n1) with storage capacitor (C2) cathode node (n3) to direct-connected power field effect pipe (Q) source node (n2) in primary circuit and storage capacitor (C2) the negative pole node (n4) between power field effect pipe (Q) drain node (n1) and storage capacitor (C2) cathode node (n3) by being connected on.
CNB2004100157767A 2004-01-09 2004-01-09 A method for suppressing common-mode interference of power converters Expired - Fee Related CN100395951C (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101860319B (en) * 2010-06-01 2012-05-23 华东交通大学 A multi-objective common-mode voltage suppression method for high-power inverters
US9800133B2 (en) * 2016-03-22 2017-10-24 Infineon Technologies Ag Active common mode cancellation
CN110798123A (en) * 2018-08-01 2020-02-14 浙江鲲悟科技有限公司 Variable frequency driving system and method for improving common mode interference

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2450822Y (en) * 2000-08-10 2001-09-26 北京通力环电气有限公司 High power factor AC/DC converter power limiter
CN1353497A (en) * 2000-11-02 2002-06-12 翁征明 Multi-channel parallelly connected step-up type power factor corrector
CN1121088C (en) * 2000-12-26 2003-09-10 艾黙生网络能源有限公司 Single-phase power factor correcting step-up converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2450822Y (en) * 2000-08-10 2001-09-26 北京通力环电气有限公司 High power factor AC/DC converter power limiter
CN1353497A (en) * 2000-11-02 2002-06-12 翁征明 Multi-channel parallelly connected step-up type power factor corrector
CN1121088C (en) * 2000-12-26 2003-09-10 艾黙生网络能源有限公司 Single-phase power factor correcting step-up converter

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