CN100388108C - Liquid crystal display assembly, thin film transistor substrate and test method - Google Patents

Abstract

A liquid crystal display assembly mainly comprises a plurality of scanning lines and data lines arranged on a substrate, at least one odd scanning line short circuit rod and at least one even scanning line short circuit rod. The data lines are intersected with the scanning lines to form a plurality of pixel regions. The odd scan line shorting bar has a first sub-odd scan line shorting bar electrically connected to the (m +1) th scan line and a second sub-odd scan line shorting bar electrically connected to the (n +3) th scan line, wherein m and n are 0, 4, 8, 12, and …. The even scan line shorting bar has a first sub-even scan line shorting bar electrically connected to the (o +2) th scan line and the second sub-even scan line shorting bar and electrically connected to the (p +4) th scan line, wherein o and p are 0, 4, 8, 12, and …. The invention also provides a test method of the liquid crystal display assembly.

Description

Liquid crystal display component and thin film transistor substrate and testing method

technical field

The present invention relates to a liquid crystal display device, and in particular to a shorting bar structure with a 4G3D design.

Background technique

A liquid crystal display assembly generally consists of a first substrate, a second substrate and liquid crystal filled between the two substrates. The first figure shows a partial top view of a first substrate of a known liquid crystal display assembly. Generally speaking, a group of scan lines 1 and a group of data lines 2 are disposed on the first substrate. Two adjacent scan lines 1 and two adjacent data lines 2 define a pixel area. Each pixel area is provided with a thin-film transistor 3 (thin-film transistor, TFT) and a pixel electrode (not shown in the figure). The second substrate (not shown in the figure) is generally provided with a color filter for displaying colors and a common electrode.

During the liquid crystal display manufacturing process, the aforementioned scan lines, data lines, and thin film transistors (TFTs) or switching elements will accumulate static electricity. Thin film transistors (TFTs) or switching elements are easily destroyed by static electricity, thus causing uneven display on the screen. In addition, the data lines may be disconnected, and the insulating layer between the data lines and the scan lines may be damaged, thus causing a short circuit. Therefore, one end of the scan line and the data line is generally connected to shorting bars 4, 5, 6, 7, and 8, whereby the intruded static electricity can be dissipated through the effect of the shorting bars.

The shorting bar of this known liquid crystal display component adopts 2G3D design. In detail, all scan lines 1 are electrically connected to two short-circuit bars 4 , 5 , and all data lines 2 are electrically connected to three short-circuit bars 6 , 7 , 8 . The data line uses three different short-circuit bars, which can test R, G, and B screens, so that defects visible under R, G, and B screens can be detected, such as line defects, point defects, etc.

Figure 2 shows the timing diagrams (timingdiagrams) for component testing of liquid crystal displays designed with 2G 3D design, where A is the scan period of the scan line. In the liquid crystal display adopting 2G3D design, since all scanning lines 1 are only connected by two short-circuit bars 4, 5 (that is, connecting odd-numbered scanning lines and even-numbered scanning lines respectively), all odd-numbered scanning lines or even Row scanning lines use the same timing control (see Figure 2), so it is impossible to effectively detect defects caused by short circuits between two adjacent odd-numbered or even-numbered scanning lines (for example, due to scratches or line residual gold).

Contents of the invention

Therefore, the main purpose of the present invention is to provide a liquid crystal display assembly with a better design of the shorting bar, which can overcome or at least improve the aforementioned problems of the prior art.

To achieve the above and other objectives, the liquid crystal display assembly according to the present invention includes a plurality of scan lines and data lines disposed on the substrate, at least one short bar for odd scan lines, and at least one short bar for even scan lines. The data lines intersect the scan lines to form a plurality of pixel areas. The odd scanning line shorting bar has a first odd scanning line shorting bar electrically connected to the (m+1)th scanning line and a second odd scanning line shorting bar electrically connected to the (n+3)th scanning line Scanning lines, where m, n=0, 4, 8, 12, . . . The even-numbered scan-line short-circuit bar has a first sub-even-numbered scan-line short-circuit bar electrically connected to the (o+2)-th scan line and a second sub-even-numbered scan-line short-circuit bar electrically connected to the (p+4)-th scan line Scanning lines, where o, p=0, 4, 8, 12, . . . The q data line short-circuit bars are formed on the substrate, and the q data line short-circuit bars are respectively connected to the (q×r)+1, (q×r)+2, (q×r)+3... , (q×r)+q data lines are connected in one-to-one correspondence, wherein, q=L, and r is zero or a positive integer.

In the liquid crystal display adopting the design of the short-circuit bar of the present invention, since all even-numbered scanning lines are divided into two groups and connected with two sub-even-numbered scanning line short-circuit bars respectively, and all odd-numbered scanning lines are also divided into two groups and respectively used two sub-odd-numbered scanning lines Line short-circuit bars are connected, so all adjacent two odd-numbered or even-numbered scan lines can be controlled with different timings, so that short circuits between adjacent two odd-numbered or even-numbered scan lines can be effectively detected (For example, due to scratches or wire residual gold) caused by defects.

In addition, since all the data lines are divided into three groups according to the colors to be displayed, and are respectively connected to three data line short-circuit bars, the liquid crystal display designed by the present invention can pass the connection with the scanning lines when performing component testing. Synchronous signal, input different signals to the three data line short-circuit bars of the data line, and display R, G, B screens during component testing, so as to effectively detect defects caused by short-circuits of data lines of different colors.

To achieve the above and other purposes, a thin film transistor substrate according to the present invention includes: a plurality of scanning lines arranged on the substrate; a plurality of data lines arranged on the substrate, and the data lines are connected to the substrate The scanning lines intersect to form a plurality of pixel areas, each of which has L sub-pixels, wherein L is a positive integer greater than zero; at least one thin film transistor is arranged in each of the sub-pixels, and the thin film transistor is electrically Sexually connected to one of the adjacent scan lines and one of the adjacent data lines; at least one odd-numbered scan-line short-circuit bar is arranged on the substrate, and the odd-numbered scan-line short-circuit bar has a first A sub-odd scan line short-circuit bar is electrically connected to the (m+1)th scan line and a second sub-odd scan line short-circuit bar is electrically connected to the (n+3)-th scan line, wherein m, n =0, 4, 8, 12, ...; at least one even-numbered scanning line short-circuit bar is arranged on the substrate, and the even-numbered scan-line short-circuit bar has a first sub-even-numbered scan-line short-circuit bar, which is electrically connected to the ( o+2) scan lines and the second sub-even scan line short-circuit bar are electrically connected to the (p+4) scan line, wherein o, p=0, 4, 8, 12, ...; and The q data line short-circuit bars are formed on the substrate, and the q data line short-circuit bars are respectively connected to the (q×r)+1, (q×r)+2, (q×r)+3... , (q×r)+q data lines are connected in one-to-one correspondence, wherein, q=L, and r is zero or a positive integer.

To achieve the above and other purposes, according to a method for testing a liquid crystal display assembly of the present invention, the liquid crystal display assembly has a plurality of scanning lines and data lines, and is electrically connected to the (m+1)th scanning line A sub-odd scanning line shorting bar, a second sub-odd scanning line shorting bar electrically connected to the (n+3)th scanning line, and a first sub-even scanning line electrically connected to the (o+2)th scanning line Line short-circuit bar and the second sub-even scanning line short-circuit bar electrically connected to the (p+4)th scan line, m, n=0, 4, 8, 12, . . . , and o, p=0, 4, 8, 12, ..., the method includes: applying the first scan signal to the short-circuit bar of the first sub-odd scan line, and synchronously sending the first data signal to the corresponding data line, and then applying the second scan signal The signal is applied to the short-circuit bar of the second sub-odd scanning line, and the first data signal is synchronously sent out to the corresponding data line; and the third scanning signal is applied to the short-circuit bar of the first sub-even-numbered scanning line, and the first data signal is synchronously sent out The second data signal is applied to the corresponding data line, and then the fourth scanning signal is applied to the short-circuit bar of the second sub-even scanning line, and the second data signal is synchronously sent to the corresponding data line.

In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the attached drawings.

Description of drawings

Figure 1: A partial top view of a first substrate of a known liquid crystal display assembly;

Figure 2: Timing diagram for component testing of the liquid crystal display in Figure 1;

FIG. 3: A partial top view of a first substrate of a liquid crystal display assembly according to an embodiment of the present invention; and

Figure 4: Timing diagram for component testing of the LCD of Figure 3.

[Description of main component designations]

1 scan line 2 data line

3 thin film transistor 4, 5, 6, 7, 8 shorting bar

100 first substrate 110 scanning lines

112 Contact pad 120 Data line

122 contact pad 200 second substrate

130 Odd scanning line shorting bar

132 The first sub-odd scanning line short-circuit bar

134 Second sub-odd scanning line short-circuit bar

140 even scan line short bar

142 The first sub-even scanning line short-circuit bar

144 Second sub-odd scanning line short-circuit bar

170a, 170b, 170c data line short-circuit bar

A, B scan cycle

G ₁ , G ₂ , G ₃ , G ₄ scan line test pads

R, G, B data line test pad

Detailed ways

The present invention relates to a liquid crystal display assembly with a better short-circuit bar design, which is mainly composed of a first substrate, a second substrate and liquid crystal filled between the two substrates. The substrate can be a glass substrate, a flexible substrate or an opaque substrate. The first substrate is provided with a plurality of matrix-arranged pixel (pixel) areas, which are provided with switching elements (switching element) (such as thin film transistors (TFT)) and pixel electrodes; The color filter and the common electrode (common electrode). Generally, the first substrate is called a thin film transistor substrate, and the second substrate is called a color filter substrate because it is provided with color filters. A spacer (spacer) (not shown in the figure) is generally provided between the two substrates to define the gap between the two substrates, and the surfaces of the two substrates are respectively attached with polarizers to convert visible light Polarized. 3 shows a partial top view of the first substrate 100 of a liquid crystal display assembly according to an embodiment of the present invention, which is larger than the second substrate 200 shown by the dotted line; after cutting along the CT line, the part outside the CT line will be thrown away. A plurality of scan lines 110 and a plurality of data lines 120 are provided on the first substrate 100 . Although not shown in the figure, the scan lines 110 and the data lines 120 are insulated from each other by an inner insulating layer (not shown). In addition, the display region is formed by the interlaced regions of the scan lines 110 and the data lines 120 . The data lines 120 intersect with the scan lines 110 to form a plurality of pixel areas, each of which has L sub-pixels, wherein L is a positive integer greater than zero. In the embodiment of the present invention, a sub-pixel refers to a block defined by two adjacent gate lines, two adjacent data lines and corresponding color filters. When the color filter (not shown in the figure) contains three kinds of red, green and blue (that is, L=3), the sub-pixels represent red, green and blue respectively, so it is defined as red sub-pixel, green sub-pixel pixels with blue subpixels.

Although not shown in the figure, it can be understood that in each sub-pixel area, a thin film transistor (TFT) is provided as a switching element (switching element) and a transparent electrode (such as iridium tin oxide (ITO)) formed pixel electrodes. When the scan signal is input to the scan line, the thin film transistor is turned on to send the video signal of the data line to the pixel electrode via itself.

Before cutting, as shown in FIG. 3 , the odd scan line short bar 130, the even scan line short bar 140 and the data line short bar 170a, 170b, 170c are located on the scan line 110 and the periphery of the data line 120 . Preferably, the short-circuit bars can be connected to each other by capacitors (not shown in the figure). The shorting bars can avoid terminal breakage caused by static spark. The short-circuit bars are respectively provided with scanning line test pads G ₁ , G ₂ , G ₃ , G ₄ and data line test pads R, G, B for connecting with the power supply for testing.

As shown in FIG. 3 , the scan line 110 according to the present invention may have a contact pad (terminal) 112 for connecting to a gate drive IC (not shown in the figure). According to the data line 120 of the present invention, one end thereof forms a contact pad (terminal) 122 for connecting to a data drive IC (not shown in the figure). Since the embodiment shown in FIG. 3 adopts a design in which each pixel area has three sub-pixels (that is, L=3 (RGB)), the other ends of the data lines 120 are respectively connected to three data line shorting bars 170a, 170b, 170c. In detail, the three data line shorting bars 170a, 170b, 170c are respectively connected to the (3×r)+1, (3×r)+2, (3×r)+3 data lines in one-to-one correspondence, wherein r is zero or a positive integer. For example, the data line shorting bar 170a is connected to the 1st, 4th, 7th... data lines. The data line shorting bar 170b is connected to the 2nd, 5th, 8th... data lines. The data short-circuit pole 170c is connected to the 3rd, 6th, 9th... data lines.

It can be understood that although the embodiment shown in FIG. 3 is an example of the design of L=3 (RGB), the present invention can also be applied to L=4 (such as RGBW, RGBR, RGBB, ... etc.), L= 5 (RGBWB, RGBWR, RGBWY, . . . , etc.), L=6 (RGBWYK, . . . , etc.) design. Therefore, the present invention is provided with q data line short-circuit bars on the substrate, and the q data line short-circuit bars are respectively connected to (q×r)+1, (q×r)+2, (q×r)+ 3 . . . (q×r)+q data lines are connected in one-to-one correspondence, wherein, q=L, and r is zero or a positive integer.

It should be noted that in the liquid crystal display assembly shown in FIG. 3 , the (m+1) scan line is electrically connected to the first sub-odd scan line short bar 132 of the odd scan line short bar 130, and the ( n+3) scanning lines are electrically connected to the second sub-odd scanning line shorting bar 134 of the odd scanning line shorting bar 130, wherein, m, n=0, 4, 8, 12, . . . ; the (o The +2) scan line is electrically connected to the first sub-even scan line short bar 142 of the even scan line short bar 140, and the (p+4)th scan line is electrically connected to the odd scan line short bar 140. The second sub-odd scan line shorts the bar 144 , where m, n=0, 4, 8, 12, . . . . For example, the short-circuit bar 132 of the first sub-odd scan line is electrically connected to the 1st, 5th, 9th... scan lines, and the short-circuit bar 134 of the second sub-odd scan line is electrically connected to the 3rd, 7th, . . . 11 ... scan lines, and the short-circuit bar 142 of the first sub-even scan line is electrically connected to the 2nd, 6, 10 ... scan lines, and the short-circuit bar 144 of the second sub-odd scan line is electrically connected On the 4th, 8th, 12th... scan lines.

Fig. 4 shows the timing diagram (timing diagrams) that adopts the liquid crystal display that the present invention designs to carry out component test, and wherein B is the scanning period of scanning line, and the embodiment of the present invention is to scan in the conventional design with B=2A (A is line scan period) as an example. Of course, B=1.5A, B=2.5A is also applicable, that is, B=nA, n is a natural number greater than 1. In the liquid crystal display adopting the design of the short-circuit bar of the present invention, since all even-numbered scanning lines are divided into two groups and connected with two sub-even-numbered scanning line short-circuit bars respectively, and all odd-numbered scanning lines are also divided into two groups and respectively used two sub-odd-numbered scanning lines Line short-circuit bars are connected, so all adjacent two odd-numbered scan lines or even-numbered scan lines can be controlled using different timings (see Figure 4), so that two adjacent odd-numbered scan lines or even-numbered scan lines can be effectively detected Defects caused by short circuits between scan lines (for example, due to scratches or residual gold on the lines).

In addition, since all the data lines are divided into three groups according to the colors to be displayed, and are respectively connected to three data line short-circuit bars, the liquid crystal display designed by the present invention can pass the connection with the scanning lines when performing component testing. Synchronous signal, input different signals to the three data line short-circuit bars of the data line, and display R, G, B screens during component testing, so as to effectively detect defects caused by short-circuits of data lines of different colors.

A method for testing the aforementioned liquid crystal display assembly is described below:

Firstly, the scan signal is applied to the first sub-odd scan line shorting bar 132 (that is, the (m+1)th scan line 110 ), and the data signal is sent to the corresponding data line 120 synchronously. Then, after the (m+1) scan line 110 is scanned, the scan signal is applied to the second sub-odd scan line short bar 134 (that is, on the (n+3) scan line 110), and synchronized The data signal is sent out to the corresponding data line 120 . Since the (m+1) scan line 110 and the (n+3) scan line are both odd scan lines, the data signal sent to the (n+3) scan line is also the same as the (m+1) scan line. ) scan lines are the same.

After completing the scanning of the odd scanning lines, similarly, the scanning signals are respectively applied to the first sub-even scanning line short bar 142 (that is, the (o+2)th scanning line 110) and the second sub-even scanning line in sequence. The short-circuit bar 144 (that is, the (p+4)th scan line) and synchronously send out the data signals required by the even scan lines. Such a period B completes one scan of all the scan lines on the liquid crystal display component, so as to achieve the purpose of image display.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall prevail as defined by the appended claims.

Claims (9)

1. liquid crystal display assembly comprises:

The multi-strip scanning line is to be arranged on the substrate;

Many data lines are to be arranged on this substrate, and these data lines are to intersect with these sweep traces, and in order to form a plurality of pixel regions, respectively this pixel region has L sub-pixel, and wherein L is greater than zero positive integer;

At least one odd-numbered scan lines short-circuit rods, be to be arranged on this substrate, this odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12 ...;

At least one even-line interlace line short-circuit rods, be to be arranged on this substrate, this even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, be electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ..., and

Q data line short-circuit rods is to be formed on this substrate, and this q data line short-circuit rods respectively with the (q * r)+1, (q * r)+2, (q * r)+3..., (q * r)+q bar data line connects one to one, wherein, q=L, and r is zero or positive integer.

2. liquid crystal display assembly according to claim 1, wherein respectively this sweep trace has contact mat, in order to be connected to grid-driving integrated circuit.

3. liquid crystal display assembly according to claim 1, wherein respectively this data line has contact mat, in order to be connected to data-driven integrated circuit.

4. liquid crystal display assembly according to claim 1, wherein, this substrate comprises glass substrate, flexible base plate or light tight substrate.

5. thin film transistor base plate comprises:

The multi-strip scanning line is to be arranged on the substrate;

Many data lines are to be arranged on this substrate, and these data lines are to intersect with these sweep traces, and in order to form a plurality of pixel regions, respectively this pixel region has L sub-pixel, and wherein L is greater than zero positive integer;

At least one thin film transistor (TFT) is to be arranged at respectively in this sub-pixel, and this thin film transistor (TFT) is electrically connected at one of them of these adjacent sweep traces and one of them of adjacent these data lines;

At least one odd-numbered scan lines short-circuit rods, be to be arranged on this substrate, this odd-numbered scan lines short-circuit rods has the first sub-odd-numbered scan lines short-circuit rods, is electrically connected at (m+1) the bar sweep trace and the second sub-odd-numbered scan lines short-circuit rods, is electrically connected at (n+3) bar sweep trace, wherein, m, n=0,4,8,12 ...;

At least one even-line interlace line short-circuit rods, be to be arranged on this substrate, this even-line interlace line short-circuit rods has the first sub-even-line interlace line short-circuit rods, is electrically connected at (o+2) the bar sweep trace and the second sub-even-line interlace line short-circuit rods, be electrically connected at (p+4) bar sweep trace, wherein, o, p=0,4,8,12 ..., and

Q data line short-circuit rods is to be formed on this substrate, and this q data line short-circuit rods respectively with the (q * r)+1, (q * r)+2, (q * r)+3..., (q * r)+q bar data line connects one to one, wherein, q=L, and r is zero or positive integer.

6. thin film transistor base plate according to claim 5, wherein respectively this sweep trace has contact mat, in order to be connected to grid-driving integrated circuit.

7. thin film transistor base plate according to claim 5, wherein respectively this data line has contact mat, in order to be connected to data-driven integrated circuit.

8. thin film transistor base plate according to claim 5, wherein, this substrate comprises glass substrate, flexible base plate or light tight substrate.

9. method in order to the testing liquid crystal display assembly, this liquid crystal display assembly has multi-strip scanning line and data line, be electrically connected at the first sub-odd-numbered scan lines short-circuit rods of (m+1) bar sweep trace, be electrically connected at (n+3) bar sweep trace the second sub-odd-numbered scan lines short-circuit rods, be electrically connected at first sub-even-line interlace line short-circuit rods of (o+2) bar sweep trace and the second sub-even-line interlace line short-circuit rods that is electrically connected at (p+4) bar sweep trace, m, n=0,4,8,12, ..., and o, p=0,4,8,12, ..., this method comprises:

First sweep signal is put on the first sub-odd-numbered scan lines short-circuit rods, and send first data-signal synchronously in corresponding data line, second sweep signal is put on the second sub-odd-numbered scan lines short-circuit rods then, and send this first data-signal synchronously in corresponding data line; And

The 3rd sweep signal is put on the first sub-even-line interlace line short-circuit rods, and send second data-signal synchronously in corresponding data line, then the 4th sweep signal is put on the second sub-even-line interlace line short-circuit rods, and send this second data-signal synchronously in corresponding data line.

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