CN100370264C - A Method for Automatically Recognizing the Type of Circuit Board - Google Patents

Abstract

The present invention relates to a method for automatically identifying the type of a circuit board. The present invention mainly comprises: making all devices on a scanning chain of each circuit boards in a by-pass state; identifying circuit boards of distinct types according to the number of digit 0 shifting out of the scanning chain of each circuit board; making all the devices on the scanning chain of each circuit board in the state of capturing instructions; identifying the circuit boards of distinct types according to different instruction capturing initial values shifting out of each boundary scanning device from the scanning chain; or matching ID codes of the devices according to shifting-out data when a system is electrified to distinguish different circuit boards. The application of the method of the present invention can automatically identify the types of circuit boards in boundary scanning tests; therefore, the present invention solves the problem that the positions of circuit boards need to be arranged manually.

Description

A Method for Automatically Recognizing the Type of Circuit Board

technical field

The invention relates to boundary scan technology, especially a method for automatically identifying circuit board type in system level boundary scan test.

Background technique

In 1985, JETAG (Joint European Test Action Group), established by IBM, AT&T, Texas Instruments, Philips Electronics NV, Siemens, Alcatel and Ericsson, etc., proposed the boundary scan technology, which exists between the input and output pins of the device and the core circuit. The BSC (Boundary Scan Cell) in between tests the device and its peripheral circuits, thereby improving the controllability and observability of the device. In 1986, due to the joining of some companies from other regions, JETAG was renamed JTAG (Joint Test Action Group). In 1988, JTAG proposed a standard boundary-scan architecture called Boundary-Scan Architecture Standard Proposal, Version 2.0. The final goal is a complete set of standardized technologies applied to chips, printed boards and complete systems. In 1990, IEEE officially recognized the JTAG standard, which was named IEEE1149.1-90 after supplementation and revision. In the same year, BSDL (Boundary Scan Description Language) was proposed, which later became part of the IEEE1149.1-93 standard.

Boundary scan technology has been widely used since it was proposed, and now many chips support the boundary scan test function. Applications such as interconnect testing, device functional testing, and on-board programming using boundary-scan devices on circuit boards have become very common. And the application of boundary scan technology develops from board level to system level. That is, in the whole system, the various circuit boards are connected through the IEEE 1149.1 system bus, and applications such as interconnection testing, device function testing, and on-board programming can be performed on each circuit board at the system level, and inter-board interconnection testing can also be performed. , as shown in Figure 1, there is a microprocessor and an eTBC chip (that is, an embedded test bus controller chip) on the circuit board 1 (ie, the main control board), and an ASP chip is arranged on each circuit board (Addressable scan port), eTBC is connected to ASP through the primary scan channel, and ASP is connected to the boundary scan chain on the circuit board through the secondary scan channel. The eTBC mainly acts as a bus controller, and the ASP mainly acts as an address matching function. The position information of all circuit boards can be obtained through the ASP. The test system runs in the computer, communicates with the microprocessor through the network port, and the microprocessor communicates with eTBC. The boundary scan chain on the circuit board connects the boundary scan devices on the board into a chain, as shown in Figure 2.

The basic structure of each boundary scan device on the circuit board is shown in Figure 3.

Boundary scan devices have the following basic characteristics:

Feature 1. All "1" instructions must be bypass instructions (BYPASS). When the bypass instruction is input, the data transmission path of the bypass register will be selected from TDI (test data input) to TDO (test data output), and At this time, the bypass register will be loaded with a single digit "0".

Feature 2. By controlling the sixteen state machine of the internal controller of the boundary scan device, when the boundary scan device enters the capture instruction (Capture-IR) state, a specific instruction capture initial value (INSTRUCTION_CAPTURE) will be loaded in the instruction register, This value can be obtained from the device's BSDL (Boundary Scan Description Language) file. As shown in Figure 4, entering the capture instruction state can be achieved by controlling TMS and TCK to go through the state machine, that is, the Capture-DR state in the figure.

Different boundary scanners generally have different capture initial values loaded into their instruction registers, as shown in the following table:

device name Capture signal IDCODE code i386_EX_Processor 0001 00101000001001110000000000010011 LC4128V_XXT100 00011X01 XXXX0001100000010001000001000011 epm7128st100 0101010101 00000111000100101000000011011101 epm7256aet144 0101010101 00010111001001010110000011011101

Among them, X is any number in 0 or 1, the length of the capture signal may be different, the same length may be different, or the length and number may be the same, but the IDCODE of different devices must be different, and they are all 32-bit length.

Feature 3. After the boundary scan device is powered on, the device code (IDCODE) instruction is automatically loaded, and if there is no device code instruction, the bypass (BYPASS) instruction is automatically loaded.

Feature 4. When the device code command (IDCODE) is loaded, the data transmission path of the ID register will be selected from TDI (test data input) to TDO (test data output), and the ID register stores the ID code of the device. The ID code of the device is fixed at 32 bits, including manufacturer information, device model information and device version number, and the ID code of a type of device is unique.

A system contains many kinds of circuit boards, and there are many pieces of one circuit board. There is generally no fixed slot in which all of these boards fit in the system. It is known what kind of circuit boards this system contains, but it is not known exactly which boards are in what position. Before testing, it is necessary to know where the board is plugged in. Nowadays, the method of manually filling in the form is generally used. By manually filling in a configuration form, the test system will know what kind of circuit board is at that position, and then the test system will call out the circuit file of the circuit board. A circuit board is tested.

This method of manually configuring the position of the circuit board is very cumbersome, and when the position of the circuit board changes, the configuration table needs to be updated synchronously. The invention utilizes the characteristics of the boundary scanning device to automatically identify the type of the circuit board, and solves the problem of manually configuring the position of the circuit board.

Technical scheme of prior art:

Now it is mainly a manual configuration method. The product developer is familiar with each circuit board. He will fill in a configuration table according to the actual placement of the circuit board, indicating which address is inserted and which type of circuit board.

The test system tests each circuit board according to the information provided by the configuration table.

The shortcoming of prior art one:

1. Manual configuration is inefficient and error-prone.

2. Personnel need to be familiar with the product and each circuit board.

3. If the position of the circuit board is changed, the configuration table needs to be changed in time, otherwise the test will be wrong.

Contents of the invention

The invention provides a method for automatically identifying the type of the circuit board, which solves the problem in the prior art that the position of the circuit board needs to be manually configured.

The method of the present invention comprises the following steps:

(1) Gate each circuit board in the system under test respectively, obtain the composition information of its scan chain, remove all the data in the data link, and save;

(2) Make all devices on the scanning chain of each circuit board enter the bypass state;

(3) Record the number of numbers "0" removed from the scan chain on each circuit board;

(4) Determine whether there are two or more circuit boards with the same number of scan chain output "0", if not, mark all the tested circuit boards as different types of circuit boards, and record their corresponding The insertion position; if there are two or more circuit boards with the same number of scan chain output "0", perform the following steps;

(5) Mark the circuit boards with different numbers of output "0" as different types of circuit boards, and record their corresponding insertion positions; for the circuit boards with the same number of output "0", proceed to the next step identification;

(6) Make all devices on the scan chain of the circuit board enter the capture command state, and move out the command capture initial value of each boundary scan device from the scan chain;

(7) Judging whether the above-mentioned initial values are the same, if different, then mark these circuit boards as circuit boards of different types, and record their corresponding insertion positions; if they are the same, continue the following steps;

(8) Match the data removed from these circuit boards in step (1) with the ID codes of each boundary scan device, if the matching results of each data are not the same, then mark these circuit boards as circuit boards of different types, And record its corresponding insertion position; if they are exactly the same, mark it as the same type of circuit board, and record its corresponding insertion position.

In the above method, if there are multiple scan chains on the circuit board, they can be concatenated into one scan chain for identification.

The above step (2) includes: obtaining the maximum instruction chain length L according to the composition information of the scanning chains of each circuit board, selecting each circuit board in turn, and scanning the L "1"s into the instruction register link.

In the above step (1), all the data in the data chain are shifted out, and the number of shifts is N*32, where N is the maximum number of devices in the scan chain of the system under test.

The above sequence of making the scanner enter the bypass state and enter the command capture state can be reversed without affecting the identification of the circuit board type.

The beneficial effects brought by the technical solution of the present invention:

1. According to the method of the present invention, the types of various circuit boards in the system can be automatically identified without manual intervention.

2. When the position of the circuit board is changed, the method can also adapt automatically.

3. The implementation is simple and convenient, saves operation time and ensures the accuracy of the test.

Description of drawings

Figure 1 is a system-level boundary-scan test structure diagram;

FIG. 2 is a schematic structural diagram of a boundary scan chain on a circuit board;

FIG. 3 is a basic structural diagram of a boundary scan device;

4 is a schematic diagram of sixteen state machines of the internal controller of the boundary scan device;

Fig. 5 is a flowchart of the method of the present invention.

Icon description:

TAP: Test Access Port, test access channel;

TCK: Test Clock input, test clock input;

TMS: Test Mode Select input, test mode input;

TDI: Test Data Input, test data input;

TDO: Test Data Output, test data output;

TRST: Test Reset, test reset;

eTBC: Embedded Test Bus Controller, embedded test bus controller;

ASP: Addressable Scan Port, addressable scan port;

PTCK: Primary Test ClocK input, primary test clock input;

PTMS: Primary Test Mode Select input, primary test mode input;

PTDI: Primary Test Data Input, primary test data input;

PTDO: Primary Test Data Output, primary test data output;

PTRST: Primary Test Reset, primary test reset;

PTCK: Secondary Test ClocK input, secondary test clock input;

PTMS: Secondary Test Mode Select input, secondary test mode input;

PTDI: Secondary Test Data Input, secondary test data input;

PTDO: Secondary Test Data Output, secondary test data output;

PTRST: Secondary Test Reset, secondary test reset;

IR: Instruction Rigister, instruction register;

DR: Data Register, data register.

Detailed ways

The basis of the present invention is that the composition of the scan chains on each circuit board is generally different, if the composition of the scan chains on two circuit boards is not the same, then these two circuit boards are regarded as different types of circuit boards . If the number of devices is the same, the types of devices in corresponding positions are also the same, and the order of arrangement is the same, then it is the same type of circuit board.

Implementation method and steps of the present invention are as follows:

Step 1. Strobe each circuit board, obtain the composition information of its scan chain, remove all data in the data link, and save it. Through this step, it is possible to know how many types of circuit boards the system has, and which boundary scan devices are connected to the boundary scan chain of each type of circuit board. This information is the basis for automatic board identification.

Step 2. If there are multiple scan chains on one circuit board, multiple scan chains can be concatenated into one scan chain for processing.

Step 3. Obtain the maximum command chain length of the system under test according to the BSDL files provided by the component manufacturers of each circuit board, assuming that the length is L. Then each circuit board is selected in turn, and L "1"s are scanned into the instruction register link. In this way, regardless of which scan chain, the inserted test instructions are all "1", that is, bypass instructions. After step 3 is completed, all devices on the scan chain in each circuit board enter the bypass state.

Step 4. According to the connection status of the boundary scan chains of various circuit boards, obtain the maximum number of devices in each scan chain, assuming that the number is N, and then select each circuit board in turn, and scan and input N "1"s each scan chain. According to characteristic 1, according to the number of "0" output from the TDO pin, the number of devices on the scan chain can be judged. There are several "0"s and there are several boundary scan devices. If the number of devices contained in the boundary scan chain on each type of circuit board is different, then based on this information, it can be determined which type of circuit board each position belongs to. If there are different circuit boards with the same number of devices contained in the boundary scan chains on the boards, you need to continue to perform the following identification process.

Step 5, select each circuit board in turn, and enter the command capture state, so that a specific command capture initial value is preset in the command register of each boundary scan device. Each scan chain executes L (maximum instruction chain length) instruction shifts, analyzes the output L-bit signal, and matches the expected capture signal of the boundary scan chain on various types of circuit boards according to feature 2. If they can be matched (that is, each corresponding digit is the same), the type of the circuit board can be identified. In general, the initial value of instruction capture of each boundary scan device is different, so that it is easy to identify the type of circuit board. If there are two types of circuit boards, and their instruction capture initial values are also consistent, the following process can also be used to continue identification.

Step 6. According to feature 3, all the data in the data link can be removed when the circuit board is powered on. The number of data shifts is N*32, where N is the maximum number of devices in each scan chain. Analyze the data removed from the TDO after power-on, and if it can match the ID code of the corresponding device, you can determine what type of circuit board the circuit board belongs to.

Through the above steps, if all the identification information is the same, it can be considered as the same type of circuit board.

The order of the above steps can be adjusted without affecting the recognition result.

Claims (8)

1. the method for an automatic identification circuit board type comprises the following steps:

(1) each circuit board in the tested system of gating respectively obtains the composition information of its scan chain, the data in the data link all is shifted out, and preserves;

(2) make that all devices enter bypass condition on each circuit board scan chain;

(3) write down the number that shifts out digital " 0 " on each circuit board from scan chain;

(4) it is identical to judge whether to have the number of scan chain output " 0 " of two or more circuit boards, if there is no, then all circuit-under-test plates is labeled as dissimilar circuit boards, and writes down its corresponding plant position; If it is identical to have the number of scan chain output " 0 " of two or more circuit boards, then carry out the following step;

(5) the mutually different circuit board of number that will export " 0 " is labeled as dissimilar circuit boards, and writes down its corresponding plant position; To export the identical circuit board of number of " 0 ", carry out next step identification;

(6) all devices are entered and catch command status, shift out the instruction of each boundary scanning device from scan chain and catch initial value;

(7) judge whether above-mentioned each initial value is identical,, then those circuit boards are labeled as dissimilar circuit boards, and write down its corresponding plant position if different; If identical, then continue the following step;

(8) data that those circuit boards in the step (1) are shifted out and the ID code of each boundary scanning device mate, if the matching result of each data is inequality, then those circuit boards are labeled as dissimilar circuit boards, and write down its corresponding plant position; If identical, then be labeled as the circuit board of same type, and write down its corresponding plant position.

2. the method for a kind of automatic identification circuit board type as claimed in claim 1 is characterized in that: have the multi-strip scanning chain on the ifs circuit plate, they can be concatenated into a scan chain and discern.

3. the method for a kind of automatic identification circuit board type as claimed in claim 1, it is characterized in that: described step (2) comprising: according to the composition information of each circuit board scan chain, obtain maximum command chain length L, each circuit board of gating scans the input instruction chain of registers with L " 1 " successively.

4. the method for a kind of automatic identification circuit board type as claimed in claim 1, it is characterized in that: in the described step (1), data in the data chainning all are shifted out, and its shift count is N*32, and wherein N is a device number maximum in the tested system scan chain.

5. the method for an automatic identification circuit board type comprises the following steps:

(1) each circuit board in the tested system of gating respectively obtains the composition information of its scan chain, the data in the data link all is shifted out, and preserves;

(2) all devices are entered and catch command status, shift out the instruction of each boundary scanning device from scan chain and catch initial value;

(3) judge whether above-mentioned each initial value is identical,, then all circuit-under-test plates are labeled as dissimilar circuit boards, and write down its corresponding plant position if different; If identical, then continue the following step;

(4) make that all devices enter bypass condition on each circuit board scan chain;

(5) write down the number that shifts out digital " 0 " on each circuit board from scan chain;

(6) it is identical to judge whether to have the number of scan chain output " 0 " of two or more circuit boards, if there is no, then those circuit boards is labeled as dissimilar circuit boards, and writes down its corresponding plant position; If it is identical to have the number of scan chain output " 0 " of two or more circuit boards, then carry out the following step;

(7) the mutually different circuit board of number that will export " 0 " is labeled as dissimilar circuit boards, and writes down its corresponding plant position; To export the identical circuit board of number of " 0 ", carry out next step identification;

(8) data that those circuit boards in the step (1) are shifted out and the ID code of each boundary scanning device mate, if the matching result of each data is inequality, then those circuit boards are labeled as dissimilar circuit boards, and write down its corresponding plant position; If identical, then be labeled as the circuit board of same type, and write down its corresponding plant position.

6. the method for a kind of automatic identification circuit board type as claimed in claim 5 is characterized in that: have the multi-strip scanning chain on the ifs circuit plate, they can be concatenated into a scan chain and discern.

7. the method for a kind of automatic identification circuit board type as claimed in claim 5, it is characterized in that: described step (4) comprising: according to the composition information of each circuit board scan chain, obtain maximum command chain length L, each circuit board of gating scans the input instruction chain of registers with L " 1 " successively.

8. the method for a kind of automatic identification circuit board type as claimed in claim 5, it is characterized in that: in the described step (1), data in the data chainning all are shifted out, and its shift count is N*32, and wherein N is a device number maximum in the tested system scan chain.

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