CH659151A5 - FIXED BODY SWITCH WITH A SEMICONDUCTOR BODY AND CIRCUIT ARRANGEMENT WITH AT LEAST TWO FIXED BODY SWITCHES. - Google Patents

Description

The invention relates to a solid-state switch according to the preamble of claim 1 and a circuit arrangement according to the preamble of claim 11.

In the paper by Douglas E. Houston and co-workers entitled "A Field Terminated Diode", published in IEEE Transactions on Electron Devices, Vol. ED-23, No. 8, August 1976, a discrete solid-state switch for high voltages with a vertical Structure described in which a zone is provided, which is pinched off to achieve the “OFF” state and made highly conductive by injection of charge carrier pairs to achieve the “ON” state. However, this switch has the difficulty that it is difficult to use integrated circuit technology, i.e. can be produced together with other similar solid-state switches on a common substrate. Another problem arises from the fact that the distance between the gates and the cathode should be small in order to keep the size of the gate control voltage small; this measure limits the usable voltage range because it reduces the grid / cathode breakdown voltage. This limitation also limits the usability of two such components in anti-parallel connection, that is, the connection of the cathode of each component to the anode of the other, to relatively low voltages. A

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such a double switch arrangement could be used as a bidirectional solid-state switch for high voltages. An additional problem arises from the fact that the base zone should ideally be highly doped in order to avoid a breakdown from the anode to the gate. Solid-state switches of this type are described, for example, in US Pat. Nos. 3,722,079, 3,657,616 and 3,911,463. There is also a lecture in the INTERNATIONAL SWITCHING SYMPOSIUM, October 25, 1976, Kyoto, Japan, on "DEVELOPMENT OF INTE-GRATED SEMICONDUCTORS CROSSPOINT SWITCHES AND A FULLY ELECTRONIC SWITCHING SYSTEM" and in the IEEE INTERNATIONAL SOLID STATE CIRCUITS CONF., February 17 1978, a lecture on "A MOS-CONTROLLED TRIAC DEVICE" was published. In such known solid-state switches with high doping of the base zone, however, this leads to a low dielectric strength between anode and cathode. The breakthrough effect can be limited by widening the base zone, but this also increases the resistance of the switch when it is in the "ON" state.

The object of the invention is therefore to provide a solid-state switch which can be easily integrated in such a way that two or more switches can be produced simultaneously on one substrate, each switch being able to block relatively high voltages in both directions .

The solid-state switch according to the invention is characterized by the features stated in the characterizing part of patent claim 1.

The switch arrangement according to the invention is characterized by the features stated in the characterizing part of patent claim 11.

The structure is selected so that pairs of charge carriers are injected during operation.

Such a semiconductor structure works with a suitable design as a switch, which is characterized by a low-resistance current path between the anode and cathode in the ON (conductive) state and by a high-resistance current path between the anode and cathode in the OFF (blocking) state.

The potential supplied to the gate zone determines the state of the switch. Since charge carrier pairs are injected during the ON state, there is a relatively low resistance between the anode and the cathode. With the help of such a structure, which is to be referred to as a gated diode switch (GDS), with a suitable design in the blocking OFF state, a relatively large voltage difference between the anode and cathode zones, which is independent of the polarity, and in the conductive ON- Condition was to apply a relatively large amount of current with a relatively low voltage drop between anode and cathode. Such keyed diode switches (GDSs) can be manufactured in groups together with other high voltage solid state switches on a single integrated circuit chip. The blocking characteristic existing in both directions allows the use of two diode switches as bidirectional switches, the cathode of one switch being connected to the anode of the other switch and the gate electrodes of both switches being connected to one another.

Further details and advantages of the invention will become apparent from the following exemplary description of the drawings.

Show it:

1 shows a section through a solid-state switch according to a first embodiment of the invention.

FIG. 2 shows an electrical switching system for the solid-state switch according to FIG. 1;

3 shows an electrical circuit diagram of a bidirectional switch according to a further embodiment of the invention;

4 shows a section through a solid-state switch according to a further embodiment of the invention;

5 shows a section through a solid-state switch according to a further embodiment of the invention;

6 shows a section through a solid-state switch according to a further embodiment of the invention;

7 shows a section through a solid-state switch according to a further embodiment of the invention; and

8 is a plan view of the solid-state switch according to FIG. 7.

1 shows a section through a device 10 which comprises an N-conducting semiconductor carrier 12 with a top side 11 and a monocrystalline semiconductor body 16, the main body of the semiconductor body being P-conducting and separated from the semiconductor carrier by the dielectric layer 14 is.

A delimited P + -conducting anode zone 18 is located within the semiconductor body 16 and extends with a partial area up to the upper side 11. A delimited, N + -conducting gate zone 20 is also located within the semiconductor body 16 and extends with a partial area up to the upper side 11. Furthermore, a delimited, N + -conducting cathode zone 24 is located within the semiconductor body 16 and extends with a partial area up to the upper side 11. A P + -conducting zone, which partially extends up to the upper side 11. 22 surrounds zone 24 and acts as a shield against a breakthrough of the depletion layer. The effect of this zone also prevents inversion of partial areas of the semiconductor body 16 on or near the top 11 between the zones 20 and 24. The gate zone 20 is located between the anode zone 18 and zone 22 and is separated from both by the base body of the semiconductor body 16. The specific resistance of the zone 22 lies between the value for the cathode zone 24 and that for the base body of the semiconductor body.

The electrodes 28, 30 and 32 represent conductors for low-resistance contact with the surface regions of the zones 18, 20 and 24. A dielectric layer 26 covers the top 11 in such a way that the electrodes 28, 30 and 32 are insulated from all regions, whereby however, those areas with which an electrical contact is provided are excluded. By means of a highly doped zone 34, which has the same conductivity type as the semiconductor carrier 12, an electrode 36 makes a low-resistance contact with the semiconductor carrier 12.

The semiconductor carrier 12 and the semiconductor body 16 advantageously consist of silicon, wherein the semiconductor carrier 12 can be either N-type or P-type. Each of the electrodes 28, 30 and 32 expediently overlaps the associated semiconductor zone with which it is in low-resistance contact. This overlap, known as field plating, facilitates operation at high voltages because it increases the voltage value for the occurrence of a breakdown. The dielectric layer 14 is made of silicon dioxide, while the electrodes 28, 30, 32 and 36 are all made of aluminum. Compared to the specified conductivities, the complementary conductivities can also be used.

A plurality of separate base bodies 16 can be formed in a common semiconductor carrier 12 in order to provide a plurality of switches. The planar technology can be used in a meaningful way to produce numerous components as an integrated circuit on a common surface.

The device 10 typically operates as a switch, which is characterized by a low impedance current path between the anode zone and cathode zone 24 in the ON (conductive) state and by a high impedance current path between the two zones in the OFF (blocking) state.

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The potential supplied to the gate zone 20 determines the state of the switch. A conductive connection exists between anode zone 18 and cathode zone 24 when the potential of the gate zone 20 is lower than the potential of the anode zone 18 and the cathode zone 24. During the ON state, defect electrons are injected from the anode zone 18 into the semiconductor body 16 and electrons from the cathode zone 24 into the semiconductor body 16. These defect electrons and electrons can be introduced in sufficient numbers to form a plasma, the conductivity of which modulates the semiconductor body 16. This process lowers the resistance of the semiconductor body 16 in such a manner that the resistance between the anode zone 18 and the cathode zone 24 becomes small when the device 10 is operating in the ON state. This mode of operation is referred to as injection of pairs of carriers. The type of device described here is referred to as a gated diode switch.

Zone 22 helps limit the breakthrough of a depletion layer that is formed between gate zone 20 and cathode zone 24 during operation and helps prevent an inversion layer from forming on the surface between these two zones. This allows a smaller distance between gate zone 20 and cathode zone 24, which leads to a relatively low resistance between anode zone 18 and cathode zone 22 during the ON state.

The substrate 12 is typically maintained at the highest possible positive voltage level. The line between anode zone 18 and cathode zone 14 is prevented or is interrupted if the potential at the gate zone 20 has a sufficiently more positive value than the potential at the anode zone 18 and cathode zone 24. The additional amount of positive potential required to prevent or interrupt the line depends on the geometry and the levels of the impurity concentration (doping) of the device 10. This positive gate potential causes the part of the semiconductor body 14 located between the gate zone 20 and the dielectric layer 14 to become depleted of current-carrying charge carriers, so that the potential of this part of the semiconductor body 16 is more positive than that of the anode zone 18 and the cathode zone 24. This positive potential barrier prevents the conduction of defect electrons from the anode zone 14 to the cathode zone 24. This essentially constricts the semiconductor body 16 against the dielectric layer 14 in the part of the base body located between the gate zone 20 and the dielectric layer 14. In addition, a collection of the electrons emitted by the cathode zone 24 is achieved before they can reach the anode zone 18.

During the ON state of the device 10, the diode junction consisting of the semiconductor body 16 and the zone 20 is biased in the direction of flow. Current limiting means (not shown) are preferably included in order to limit the conduction through the diode biased in the direction of flow.

An electrical symbol proposed for this switch is shown in FIG. 2. The anode, gate and cathode electrodes of the keyed diode switch (GDS) are labeled with the connections 28, 30 and 32.

An embodiment of the device 10 was designed in the following manner. The semiconductor carrier 12 consists of an N-type silicon substrate 0.457 to 0.559 mm thick, with an impurity concentration of approximately 2 × 1013 foreign atoms per cm 3 and has a specific resistance of greater than 100 ohm-cm. The dielectric layer 14 is formed from a 2 to 4 micron dense silicon dioxide layer 14. The semiconductor body 16 typically has a thickness of 30 to 50 microns, is approximately 430 microns long, 300 microns wide and has a P-line with an impurity concentration in the range from 5 to 9 × 1013 foreign atoms per cm 3. The anode zone 18 is P + -conducting, typically 2 to 4 microns thick, 44 microns wide, 52 microns long and has an impurity concentration of about 1019 foreign atoms per cm 3. Electrode 28 is typically made of aluminum 1.5 microns thick, 84 microns wide and 105 microns long. Zone 20 is N + -conducting, typically 2 to 4 microns thick, 15 microns wide, 300 microns long and has an impurity concentration of approximately 1019 foreign atoms per cm 3. The electrode 30 is made of aluminum and is 1.5 microns thick, 50 microns wide and 210 microns long. The distance between the adjacent edges of electrodes 28 and 30 and between the adjacent edges of electrodes 30 and 32 is typically 40 microns in both cases. Zone 22 is P-type, typically 3 to 6 microns thick, 64 microns wide, 60 microns long and has an impurity concentration of approximately IO17 to 1018 foreign atoms per cm3. The cathode zone 24 is N + -conducting, and typically 2 microns thick, 48 microns wide, 44 microns long and has an impurity concentration of approximately 1019 foreign atoms per cm 3. The electrode 32 is made of aluminum and is 1.5 microns thick, 104 microns wide and 104 microns long. The distance between the boundaries of zones 18 and 22 and the corresponding boundaries of zone 16 is typically 55 microns. Zone 34 is N + conductive, typically 2 microns thick, 26 microns wide, 26 microns long, and has an impurity concentration of 1019 foreign atoms per cm3. The electrode 36 is made of aluminum 1.5 microns thick, 26 microns wide and 26 microns long.

The device 10 equipped with the above-mentioned parameters worked as a keyed diode switch (GDS) with a voltage of 500 V between the anode and cathode. In order to provide a sodium barrier, a layer of silicon nitride was deposited on top of the silicon dioxide layer 26 by chemical vapor deposition. The electrodes 28, 30, 32 and 36 were then formed, and then a silicon nitride coating (not shown) deposited in the HF plasma (not shown) was applied to the entire top of the device 10, with the exception of the regions for making electrical contact. The layers of silicon nitride help prevent high voltage arcing between the neighboring electrodes through the air.

Typically there is + 250 volts on the anode, -250 volts on the cathode and 12 +280 volts on the substrate. Similarly, -250 volts can be connected to the anode and + 250 volts to the cathode. In this way, the device 10 seals off the voltage between the anode and cathode on both sides. A potential of + 280 volts applied to the gate connection 30 interrupted the 350 mA current flow between the anode zone 15 and the cathode zone 24. With a current flow of 100 mA between the anode and cathode, the ON resistance of the GDS is approximately 15 ohms, with the voltage drop is typically 2.2 volts between the anode and cathode.

3 shows a bidirectional switch arrangement according to the invention with two GDS (GDS and GDSa), in which the electrode 28 (the anode electrode of GDS) is electrically connected to the electrode 32a (the cathode electrode of GDSa) and the electrode 32 (the cathode electrode of GDS) is electrically connected to the electrode 28a (the anode electrode of GDSa). This switch arrangement is capable of routing signals from electrodes 28 and 32a to electrodes 28a and 32 or vice versa. The double-sided blocking characteristic of the device 10 facilitates this switch arrangement acting in both directions. Two separate semiconductor bodies 16 can be formed on a common semiconductor carrier 12

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and the appropriate electrical connections are made to establish the bi-directional switch described above. A large number of separate semiconductor bodies 16 can also be formed on a common semiconductor carrier 12 for producing switch groups.

A device 410 very similar to device 10 is shown in FIG. 4, wherein all components which are essentially identical or very similar to device 10 are identified by the same reference number, preceded by a “4”. The fundamental difference between the devices 410 and 10 is the elimination of the semiconductor zone 22 shown in FIG. 1 in the device 410. A suitable increase in the distance between the zones 424 and 420 provides adequate protection against a breakthrough of the depletion layer to the zone 424 , allowing device 410 to be used as a high voltage switch.

A device 510 very similar to device 10 is shown in FIG. 5, wherein all components which are essentially the same or very similar to device 10 are identified by the same reference number, preceded by a “5”. The main difference between devices 510 and 10 is the use of an annular protection zone 540 made of semiconductor material, which encloses the cathode zone 524. Dashed lines indicate that the protective ring 540 can be extended so far that it touches the cathode zone 524. The connection of zone 522 and protective ring 540 provides both a protective effect against an inversion of partial regions of zone 516 at or near surface 511, in particular in the region between gate zone 520 and cathode zone 524, and also a protective effect against breakthrough of the depletion layer to cathode zone 524. Guard ring 540 is of the same conduction type as zone 522 but has a lower resistivity. This type of protective structure which surrounds the cathode zone 524 twice represents the preferred protective structure.

The above-described embodiments are intended to exemplify the general principles of the invention. Numerous modifications are possible without departing from the inventive concept. For example, in the described embodiments, the semiconductor carriers 12, 412 and 512 can alternatively consist of P-conductive silicon, gallium arsenide, sapphire, a conductive or an electrically inactive material. If the zones 12, 412 and 512 are made of an electrically inactive material, then the dielectric layers 14, 414 and 514 can be omitted. Furthermore, the semiconductor bodies 16, 416 and 516 can be produced as air-insulated structures. The semiconductor carriers 12, 412 and 512 and the dielectric layers 14, 414 and 514 can thus be omitted. The electrodes can be made of doped polysilicon, gold, titanium or another type of conductor. Furthermore, the size of the impurity concentration, the distances between the different zones and further dimensions of the zones can be set up so that they are designed for noticeably different voltages and currents than those described. Other dielectric materials, such as silicon nitride, can be used in place of silicon dioxide. The conduction type of all zones within the dielectric layer can be reversed in a generally known manner with a suitable change in the polarity of the voltages. In addition, it can be seen that the device according to the invention can be operated with alternating current and direct current.

FIG. 6 shows a further embodiment with reference numbers according to FIG. 1 from the 600 numbers, in which the semiconductor body 616 is insulated from the dielectric layer 614 by an intermediate semiconductor layer 633, which has an opposite conductivity type to the semiconductor body 616. The electrodes 628, 630 and 632 represent conductors for low-resistance contacting with the surface regions of the zones 618, 620 and 624. A dielectric layer covers the upper side 611 in such a way that the electrodes 628, 630 and 632 from all zones except those with which they are to be in electrical contact, are insulated. The electrode 630 makes the electrical contact with the zone 638 on the top 611 in front of or behind the semiconductor body 616 (not shown).

The layer 638 can be modified such that it only exists on the lower partial area of the semiconductor body 16, as is marked with zone 638a. With such a modification, a suitably diffused or ion-implanted zone (s) (not shown) is formed between the top 611 and the modified layer 638a. In this case, the electrode 630 would have to be extended in order to make electrical contact with this zone at the top 611.

Layer 638 helps to isolate semiconductor body 616 from the special properties of dielectric layer 614, and thus supports the manufacturing process in such a way that the tolerances for the formation of dielectric layer 14 can be somewhat alleviated. This increases the production yield and lowers the costs. In addition, layer 638 serves as a deeper gate zone, which helps lower the level of the gate potential needed to prevent or disconnect the line between anode zone 618 and cathode zone 624. The sole use of the partial region 638a of the layer 638 serves to isolate the semiconductor body 616 from the zone 614 in the part of the semiconductor body 616 which is located under the zone 620. This particular part of the semiconductor body 616 is the most critical part since the semiconductor body 616 in this part is essentially "pinched off" when the device 610 is in the OFF state.

Layer 638a does not provide complete isolation from the dielectric layer, but it does lower the gate potential required to turn it off, while essentially leaving the breakdown voltage of the structure unaffected. Although layer 638 achieves complete insulation from dielectric layer 614, it also slightly reduces the breakdown voltage of the structure. When using layer 638, the thickness of body 616 is generally increased in order to keep the breakdown voltage at predetermined values.

Layer 638 need not necessarily be directly connected to electrode 630. Since there is positive charge in layer 626, a surface inversion layer forms near top 611 of body 616 between layer 638 and gate zone 620, which is able to connect the two together. But even without this positive charge, it can be assumed that the electrode 630 and the layer 638 are electrically connected to one another by the “breakdown” effect.

7 and 8 show a further embodiment in which the gate zone 720 is not between the anode zone 718 and the cathode zone 724. The device 710 is designed such that the anode zone 718 and the cathode zone 724 have only a relatively small mutual distance in order to reduce the resistance between these two zones in the ON (conducting) state. An optionally provided conductor 738 is located on the top of the layer 726 between the electrodes 728 and 732. The conductor 738 is electrically connected to the electrode 730 and helps to reduce the level of the gate voltage required in the operation of the device 710, but this does not affect operation is absolutely necessary.

An embodiment of the device 710 has been shown in FIG

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manufactured in the following way. The semiconductor wafer (substrate) 712 consists of an N-type silicon substrate, 457 to 559 microns thick, with an impurity concentration of approximately 5 × 1013 foreign atoms per cm 3 and a specific resistance of the material of 100 ohm-cm. Dielectric layer 714 is typically 2 to 4 microns thick. The semiconductor body 716 is typically 30 to 40 microns thick, approximately 430 microns long, 170 microns wide and has a P-line with an impurity concentration of approximately 5 to 9 × 1013 foreign atoms per cm 3. The anode zone 718 is P + conductive, typically 2 to 4 microns thick, 28 microns wide, 55 microns long, and has an impurity concentration of approximately 1019 foreign atoms per cm3. The electrode 728 is made of aluminum 1.5 microns thick, 55 microns wide and 95 microns long. Gate zone 720 is N + conductive, typically 2 to 4 microns thick, 38 microns wide, 55 microns long, and has an impurity concentration of approximately 1019 foreign atoms per cm3. The 730 electrode is made of aluminum 1.5 microns thick, 76 microns wide and 95 microns long. The distance between the adjacent edges of electrodes 728 and 732 is typically 40 microns (without lead 738), as is the distance between the adjacent edges of electrodes 728 and 730 is typically 40 microns. Zone 722 is P-type, typically 3.5 microns thick, 44 microns wide, 44 microns long, and has an impurity concentration of approximately 1018 impurities per cm 3 on the surface. The cathode zone 724 is N + -leading, typically 2 microns thick, 30 microns wide, 30 microns long and has an impurity concentration of approximately 1019 foreign atoms per cm 3. The electrode 32 is made of aluminum, is 1.5 microns thick, 82 microns wide and 82 microns long. The distance between the end portions of electrodes 728 and 732 and the corresponding end portions of P-type body 716 is 50 microns. The aluminum lead zone 738 is 30 microns from electrodes 728 and 732 and is 10 microns wide, 1.5 microns thick, and 75 microns long. Conduction zone 738 makes electrical contact with electrode 730 in front of or behind body 716. It can be seen that this design noticeably reduces the distance between the cathode and the anode.

With the sizes listed above, the device 710 operated as a keyed diode switch with a voltage s of 400 volts between anode and cathode. The anode was supplied with +200 volts and the cathode with -200 volts. As mentioned, the anode can also be supplied with 200 volts and the cathode with + 200 volts in order to obtain a blocking effect for both voltage devices. In the presence of the OK line zone 738, a potential of +210 volts proved to be sufficient to interrupt a current flow of 1 mA between the anode and the cathode. It can be estimated that in the absence of connection 738 this amount of voltage must be 20 volts higher. The ON resistance of the keyed diode switch was approximately 10 to 12 ohms with a current flow of 100 mA between the anode and cathode, a voltage drop of typically 2.2 volts occurring between the anode and cathode. A layer of silicon nitride (not shown) was deposited by chemical vapor deposition on top 20 of silicon dioxide layer 726 to act as a sodium barrier. Thereafter, electrodes 728, 730, 732 and 736 were formed and a silicon nitride coating (not shown) deposited in the HF plasma (not shown) was applied to the entire top of device 710, which helped to cause a high voltage flashover between adjacent electrodes to prevent the air.

5, a protective ring surrounding or enclosing the cathode zone 724 and in contact therewith can be provided; on the other hand, according to FIG. 4, the zone 722 can also be omitted if the distance between the anode and cathode is sufficiently large. The gate zone 20 can either be arranged to the right of the cathode zone 724, as indicated by the dashed lines in FIG. 7, or in front of or behind the semiconductor body 716, as indicated by the dashed lines in FIG. 2. Furthermore, the gate zone 720 can be arranged separately from the dielectric layer 714 or, as indicated by the dashed lines in FIG. 7, can be extended to such an extent that it is in contact with the dielectric layer 714. In addition to the changes mentioned, 40 other modifications can be made.

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Claims (20)

659 151 1. Solid-state switch with a semiconductor body, the base body (16; 416; 516; 616; 716) of which has a first conductivity type, a first zone (18; 418; 518; 618; 718) of the first conductivity type, a second zone (24; 424 ; 524; 624; 724) of a second line type opposite to the first line type, a gate zone (20; 420; 520; 620; 720) of the second line type, the first and second zone as well as the gate zone being formed by parts of the base body (16; 416 ; 516; 616; 716) are separated from each other, the resistivity of the first and second zones and the gate zone is lower than the resistivity of the base body, the parameters of the solid-state switch are selected so that when a first voltage is applied to the gate zone (20 ; 420; 520; 620; 720) a depletion area is formed in the base body, which essentially prevents current flow between the first and the second zone, and that when a second voltage is applied to the gate zone and bes tied voltages to the first and second zones forms a low-resistance current path between the first and second zones due to an injection of carrier pairs, characterized in that a surface of the first and second zones and the gate zone form part of an upper side (11; 411; 511; 611; 711) of the semiconductor body. 2. Solid-state switch according to claim 1, characterized in that the gate zone (20) is arranged between the first (18) and the second (24) zone. 2nd PATENT CLAIMS 3. Solid-state switch according to claim 1, characterized in that the first (718) and second (724) zone are separated from one another by a first partial area of the base body (716) and that the gate zone (720) is arranged on a second partial area of the upper side of the semiconductor body , the first and second partial areas being different from one another (FIG. 7). 4. Solid-state switch according to claim 3, characterized in that a conductor (738) electrically connected to the gate zone (720) is arranged between the first (718) and second (724) zone. 5. Solid-state switch according to claim 3, characterized in that the base body (716) is separated by a dielectric layer from a semiconductor carrier (712). 6. Solid-state switch according to claim 5, characterized in that the semiconductor carrier (712) is connected to a separate electrode (736) provided for biasing to the highest positive voltage of the solid-state switch. 7. Solid-state switch according to claim 1, characterized in that the second zone (24) is surrounded by a third zone (22) of a first conductivity type, the specific resistance of which is lower than that of the base body (16). 8. Solid-state switch according to claim 7, characterized in that the base body (16) of the semiconductor body P - conductive, the first zone (18) P + conductive, the second zone (24) N + conductive, the third zone (22) P -conducting and the gate zone (20) are N + -conducting. 9. Solid-state switch according to claim 7, characterized in that the third zone surrounds the second zone without making contact with it. 10. Solid-state switch according to claim 7, characterized in that the second zone is contained in the third zone with contact closure to this. 11. Circuit arrangement with at least two solid-state switches according to one of claims 1 to 10, characterized in that the solid-state switches are components of a semiconductor carrier (12) and that the solid-state switches are dielectrically insulated from one another (14). 12. The arrangement according to claim 11, characterized in that the two solid-state switches are connected to one another with their gate electrodes to form a bidirectional switch, while the first zone of each solid-state switch is connected to the second zone of the respective other solid-state switch (FIG. 3). 13. The arrangement according to claim 11, characterized in that a plurality of semiconductor bodies (16) are separated by a dielectric layer (14) and held on the semiconductor carrier (12), that the semiconductor carrier and the semiconductor body consist of silicon and that within the semiconductor carrier (12) a contact zone (34) is provided. 14. Arrangement according to claim 13, characterized in that the gate zone of the first and second semiconductor bodies are connected to one another, that the first zone of the semiconductor body is connected to the second zone of the second semiconductor body and that the first zone of the second semiconductor body is connected to the second zone of the first semiconductor body is connected (Fig. 3). 15. The arrangement according to claim 11, characterized in that the semiconductor body (16) is arranged within the semiconductor carrier (12) and is separated from the latter by a dielectric layer (14). 16. The arrangement according to claim 15, characterized in that the semiconductor body comprises a fourth zone (638) of the second conductivity type, which is arranged between the base body (616) and the dielectric layer (614). 17. The arrangement according to claim 16, characterized in that the fourth zone (638) is connected to the gate zone (620). 18. The arrangement according to claim 17, characterized in that the second zone (624) is surrounded by a third zone (622) of the first conductivity type, which has a lower specific resistance than the base body (616). 19. The arrangement according to claim 16, characterized in that the fourth zone (638a) is arranged only in the region of the semiconductor body (616) between the gate zone (620) and the dielectric layer (614). 20. The arrangement according to claim 16, characterized in that the fourth zone (638) is arranged substantially along the entire region of the semiconductor body (616), which is delimited by the dielectric layer (614).