CH465922A - Verknüpfungs- und Speicheranordnung - Google Patents

Verknüpfungs- und Speicheranordnung

Info

Publication number: CH465922A
Authority: CH; Switzerland
Prior art keywords: link; storage arrangement; arrangement; storage
Prior art date: 1966-09-28

Application number

CH1356767A

Other languages

English (en)

Inventor

Mcgovern William

Allen Petersen David

Donald Ross Ralph

Original Assignee

Ibm

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1966-09-28

Filing date

1967-09-28

Publication date

1968-11-30

1967-09-28 Application filed by Ibm filed Critical Ibm

1968-11-30 Publication of CH465922A publication Critical patent/CH465922A/de

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Software Systems (AREA)
General Engineering & Computer Science (AREA)
Mathematical Analysis (AREA)
Computational Mathematics (AREA)
Mathematical Optimization (AREA)
Pure & Applied Mathematics (AREA)
Computing Systems (AREA)
Computer Hardware Design (AREA)
Nonlinear Science (AREA)
Logic Circuits (AREA)
Complex Calculations (AREA)
Shift Register Type Memory (AREA)

CH1356767A 1966-09-28 1967-09-28 Verknüpfungs- und Speicheranordnung CH465922A (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US58276666A	1966-09-28	1966-09-28

Publications (1)

Publication Number	Publication Date
CH465922A true CH465922A (de)	1968-11-30

Family

ID=24330450

Family Applications (3)

Application Number	Title	Priority Date	Filing Date
CH1356567A CH465921A (de)	1966-09-28	1967-09-28	Anordnung zur Durchführung von Verknüpfungsoperationen
CH1356767A CH465922A (de)	1966-09-28	1967-09-28	Verknüpfungs- und Speicheranordnung
CH1356667A CH465924A (de)	1966-09-28	1967-09-28	Verfahren zur Addition zweier binärer Operanden

Family Applications Before (1)

Application Number	Title	Priority Date	Filing Date
CH1356567A CH465921A (de)	1966-09-28	1967-09-28	Anordnung zur Durchführung von Verknüpfungsoperationen

Family Applications After (1)

Application Number	Title	Priority Date	Filing Date
CH1356667A CH465924A (de)	1966-09-28	1967-09-28	Verfahren zur Addition zweier binärer Operanden

Country Status (9)

Country	Link
US (1)	US3505648A (de)
BE (1)	BE700401A (de)
CA (1)	CA922809A (de)
CH (3)	CH465921A (de)
DE (2)	DE1549483B2 (de)
ES (1)	ES345339A1 (de)
FR (1)	FR1538084A (de)
GB (1)	GB1163462A (de)
SE (1)	SE330275B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3701105A (en) *	1970-07-24	1972-10-24	Ibm	A central processing unit in which all data flow passes through a single arithmetic and logic unit
DE2117128A1 (de) *	1971-04-07	1972-10-19	Siemens Ag	Verfahren zum Ein- und Ausschalten von Systemeinheiten in einem modular aufgebauten Verarbeitungssystem
US4831521A (en) *	1983-11-10	1989-05-16	General Signal Corporation	Vital processor implemented with non-vital hardware

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3245040A (en) *	1958-04-21	1966-04-05	Bell Telephone Labor Inc	Data receiving circuit
US3215938A (en) *	1961-12-22	1965-11-02	Ibm	Counter pulse monitoring and correction circuit
US3278900A (en) *	1963-04-01	1966-10-11	Ibm	Character recognition system employing pulse time interval measurement
US3267460A (en) *	1963-07-26	1966-08-16	Gen Electric	Serial-parallel mode digital converter

1966
- 1966-09-28 US US582766A patent/US3505648A/en not_active Expired - Lifetime
1967
- 1967-06-23 BE BE700401D patent/BE700401A/xx unknown
- 1967-08-03 CA CA996980A patent/CA922809A/en not_active Expired
- 1967-08-17 FR FR8655A patent/FR1538084A/fr not_active Expired
- 1967-08-22 GB GB38671/67A patent/GB1163462A/en not_active Expired
- 1967-09-19 SE SE12860/67A patent/SE330275B/xx unknown
- 1967-09-22 ES ES345339A patent/ES345339A1/es not_active Expired
- 1967-09-23 DE DE19671549483 patent/DE1549483B2/de active Pending
- 1967-09-23 DE DE19671549482 patent/DE1549482A1/de active Pending
- 1967-09-28 CH CH1356567A patent/CH465921A/de unknown
- 1967-09-28 CH CH1356767A patent/CH465922A/de unknown
- 1967-09-28 CH CH1356667A patent/CH465924A/de unknown

Also Published As

Publication number	Publication date
CA922809A (en)	1973-03-13
FR1538084A (fr)	1968-08-30
US3505648A (en)	1970-04-07
SE330275B (de)	1970-11-09
BE700401A (de)	1967-12-01
CH465924A (de)	1968-11-30
DE1549482A1 (de)	1971-02-18
GB1163462A (en)	1969-09-04
DE1549483A1 (de)	1971-03-04
DE1549483B2 (de)	1971-08-19
ES345339A1 (es)	1968-11-16
CH465921A (de)	1968-11-30

Publication	Publication Date	Title
FR1516276A (fr)	1968-03-08	Oxalyl-diarylamides-asymétriques
CH436751A (de)	1967-05-31	Koordinatograph
BR6786898D0 (pt)	1973-07-10	Fechos e acondicionamento
CH458946A (de)	1968-06-30	Skibob
CH458462A (de)	1968-06-30	Supraleiter
CH458840A (fr)	1968-06-30	Turbo-propulseur
CH465484A (fr)	1968-11-15	Schrupf-Packverfahren
AT278436B (de)	1970-01-26	Milbenbekämpfungsmittel
CH465922A (de)	1968-11-30	Verknüpfungs- und Speicheranordnung
CH457359A (de)	1968-06-15	Fälzelgerät
CH466139A (de)	1968-11-30	Regalbedienungsgerät
FR1509414A (fr)	1968-01-12	Supraconducteur
AT301006B (de)	1972-08-25	Kettsamtbahn
FR1485543A (fr)	1967-06-23	Cryostat
FR1512099A (fr)	1968-02-02	Pervibrateur
FI46481B (fi)	1973-01-02	Taetningsanordning
FR1508831A (fr)	1968-01-05	Garage-parking
BR6791441D0 (pt)	1973-08-09	Imidazois
FR1533815A (fr)	1968-07-19	Agents anticryptogamiques et désherbants
CH464795A (de)	1968-10-31	Speichereinrichtung
FR1514677A (fr)	1968-02-23	Canapé-lit
FR1488314A (fr)	1967-07-13	Imidazothiazolyl-benzimidazoles
BR6795791D0 (pt)	1973-03-20	Umbrinamicina e diumicina
FR1526090A (fr)	1968-05-24	Complexe-interrupteur et fusibles-perfectionné
CH477726A (de)	1969-08-31	Speicherstromkreis