AU2001295768A1 - Processor architecture - Google Patents
Processor architectureInfo
- Publication number
- AU2001295768A1 AU2001295768A1 AU2001295768A AU9576801A AU2001295768A1 AU 2001295768 A1 AU2001295768 A1 AU 2001295768A1 AU 2001295768 A AU2001295768 A AU 2001295768A AU 9576801 A AU9576801 A AU 9576801A AU 2001295768 A1 AU2001295768 A1 AU 2001295768A1
- Authority
- AU
- Australia
- Prior art keywords
- processor architecture
- architecture
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Multi Processors (AREA)
- Advance Control (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
- Power Sources (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0030994A GB2370381B (en) | 2000-12-19 | 2000-12-19 | Processor architecture |
| GB0030994.8 | 2000-12-19 | ||
| PCT/GB2001/004685 WO2002050700A2 (en) | 2000-12-19 | 2001-10-19 | Processor architecture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001295768A1 true AU2001295768A1 (en) | 2002-07-01 |
Family
ID=9905411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001295768A Abandoned AU2001295768A1 (en) | 2000-12-19 | 2001-10-19 | Processor architecture |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8386752B2 (en) |
| EP (1) | EP1377911A2 (en) |
| JP (2) | JP4241045B2 (en) |
| CN (1) | CN1316402C (en) |
| AU (1) | AU2001295768A1 (en) |
| GB (1) | GB2370381B (en) |
| WO (1) | WO2002050700A2 (en) |
Families Citing this family (67)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
| US20020159466A1 (en) | 2001-02-14 | 2002-10-31 | John Rhoades | Lookup engine |
| US7185174B2 (en) * | 2001-03-02 | 2007-02-27 | Mtekvision Co., Ltd. | Switch complex selectively coupling input and output of a node in two-dimensional array to four ports and using four switches coupling among ports |
| CA2478571A1 (en) * | 2001-03-02 | 2002-09-12 | Atsana Semiconductor Corp. | Apparatus for variable word length computing in an array processor |
| GB2396446B (en) * | 2002-12-20 | 2005-11-16 | Picochip Designs Ltd | Array synchronization |
| US7206870B2 (en) | 2003-06-18 | 2007-04-17 | Ambric, Inc. | Data interface register structure with registers for data, validity, group membership indicator, and ready to accept next member signal |
| US20070186076A1 (en) * | 2003-06-18 | 2007-08-09 | Jones Anthony M | Data pipeline transport system |
| EP1709549A2 (en) * | 2004-01-22 | 2006-10-11 | Koninklijke Philips Electronics N.V. | A dynamically reconfigurable signal processing apparatus and method for use in a high speed digital communication system |
| JP4989899B2 (en) * | 2006-01-27 | 2012-08-01 | ルネサスエレクトロニクス株式会社 | Semiconductor processing unit |
| EP1821174B9 (en) | 2006-02-16 | 2010-10-27 | VNS Portfolio LLC | Asynchronous power saving computer |
| US7617383B2 (en) | 2006-02-16 | 2009-11-10 | Vns Portfolio Llc | Circular register arrays of a computer |
| US7934075B2 (en) | 2006-02-16 | 2011-04-26 | Vns Portfolio Llc | Method and apparatus for monitoring inputs to an asyncrhonous, homogenous, reconfigurable computer array |
| EP1821211A3 (en) * | 2006-02-16 | 2008-06-18 | Technology Properties Limited | Cooperative multitasking method in a multiprocessor system |
| EP1821200B1 (en) * | 2006-02-16 | 2011-06-08 | VNS Portfolio LLC | Method and apparatus for handling inputs to a single-chip multiprocessor system |
| US8099583B2 (en) * | 2006-08-23 | 2012-01-17 | Axis Semiconductor, Inc. | Method of and apparatus and architecture for real time signal processing by switch-controlled programmable processor configuring and flexible pipeline and parallel processing |
| US7788471B2 (en) * | 2006-09-18 | 2010-08-31 | Freescale Semiconductor, Inc. | Data processor and methods thereof |
| US7856246B2 (en) * | 2007-03-21 | 2010-12-21 | Nokia Corporation | Multi-cell data processor |
| US7555637B2 (en) | 2007-04-27 | 2009-06-30 | Vns Portfolio Llc | Multi-port read/write operations based on register bits set for indicating select ports and transfer directions |
| US8181003B2 (en) * | 2008-05-29 | 2012-05-15 | Axis Semiconductor, Inc. | Instruction set design, control and communication in programmable microprocessor cores and the like |
| US8078833B2 (en) * | 2008-05-29 | 2011-12-13 | Axis Semiconductor, Inc. | Microprocessor with highly configurable pipeline and executional unit internal hierarchal structures, optimizable for different types of computational functions |
| GB2470037B (en) | 2009-05-07 | 2013-07-10 | Picochip Designs Ltd | Methods and devices for reducing interference in an uplink |
| GB2470891B (en) | 2009-06-05 | 2013-11-27 | Picochip Designs Ltd | A method and device in a communication network |
| GB2470771B (en) | 2009-06-05 | 2012-07-18 | Picochip Designs Ltd | A method and device in a communication network |
| US8150902B2 (en) | 2009-06-19 | 2012-04-03 | Singular Computing Llc | Processing with compact arithmetic processing element |
| EP2284693A1 (en) * | 2009-08-03 | 2011-02-16 | C.R.F. Società Consortile per Azioni | Wait instruction |
| GB2482869B (en) | 2010-08-16 | 2013-11-06 | Picochip Designs Ltd | Femtocell access control |
| GB2489716B (en) | 2011-04-05 | 2015-06-24 | Intel Corp | Multimode base system |
| US10157060B2 (en) | 2011-12-29 | 2018-12-18 | Intel Corporation | Method, device and system for control signaling in a data path module of a data stream processing engine |
| US9235382B2 (en) * | 2013-09-20 | 2016-01-12 | Microsoft Technology Licensing, Llc | Input filters and filter-driven input processing |
| US10331583B2 (en) | 2013-09-26 | 2019-06-25 | Intel Corporation | Executing distributed memory operations using processing elements connected by distributed channels |
| US9606573B1 (en) * | 2014-09-30 | 2017-03-28 | Altera Corporation | Configurable clock grid structures |
| US10402168B2 (en) | 2016-10-01 | 2019-09-03 | Intel Corporation | Low energy consumption mantissa multiplication for floating point multiply-add operations |
| US10416999B2 (en) | 2016-12-30 | 2019-09-17 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
| US10572376B2 (en) | 2016-12-30 | 2020-02-25 | Intel Corporation | Memory ordering in acceleration hardware |
| US10558575B2 (en) | 2016-12-30 | 2020-02-11 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
| US10474375B2 (en) | 2016-12-30 | 2019-11-12 | Intel Corporation | Runtime address disambiguation in acceleration hardware |
| US10515046B2 (en) | 2017-07-01 | 2019-12-24 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator |
| US10445451B2 (en) | 2017-07-01 | 2019-10-15 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with performance, correctness, and power reduction features |
| US10445234B2 (en) | 2017-07-01 | 2019-10-15 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with transactional and replay features |
| US10387319B2 (en) | 2017-07-01 | 2019-08-20 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with memory system performance, power reduction, and atomics support features |
| US10467183B2 (en) | 2017-07-01 | 2019-11-05 | Intel Corporation | Processors and methods for pipelined runtime services in a spatial array |
| US10469397B2 (en) | 2017-07-01 | 2019-11-05 | Intel Corporation | Processors and methods with configurable network-based dataflow operator circuits |
| US10515049B1 (en) | 2017-07-01 | 2019-12-24 | Intel Corporation | Memory circuits and methods for distributed memory hazard detection and error recovery |
| US10496574B2 (en) | 2017-09-28 | 2019-12-03 | Intel Corporation | Processors, methods, and systems for a memory fence in a configurable spatial accelerator |
| US11086816B2 (en) | 2017-09-28 | 2021-08-10 | Intel Corporation | Processors, methods, and systems for debugging a configurable spatial accelerator |
| US10380063B2 (en) | 2017-09-30 | 2019-08-13 | Intel Corporation | Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator |
| US10445098B2 (en) * | 2017-09-30 | 2019-10-15 | Intel Corporation | Processors and methods for privileged configuration in a spatial array |
| GB2569276B (en) * | 2017-10-20 | 2020-10-14 | Graphcore Ltd | Compiler method |
| US10565134B2 (en) | 2017-12-30 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for multicast in a configurable spatial accelerator |
| US10445250B2 (en) | 2017-12-30 | 2019-10-15 | Intel Corporation | Apparatus, methods, and systems with a configurable spatial accelerator |
| US10417175B2 (en) | 2017-12-30 | 2019-09-17 | Intel Corporation | Apparatus, methods, and systems for memory consistency in a configurable spatial accelerator |
| US11307873B2 (en) | 2018-04-03 | 2022-04-19 | Intel Corporation | Apparatus, methods, and systems for unstructured data flow in a configurable spatial accelerator with predicate propagation and merging |
| US10564980B2 (en) | 2018-04-03 | 2020-02-18 | Intel Corporation | Apparatus, methods, and systems for conditional queues in a configurable spatial accelerator |
| US11200186B2 (en) | 2018-06-30 | 2021-12-14 | Intel Corporation | Apparatuses, methods, and systems for operations in a configurable spatial accelerator |
| US10853073B2 (en) | 2018-06-30 | 2020-12-01 | Intel Corporation | Apparatuses, methods, and systems for conditional operations in a configurable spatial accelerator |
| US10459866B1 (en) | 2018-06-30 | 2019-10-29 | Intel Corporation | Apparatuses, methods, and systems for integrated control and data processing in a configurable spatial accelerator |
| US10891240B2 (en) | 2018-06-30 | 2021-01-12 | Intel Corporation | Apparatus, methods, and systems for low latency communication in a configurable spatial accelerator |
| US20200057645A1 (en) * | 2018-08-16 | 2020-02-20 | Tachyum Ltd. | System and method for location aware processing |
| US10678724B1 (en) | 2018-12-29 | 2020-06-09 | Intel Corporation | Apparatuses, methods, and systems for in-network storage in a configurable spatial accelerator |
| US10565036B1 (en) | 2019-02-14 | 2020-02-18 | Axis Semiconductor, Inc. | Method of synchronizing host and coprocessor operations via FIFO communication |
| US10915471B2 (en) | 2019-03-30 | 2021-02-09 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial accelerator |
| US10817291B2 (en) | 2019-03-30 | 2020-10-27 | Intel Corporation | Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator |
| US11029927B2 (en) | 2019-03-30 | 2021-06-08 | Intel Corporation | Methods and apparatus to detect and annotate backedges in a dataflow graph |
| US10965536B2 (en) | 2019-03-30 | 2021-03-30 | Intel Corporation | Methods and apparatus to insert buffers in a dataflow graph |
| US11037050B2 (en) | 2019-06-29 | 2021-06-15 | Intel Corporation | Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial accelerator |
| US11907713B2 (en) | 2019-12-28 | 2024-02-20 | Intel Corporation | Apparatuses, methods, and systems for fused operations using sign modification in a processing element of a configurable spatial accelerator |
| US12086080B2 (en) | 2020-09-26 | 2024-09-10 | Intel Corporation | Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuits |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61123968A (en) | 1984-11-20 | 1986-06-11 | Mitsubishi Electric Corp | data transmission equipment |
| JP2930341B2 (en) * | 1988-10-07 | 1999-08-03 | マーチン・マリエッタ・コーポレーション | Data parallel processing unit |
| US5734921A (en) * | 1990-11-13 | 1998-03-31 | International Business Machines Corporation | Advanced parallel array processor computer package |
| JPH05181816A (en) * | 1992-01-07 | 1993-07-23 | Hitachi Ltd | Parallel data processor and microprocessor |
| EP0973099A3 (en) * | 1994-09-13 | 2003-04-16 | Lockheed Martin Corporation | Parallel data processor |
| JPH0954761A (en) * | 1995-08-15 | 1997-02-25 | Sony Corp | Digital signal processing device and information processing system |
| US5960211A (en) * | 1995-12-15 | 1999-09-28 | Hughes Aircraft | Data formatting method and apparatus for a data processing array |
| US5903771A (en) * | 1996-01-16 | 1999-05-11 | Alacron, Inc. | Scalable multi-processor architecture for SIMD and MIMD operations |
| JPH09223011A (en) * | 1996-02-19 | 1997-08-26 | San Graphics:Kk | Arithmetic unit |
| US5926640A (en) * | 1996-11-01 | 1999-07-20 | Digital Equipment Corporation | Skipping clock interrupts during system inactivity to reduce power consumption |
| US6023753A (en) * | 1997-06-30 | 2000-02-08 | Billion Of Operations Per Second, Inc. | Manifold array processor |
| JP3738128B2 (en) | 1998-03-25 | 2006-01-25 | シャープ株式会社 | Data-driven information processing device |
| GB2370380B (en) * | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
-
2000
- 2000-12-19 GB GB0030994A patent/GB2370381B/en not_active Expired - Fee Related
-
2001
- 2001-10-19 JP JP2002551728A patent/JP4241045B2/en not_active Expired - Fee Related
- 2001-10-19 CN CNB018226418A patent/CN1316402C/en not_active Expired - Fee Related
- 2001-10-19 WO PCT/GB2001/004685 patent/WO2002050700A2/en not_active Ceased
- 2001-10-19 EP EP01976500A patent/EP1377911A2/en not_active Withdrawn
- 2001-10-19 AU AU2001295768A patent/AU2001295768A1/en not_active Abandoned
- 2001-10-19 US US10/450,615 patent/US8386752B2/en not_active Expired - Fee Related
-
2008
- 2008-08-21 JP JP2008213366A patent/JP2009054154A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| GB0030994D0 (en) | 2001-01-31 |
| US8386752B2 (en) | 2013-02-26 |
| CN1316402C (en) | 2007-05-16 |
| GB2370381B (en) | 2003-12-24 |
| JP2004525440A (en) | 2004-08-19 |
| JP4241045B2 (en) | 2009-03-18 |
| US20050076187A1 (en) | 2005-04-07 |
| WO2002050700A2 (en) | 2002-06-27 |
| GB2370381A (en) | 2002-06-26 |
| CN1518705A (en) | 2004-08-04 |
| EP1377911A2 (en) | 2004-01-07 |
| WO2002050700A3 (en) | 2003-11-06 |
| JP2009054154A (en) | 2009-03-12 |
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