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ATE178443T1 - Hochgeschwindigkeits-crc-checksummengenerator und prüfsystem mit programmierbarer architektur - Google Patents

Hochgeschwindigkeits-crc-checksummengenerator und prüfsystem mit programmierbarer architektur

Info

Publication number
ATE178443T1
ATE178443T1 AT95944609T AT95944609T ATE178443T1 AT E178443 T1 ATE178443 T1 AT E178443T1 AT 95944609 T AT95944609 T AT 95944609T AT 95944609 T AT95944609 T AT 95944609T AT E178443 T1 ATE178443 T1 AT E178443T1
Authority
AT
Austria
Prior art keywords
high speed
testing system
crc checksum
redundancy check
checksum generator
Prior art date
Application number
AT95944609T
Other languages
English (en)
Inventor
Mark R Thomann
Huy Thanh Vo
Charles L Ingalls
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE178443T1 publication Critical patent/ATE178443T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091—Parallel or block-wise CRC computation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Quality & Reliability (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computing Systems (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
AT95944609T 1995-06-07 1995-12-08 Hochgeschwindigkeits-crc-checksummengenerator und prüfsystem mit programmierbarer architektur ATE178443T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/474,397 US5854800A (en) 1995-06-07 1995-06-07 Method and apparatus for a high speed cyclical redundancy check system

Publications (1)

Publication Number Publication Date
ATE178443T1 true ATE178443T1 (de) 1999-04-15

Family

ID=23883351

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95944609T ATE178443T1 (de) 1995-06-07 1995-12-08 Hochgeschwindigkeits-crc-checksummengenerator und prüfsystem mit programmierbarer architektur

Country Status (8)

Country Link
US (2) US5854800A (de)
EP (1) EP0830741B1 (de)
JP (1) JP3020009B2 (de)
KR (1) KR100264875B1 (de)
AT (1) ATE178443T1 (de)
DE (1) DE69508800T2 (de)
TW (1) TW482955B (de)
WO (1) WO1996041424A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6289023B1 (en) 1997-09-25 2001-09-11 Hewlett-Packard Company Hardware checksum assist for network protocol stacks
US6516363B1 (en) 1999-08-06 2003-02-04 Micron Technology, Inc. Output data path having selectable data rates
US6694416B1 (en) 1999-09-02 2004-02-17 Micron Technology, Inc. Double data rate scheme for data output
GB0013350D0 (en) * 2000-06-01 2000-07-26 Tao Group Ltd End of message markers
US6906961B2 (en) * 2003-06-24 2005-06-14 Micron Technology, Inc. Erase block data splitting
KR101110625B1 (ko) 2005-03-09 2012-02-16 삼성전자주식회사 전송 데이터의 무결성 검사 방법 및 수단
US7444579B2 (en) * 2005-04-28 2008-10-28 Micron Technology, Inc. Non-systematic coded error correction
US7453723B2 (en) * 2006-03-01 2008-11-18 Micron Technology, Inc. Memory with weighted multi-page read
US7369434B2 (en) * 2006-08-14 2008-05-06 Micron Technology, Inc. Flash memory with multi-bit read
US7739576B2 (en) * 2006-08-31 2010-06-15 Micron Technology, Inc. Variable strength ECC
US9106258B2 (en) 2013-11-22 2015-08-11 International Business Machines Corporation Early data tag to allow data CRC bypass via a speculative memory data return protocol

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55120252A (en) * 1979-03-12 1980-09-16 Nec Corp Error control system
JPS5776621A (en) * 1980-10-30 1982-05-13 Fujitsu Ltd Data processing system having input and output system
JPS58206254A (ja) * 1982-05-27 1983-12-01 Nec Corp 誤り検出符号生成／検査方式
US4720830A (en) * 1985-12-02 1988-01-19 Advanced Micro Devices, Inc. CRC calculation apparatus having reduced output bus size
JPH01150940A (ja) * 1987-12-08 1989-06-13 Hitachi Ltd Ｃｒｃ演算方式
JPH03505035A (ja) * 1989-02-16 1991-10-31 グラマン　エアロスペース　コーポレーション 超高速エラー検出ネットワーク
US5241546A (en) * 1991-02-01 1993-08-31 Quantum Corporation On-the-fly error correction with embedded digital controller
US5691976A (en) * 1992-04-02 1997-11-25 Applied Digital Access Performance monitoring and test system for a telephone network
GB9312135D0 (en) * 1993-06-11 1993-07-28 Inmos Ltd Generation of checking data
US5602857A (en) * 1993-09-21 1997-02-11 Cirrus Logic, Inc. Error correction method and apparatus

Also Published As

Publication number Publication date
DE69508800T2 (de) 1999-08-05
EP0830741A1 (de) 1998-03-25
KR100264875B1 (ko) 2000-09-01
TW482955B (en) 2002-04-11
KR19990022495A (ko) 1999-03-25
US5964896A (en) 1999-10-12
JP3020009B2 (ja) 2000-03-15
DE69508800D1 (de) 1999-05-06
WO1996041424A1 (en) 1996-12-19
US5854800A (en) 1998-12-29
EP0830741B1 (de) 1999-03-31
JPH10510411A (ja) 1998-10-06

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Legal Events

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