Page 1. The Impact of NBTI on the Performance of Combinational and Sequential Circuits Wenping Wang1, Shengqi Yang2, Sarvesh Bhardwaj1, Rakesh Vattikonda1, Sarma Vrudhula3, Frank Liu4, Yu Cao1 Department of 1Electrical ...
Research Interests: Design, Industrial Design, Performance, Signal Analysis, Reliability, and 15 moreTemperature, Speed, Degradation, Experimentation, Sequential Circuits, NBTI, DAC, Network Topology, Logic Design, Circuit Topology, Duty Cycle, Switching Activity, Combinational Circuits, Integrated Circuit Design, and Sequential Circuit
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This paper presents a simulation framework for reliability analysis of circuits in the SPICE environment. The framework incorporates the degradation of physical parameters such as threshold voltage (Vtp) into circuit simulation and... more
This paper presents a simulation framework for reliability analysis of circuits in the SPICE environment. The framework incorporates the degradation of physical parameters such as threshold voltage (Vtp) into circuit simulation and enables the design of highly reliable circuits. The ...
Research Interests: Human Computer Interaction, Stress, Digital Circuits, Reaction-Diffusion Systems, Reliability Analysis, and 10 moreDegradation, Simulation Methods, Circuit simulation, Circuit Analysis, Ring Oscillator, Numerical Solution, Environmental Parameter, Simulation Framework, Threshold Voltage, and Generic model
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AbstractThis paper presents a predictive model for the Nega-tive Bias Temperature Instability (NBTI) of PMOS under both short term and long term operation. Based on the reaction-diffusion (RD) mechanism, this model accurately captures... more
AbstractThis paper presents a predictive model for the Nega-tive Bias Temperature Instability (NBTI) of PMOS under both short term and long term operation. Based on the reaction-diffusion (RD) mechanism, this model accurately captures the dependence of NBTI on the oxide ...
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Research Interests:
Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are the leading reliability concerns for nanoscale transistors. The de facto modeling method to analyze CHC is based on substrate current Isub, which becomes... more
Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are the leading reliability concerns for nanoscale transistors. The de facto modeling method to analyze CHC is based on substrate current Isub, which becomes increasingly problematic with technology scaling as various leakage components dominate Isub. In this paper, we present a unified approach that directly predicts the change of key