vivado-hls
Here are 69 public repositories matching this topic...
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Oct 9, 2017 - C++
Using Vivado HLS to create floating point IP, used to accelerate a Zynq system. Multiple engines are instantiated.
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Jan 21, 2018 - VHDL
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Mar 18, 2018 - Tcl
Designing local adaptive thresholding using integral images from scratch. "Efficient Implementation of Local Adaptive Thresholding Techniques Using Integral Images" by Faisal Shafait, Daniel Keysers, Thomas M. Breuel was used as guideline.
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Aug 13, 2018 - C++
This implementation of RSA is on an FPGA platform to test the performance of the algorithm in terms of latency as a comparison to AES
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Oct 19, 2018 - C++
HLS SHA-3 Accelerator
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Nov 25, 2018 - C
Quick Verilog Module Isolator - Isolates a design for testing.
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Dec 11, 2018 - Verilog
Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.
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Apr 5, 2019 - C++
FPGA implementation of Canny edge detection by using Vivado HLS
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Jun 11, 2019 - C++
Real-time binocular stereo vision FPGA system with OV5640 cameras
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Jul 18, 2019 - Tcl
Simple tutorials for getting started with programming on Trenz ArduZynq boards.
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Sep 17, 2019
A simple DNN for handwritten numbers recognition. Written in C++, and optimized using Vivado HLS.
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Nov 21, 2019 - C++
A Vivado HLS project generator
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Dec 14, 2019 - Python
This project implements a convolution kernel based on vivado HLS on zcu104
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Mar 15, 2020 - C++
A fast and efficient implementation of a SHA256 cracker
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May 17, 2020 - VHDL
CPU implementation of the Image stitching using FAST. For FPGA implementation visit tharaka27-SocStitcher.
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Jun 19, 2020 - C++
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