opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog AXI components for FPGA implementation

OpenXuantie - OpenC910 Core

synthesiseable ieee 754 floating point library in verilog

Free collection of hardware modules written in Verilog for FPGAs and embedded systems.

Implementing Different Adder Structures in Verilog

CS3339 Computer Architecture class project - 5 stage MIPS-like processor with forwarding, hazard control, no exception handling.