[Xtensa] Add Cannonlake CPU

This patch adds a definition of Xtensa LX6 CPU variant present in Intel Cannonlake and Tigerlake SOC platforms.
espressif · maciej-czekaj · Sep 11, 2023 · Mar 27, 2023 · Mar 27, 2023 · Mar 27, 2023
commit 85f7da51bda01682041023a551ccf481e3c61fc6
diff --git a/llvm/include/llvm/TargetParser/XtensaTargetParser.def b/llvm/include/llvm/TargetParser/XtensaTargetParser.def
@@ -73,6 +73,13 @@ XTENSA_CPU(ESP32S3, {"esp32s3"},
                 FK_COPROCESSOR | FK_INTERRUPT | FK_RVECTOR | FK_TIMERINT | FK_PRID | FK_REGPROTECT | FK_MISCSR |
                 FK_ESP32S3OPS))
 
+XTENSA_CPU(CNL, {"cnl"}, (FK_DENSITY | FK_FP | FK_LOOP | FK_MAC16 | FK_WINDOWED | FK_BOOLEAN |
+                          FK_SEXT | FK_NSA | FK_MUL32 | FK_MUL32HIGH | FK_S32C1I | 
+                          FK_THREADPTR | FK_DIV32 | FK_ATOMCTL | FK_MEMCTL | FK_DEBUG |
+                          FK_EXCEPTION | FK_HIGHPRIINTERRUPTS | FK_COPROCESSOR |
+                          FK_INTERRUPT | FK_RVECTOR | FK_TIMERINT | FK_PRID | FK_REGPROTECT | FK_MISCSR))
+
+
 #undef XTENSA_CPU
 
 #ifndef XTENSA_CPU_ALIAS

diff --git a/llvm/lib/Target/Xtensa/Xtensa.td b/llvm/lib/Target/Xtensa/Xtensa.td
@@ -206,6 +206,13 @@ def : Proc<"esp32s3", [FeatureDensity, FeatureSingleFloat, FeatureLoop, FeatureM
                        FeatureInterrupt, FeatureRelocatableVector, FeatureTimerInt, FeaturePRID, FeatureRegionProtection, FeatureMiscSR,
                        FeatureMINMAX, FeatureCLAMPS, FeatureESP32S3Ops]>;
 
+def : Proc<"cnl", [FeatureDensity, FeatureSingleFloat, FeatureLoop,  FeatureWindowed, FeatureBoolean, 
+                    FeatureSEXT, FeatureNSA, FeatureMul32, FeatureMul32High,  FeatureS32C1I,
+                    FeatureTHREADPTR, FeatureDiv32, FeatureATOMCTL, FeatureMEMCTL, FeatureDebug, 
+                    FeatureException, FeatureHighPriInterrupts, FeatureCoprocessor,
+                     FeatureInterrupt, FeatureRelocatableVector, FeatureTimerInt, FeaturePRID,
+                     FeatureRegionProtection, FeatureMiscSR]>; 
+
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//