-
Notifications
You must be signed in to change notification settings - Fork 1.3k
STM32: Fix LSE hang at startup #2866
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact 10000 its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Any idea why the LSE isn't starting? Thanks for looking into this!
FYi -- i tried this PR on a feather stm32f405 and it still does not boot. |
Ok, fixes are in @tannewt. @jerryneedell, the stack sizes have been adjusted - if you could run your stack code on this that would be very helpful. Important note! Once programmed you may need to reset the power before these fixes will take effect. It appears settings in the Backup Domain like to persist past writes and such, and I've observed that sometimes the chip will not boot when switching between the LSI and LSE, as we saw briefly on the call today. A simple reset does not do the trick - you must power cycle. |
Also, since the H7 and F7 have different settings for the Backup Domain, and I don't think we've effectively tested them, I've disabled LSE on them entirely until I have a chance to revisit this and hopefully move all this RCC setup code into Peripherals management where it probably belongs along with the rest of the oscillator stuff. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks great! Thank you! Will merge after CI passes.
sorry I'm late, but it works great on my feather_stm32405 -- also resolves the I2C and SPI issues. |
This PR attempts to fix the low power issue in #2861 by adding a timeout for the LSE that attempts to swap over to the LSI on failure. Drafted because it still does not fully resolve the problem.