List of AMD processors with 3D graphics
This is a list of microprocessors designed by AMD containing a 3D integrated graphics processing unit (iGPU), including those under the AMD APU (Accelerated Processing Unit) product series.
Features overview
editThe following table shows features of AMD's processors with 3D graphics, including APUs.
Platform | High, standard and low power | Low and ultra-low power | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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Codename | Server | Basic | Toronto | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Micro | Kyoto | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Desktop | Performance | Raphael | Phoenix | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mainstream | Llano | Trinity | Richland | Kaveri | Kaveri Refresh (Godavari) | Carrizo | Bristol Ridge | Raven Ridge | Picasso | Renoir | Cezanne | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Entry | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Basic | Kabini | Dalí | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mobile | Performance | Renoir | Cezanne | Rembrandt | Dragon Range | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mainstream | Llano | Trinity | Richland | Kaveri | Carrizo | Bristol Ridge | Raven Ridge | Picasso | Renoir Lucienne |
Cezanne Barceló |
Phoenix | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Entry | Dalí | Mendocino | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Basic | Desna, Ontario, Zacate | Kabini, Temash | Beema, Mullins | Carrizo-L | Stoney Ridge | Pollock | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Embedded | Trinity | Bald Eagle | Merlin Falcon, Brown Falcon |
Great Horned Owl | Grey Hawk | Ontario, Zacate | Kabini | Steppe Eagle, Crowned Eagle, LX-Family |
Prairie Falcon | Banded Kestrel | River Hawk | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Released | Aug 2011 | Oct 2012 | Jun 2013 | Jan 2014 | 2015 | Jun 2015 | Jun 2016 | Oct 2017 | Jan 2019 | Mar 2020 | Jan 2021 | Jan 2022 | Sep 2022 | Jan 2023 | Jan 2011 | May 2013 | Apr 2014 | May 2015 | Feb 2016 | Apr 2019 | Jul 2020 | Jun 2022 | Nov 2022 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CPU microarchitecture | K10 | Piledriver | Steamroller | Excavator | "Excavator+"[1] | Zen | Zen+ | Zen 2 | Zen 3 | Zen 3+ | Zen 4 | Bobcat | Jaguar | Puma | Puma+[2] | "Excavator+" | Zen | Zen+ | "Zen 2+" | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
ISA | x86-64 v1 | x86-64 v2 | x86-64 v3 | x86-64 v4 | x86-64 v1 | x86-64 v2 | x86-64 v3 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Socket | Desktop | Performance | — | AM5 | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mainstream | — | AM4 | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Entry | FM1 | FM2 | FM2+ | FM2+[a], AM4 | AM4 | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Basic | — | — | AM1 | — | FP5 | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Other | FS1 | FS1+, FP2 | FP3 | FP4 | FP5 | FP6 | FP7 | FL1 | FP7 FP7r2 FP8 |
? | FT1 | FT3 | FT3b | FP4 | FP5 | FT5 | FP5 | FT6 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCI Express version | 2.0 | 3.0 | 4.0 | 5.0 | 4.0 | 2.0 | 3.0 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CXL | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Fab. (nm) | GF 32SHP (HKMG SOI) |
GF 28SHP (HKMG bulk) |
GF 14LPP (FinFET bulk) |
GF 12LP (FinFET bulk) |
TSMC N7 (FinFET bulk) |
TSMC N6 (FinFET bulk) |
CCD: TSMC N5 (FinFET bulk) cIOD: TSMC N6 (FinFET bulk) |
TSMC 4nm (FinFET bulk) |
TSMC N40 (bulk) |
TSMC N28 (HKMG bulk) |
GF 28SHP (HKMG bulk) |
GF 14LPP (FinFET bulk) |
GF 12LP (FinFET bulk) |
TSMC N6 (FinFET bulk) | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Die area (mm2) | 228 | 246 | 245 | 245 | 250 | 210[3] | 156 | 180 | 210 | CCD: (2x) 70 cIOD: 122 |
178 | 75 (+ 28 FCH) | 107 | ? | 125 | 149 | ~100 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Min TDP (W) | 35 | 17 | 12 | 10 | 15 | 65 | 35 | 4.5 | 4 | 3.95 | 10 | 6 | 12 | 8 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max APU TDP (W) | 100 | 95 | 65 | 45 | 170 | 54 | 18 | 25 | 6 | 54 | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max stock APU base clock (GHz) | 3 | 3.8 | 4.1 | 4.1 | 3.7 | 3.8 | 3.6 | 3.7 | 3.8 | 4.0 | 3.3 | 4.7 | 4.3 | 1.75 | 2.2 | 2 | 2.2 | 3.2 | 2.6 | 1.2 | 3.35 | 2.8 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max APUs per node[b] | 1 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max core dies per CPU | 1 | 2 | 1 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max CCX per core die | 1 | 2 | 1 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max cores per CCX | 4 | 8 | 2 | 4 | 2 | 4 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max CPU[c] cores per APU | 4 | 8 | 16 | 8 | 2 | 4 | 2 | 4 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max threads per CPU core | 1 | 2 | 1 | 2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Integer pipeline structure | 3+3 | 2+2 | 4+2 | 4+2+1 | 1+3+3+1+2 | 1+1+1+1 | 2+2 | 4+2 | 4+2+1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
IOMMU[d] | — | v2 | v1 | v2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
BMI1, AES-NI, CLMUL, and F16C | — | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MOVBE | — | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AVIC, BMI2, RDRAND, and MWAITX/MONITORX | — | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
SME[e], TSME[e], ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
MPK, VAES | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
SGX | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
FPUs per core | 1 | 0.5 | 1 | 1 | 0.5 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Pipes per FPU | 2 | 2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
FPU pipe width | 128-bit | 256-bit | 80-bit | 128-bit | 256-bit | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CPU instruction set SIMD level | SSE4a[f] | AVX | AVX2 | AVX-512 | SSSE3 | AVX | AVX2 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
3DNow! | 3DNow!+ | — | — | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PREFETCH/PREFETCHW | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GFNI | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AMX | — | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
FMA4, LWP, TBM, and XOP | — | — | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
FMA3 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AMD XDNA | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L1 data cache per core (KiB) | 64 | 16 | 32 | 32 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L1 data cache associativity (ways) | 2 | 4 | 8 | 8 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L1 instruction caches per core | 1 | 0.5 | 1 | 1 | 0.5 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max APU total L1 instruction cache (KiB) | 256 | 128 | 192 | 256 | 512 | 256 | 64 | 128 | 96 | 128 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L1 instruction cache associativity (ways) | 2 | 3 | 4 | 8 | 2 | 3 | 4 | 8 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L2 caches per core | 1 | 0.5 | 1 | 1 | 0.5 | 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max APU total L2 cache (MiB) | 4 | 2 | 4 | 16 | 1 | 2 | 1 | 2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L2 cache associativity (ways) | 16 | 8 | 16 | 8 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max on--die L3 cache per CCX (MiB) | — | 4 | 16 | 32 | — | 4 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max 3D V-Cache per CCD (MiB) | — | 64 | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max total in-CCD L3 cache per APU (MiB) | 4 | 8 | 16 | 64 | 4 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max. total 3D V-Cache per APU (MiB) | — | 64 | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max. board L3 cache per APU (MiB) | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max total L3 cache per APU (MiB) | 4 | 8 | 16 | 128 | 4 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
APU L3 cache associativity (ways) | 16 | 16 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
L3 cache scheme | Victim | Victim | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max. L4 cache | — | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max stock DRAM support | DDR3-1866 | DDR3-2133 | DDR3-2133, DDR4-2400 | DDR4-2400 | DDR4-2933 | DDR4-3200, LPDDR4-4266 | DDR5-4800, LPDDR5-6400 | DDR5-5200 | DDR5-5600, LPDDR5x-7500 | DDR3L-1333 | DDR3L-1600 | DDR3L-1866 | DDR3-1866, DDR4-2400 | DDR4-2400 | DDR4-1600 | DDR4-3200 | LPDDR5-5500 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max DRAM channels per APU | 2 | 1 | 2 | 1 | 2 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max stock DRAM bandwidth (GB/s) per APU | 29.866 | 34.132 | 38.400 | 46.932 | 68.256 | 102.400 | 83.200 | 120.000 | 10.666 | 12.800 | 14.933 | 19.200 | 38.400 | 12.800 | 51.200 | 88.000 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GPU microarchitecture | TeraScale 2 (VLIW5) | TeraScale 3 (VLIW4) | GCN 2nd gen | GCN 3rd gen | GCN 5th gen[4] | RDNA 2 | RDNA 3 | TeraScale 2 (VLIW5) | GCN 2nd gen | GCN 3rd gen[4] | GCN 5th gen | RDNA 2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GPU instruction set | TeraScale instruction set | GCN instruction set | RDNA instruction set | TeraScale instruction set | GCN instruction set | RDNA instruction set | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max stock GPU base clock (MHz) | 600 | 800 | 844 | 866 | 1108 | 1250 | 1400 | 2100 | 2400 | 400 | 538 | 600 | ? | 847 | 900 | 1200 | 600 | 1300 | 1900 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Max stock GPU base GFLOPS[g] | 480 | 614.4 | 648.1 | 886.7 | 1134.5 | 1760 | 1971.2 | 2150.4 | 3686.4 | 102.4 | 86 | ? | ? | ? | 345.6 | 460.8 | 230.4 | 1331.2 | 486.4 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
3D engine[h] | Up to 400:20:8 | Up to 384:24:6 | Up to 512:32:8 | Up to 704:44:16[5] | Up to 512:32:8 | 768:48:8 | 128:8:4 | 80:8:4 | 128:8:4 | Up to 192:12:8 | Up to 192:12:4 | 192:12:4 | Up to 512:?:? | 128:?:? | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
IOMMUv1 | IOMMUv2 | IOMMUv1 | ? | IOMMUv2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Video decoder | UVD 3.0 | UVD 4.2 | UVD 6.0 | VCN 1.0[6] | VCN 2.1[7] | VCN 2.2[7] | VCN 3.1 | ? | UVD 3.0 | UVD 4.0 | UVD 4.2 | UVD 6.2 | VCN 1.0 | VCN 3.1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Video encoder | — | VCE 1.0 | VCE 2.0 | VCE 3.1 | — | VCE 2.0 | VCE 3.4 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AMD Fluid Motion | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
GPU power saving | PowerPlay | PowerTune | PowerPlay | PowerTune[8] | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
TrueAudio | — | [9] | ? | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
FreeSync | 1 2 |
1 2 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
HDCP[i] | ? | 1.4 | 2.2 | 2.3 | ? | 1.4 | 2.2 | 2.3 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PlayReady[i] | — | 3.0 not yet | — | 3.0 not yet | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Supported displays[j] | 2–3 | 2–4 | 3 | 3 (desktop) 4 (mobile, embedded) |
4 | 2 | 3 | 4 | 4 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
/drm/radeon [k][11][12] |
— | — | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
/drm/amdgpu [k][13] |
— | [14] | — | [14] |
- ^ For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.
- ^ A PC would be one node.
- ^ An APU combines a CPU and a GPU. Both have cores.
- ^ Requires firmware support.
- ^ a b Requires firmware support.
- ^ No SSE4. No SSSE3.
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Unified shaders : texture mapping units : render output units
- ^ a b To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
- ^ To feed more than two displays, the additional panels must have native DisplayPort support.[10] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
- ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.
Graphics API overview
editThe following table shows the graphics and compute APIs support across ATI/AMD GPU microarchitectures. Note that a branding series might include older generation chips.
Chip series | Microarchitecture | Fab | Supported APIs | AMD support | Year introduced | Introduced with | ||||
---|---|---|---|---|---|---|---|---|---|---|
Rendering | Computing / ROCm | |||||||||
Vulkan[15] | OpenGL[16] | Direct3D | HSA | OpenCL | ||||||
Wonder | Fixed-pipeline[a] | 1000 nm 800 nm |
— | — | — | — | — | Ended | 1986 | Graphics Solutions |
Mach | 800 nm 600 nm |
1991 | Mach8 | |||||||
3D Rage | 500 nm | 5.0 | 1996 | 3D Rage | ||||||
Rage Pro | 350 nm | 1.1 | 6.0 | 1997 | Rage Pro | |||||
Rage 128 | 250 nm | 1.2 | 1998 | Rage 128 GL/VR | ||||||
R100 | 180 nm 150 nm |
1.3 | 7.0 | 2000 | Radeon | |||||
R200 | Programmable pixel & vertex pipelines |
150 nm | 8.1 | 2001 | Radeon 8500 | |||||
R300 | 150 nm 130 nm 110 nm |
2.0[b] | 9.0 11 (FL 9_2) |
2002 | Radeon 9700 | |||||
R420 | 130 nm 110 nm |
9.0b 11 (FL 9_2) |
2004 | Radeon X800 | ||||||
R520 | 90 nm 80 nm |
9.0c 11 (FL 9_3) |
2005 | Radeon X1800 | ||||||
R600 | TeraScale 1 | 80 nm 65 nm |
3.3 | 10.0 11 (FL 10_0) |
ATI Stream | 2007 | Radeon HD 2900 XT | |||
RV670 | 55 nm | 10.1 11 (FL 10_1) |
ATI Stream APP[17] | Radeon HD 3850/3870 | ||||||
RV770 | 55 nm 40 nm |
1.0 | 2008 | Radeon HD 4850/4870 | ||||||
Evergreen | TeraScale 2 | 40 nm | 4.5 (Linux 4.2) [18][19][20][c] |
11 (FL 11_0) | 1.2 | 2009 | Radeon HD 5850/5870 | |||
Northern Islands | TeraScale 2 TeraScale 3 |
2010 | Radeon HD 6850/6870 Radeon HD 6950/6970 | |||||||
Southern Islands | GCN 1st gen | 28 nm | 1.0 | 4.6 | 11 (FL 11_1) 12 (FL11_1) |
1.2 2.0 possible |
2012 | Radeon HD 7950/7970 | ||
Sea Islands | GCN 2nd gen | 1.2 | 11 (FL 12_0) 12 (FL 12_0) |
2.0 (1.2 in MacOS, Linux) 2.1 Beta in Linux ROCm 2.2 possible |
2013 | Radeon HD 7790 | ||||
Volcanic Islands | GCN 3rd gen | 2014 | Radeon R9 285 | |||||||
Arctic Islands | GCN 4th gen | 28 nm 14 nm |
1.2
1.3 (GCN 4) |
Supported | 2016 | Radeon RX 480 | ||||
Polaris | 2017 | Radeon 520/530 Radeon RX 530/550/570/580 | ||||||||
Vega | GCN 5th gen | 14 nm 7 nm |
1.3 | 11 (FL 12_1) 12 (FL 12_1) |
2017 | Radeon Vega Frontier Edition | ||||
Navi | RDNA | 7 nm | 2019 | Radeon RX 5700 (XT) | ||||||
Navi 2X | RDNA 2 | 7 nm 6 nm |
11 (FL 12_1) 12 (FL 12_2) |
2020 | Radeon RX 6800 (XT) | |||||
Navi 3X | RDNA 3 | 6 nm 5 nm |
2022 | Radeon RX 7900 XT(X) |
- ^ Radeon 7000 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders.
- ^ These series do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power-of-two (NPOT) textures.
- ^ OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.
Desktop processors with 3D graphics
editAPU or Radeon Graphics branded
editLynx: "Llano" (2011)
edit- Socket FM1
- CPU: K10 (also Husky or K10.5) cores with an upgraded Stars architecture, no L3 cache
- GPU: TeraScale 2 (Evergreen); all A and E series models feature Redwood-class integrated graphics on die (BeaverCreek for the dual-core variants and WinterPark for the quad-core variants). Sempron and Athlon models exclude integrated graphics.[24]
- List of embedded GPU's
- Support for up to four DIMMs of up to DDR3-1866 memory
- Fabrication 32 nm on GlobalFoundries SOI process; Die size: 228 mm2, with 1.178 billion transistors[25][26]
- 5 GT/s UMI
- Integrated PCIe 2.0 controller
- Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
- Select models support Hybrid Graphics technology to assist a discrete Radeon HD 6450, 6570, or 6670 discrete graphics card. This is similar to the Hybrid CrossFireX technology available in the AMD 700 and 800 chipset series
Model[note 1] | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Box number | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Sempron X2 198 | 2012 | 32 nm SOI | LN-B0 | 2 (2) | 2.5 | — | 64 KB inst. 64 KB data per core |
2×512 KB | — | 1600 | 65 | SD198XOJGXBOX | SD198XOJZ22GX | |||
Athlon II X2 221 | 2012 | 2.8 | AD221XOJGXBOX | AD221XOJZ22GX | ||||||||||||
Athlon II X4 631 | 2012 | 4 (4) | 2.6 | 4×1 MB | 1866 | AD631XOJGXBOX | AD631XOJZ43GX | |||||||||
Aug 15, 2011 | 100 | AD631XOJGXBOX | AD631XWNZ43GX | |||||||||||||
Athlon II X4 638 | Feb 8, 2012 | 2.7 | 65 | AD638XOJGXBOX | AD638XOJZ43GX | |||||||||||
Athlon II X4 641 | Feb 8, 2012 | 2.8 | 100 | AD641XWNGXBOX | AD641XWNZ43GX | |||||||||||
Athlon II X4 651 | Nov 14, 2011 | 3.0 | AD651XWNGXBOX | AD651XWNZ43GX | ||||||||||||
Athlon II X4 651K | 2012 | AD651KWNGXBOX | AD651KWNZ43GX | |||||||||||||
E2-3200 | 2011 | 2 (2) | 2.4 | 2×512 KB | HD 6370D | 160:8:4 | 443 | 141.7 | 1600 | 65 | ED3200OJGXBOX | ED3200OJZ22GX ED3200OJZ22HX | ||||
A4-3300 | Sep 7, 2011 | 2.5 | HD 6410D | AD3300OJGXBOX AD3300OJHXBOX |
AD3300OJZ22GX AD3300OJZ22HX | |||||||||||
A4-3400 | Sep 7, 2011 | 2.7 | 600 | 192 | AD3400OJGXBOX AD3400OJHXBOX |
AD3400OJZ22GX AD3400OJZ22HX | ||||||||||
A4-3420 | Dec 20, 2011 | 2.8 | — | AD3420OJZ22HX | ||||||||||||
A6-3500 | Aug 17, 2011 | 3 (3) | 2.1 | 2.4 | 3×1 MB | HD 6530D | 320:16:8 | 443 | 283.5 | 1866 | AD3500OJGXBOX | AD3500OJZ33GX | ||||
A6-3600 | Aug 17, 2011 | 4 (4) | 4×1 MB | AD3600OJGXBOX | AD3600OJZ43GX | |||||||||||
A6-3620 | Dec 20, 2011 | 2.2 | 2.5 | AD3620OJGXBOX | AD3620OJZ43GX | |||||||||||
A6-3650 | Jun 30, 2011 | 2.6 | — | 100 | AD3650WNGXBOX | AD3650WNZ43GX | ||||||||||
A6-3670K | Dec 20, 2011 | 2.7 | AD3670WNGXBOX | AD3670WNZ43GX | ||||||||||||
A8-3800 | Aug 17, 2011 | 2.4 | 2.7 | HD 6550D | 400:20:8 | 600 | 480 | 65 | AD3800OJGXBOX | AD3800OJZ43GX | ||||||
A8-3820 | Dec 20, 2011 | 2.5 | 2.8 | AD3820OJGXBOX | AD3820OJZ43GX | |||||||||||
A8-3850 | Jun 30, 2011 | 2.9 | — | 100 | AD3850WNGXBOX | AD3850WNZ43GX | ||||||||||
A8-3870K | Dec 20, 2011 | 3.0 | AD3870WNGXBOX | AD3870WNZ43GX |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Models with "K" suffixes feature an unlocked multiplier and overclockable GPU.
Virgo: "Trinity" (2012)
edit- Fabrication 32 nm on GlobalFoundries SOI process
- Socket FM2
- CPU: Piledriver
- L1 Cache: 16 KB Data per core and 64 KB Instructions per module
- GPU TeraScale 3 (VLIW4)
- Die Size: 246 mm2, 1.303 Billion transistors[28]
- Support for up to four DIMMs of up to DDR3-1866 memory
- 5 GT/s UMI
- GPU (based on VLIW4 architecture) instruction support: DirectX 11, Opengl 4.2, DirectCompute, Pixel Shader 5.0, Blu-ray 3D, OpenCL 1.2, AMD Stream, UVD3
- Integrated PCIe 2.0 controller, and Turbo Core technology for faster CPU/GPU operation when the thermal specification permits
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
- Sempron and Athlon models exclude integrated graphics
- Select models support Hybrid Graphics technology to assist a Radeon HD 7350, 7450, 7470, 7550, 7570, 7670 discrete graphics card.[30][31] However, it has been found that this does not always improve 3D accelerated graphics performance.[32][33]
Model | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Box number | Part number[34] | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Sempron X2 240[35] | 32 nm | TN-A1 | [1]2 | 2.9 | 3.3 | 64 KB inst. per module 16 KB data per core |
1 MB | — | 1600 | 65 | SD240XOKA23HJ | |||||
Athlon X2 340[36] | Oct 2012 | 3.2 | 3.6 | AD340XOKA23HJ | ||||||||||||
Athlon X4 730 | Oct 1, 2012 | [2]4 | 2.8 | 3.2 | 2×2 MB | 1866 | AD730XOKA44HJ | |||||||||
Athlon X4 740 | Oct 2012 | 3.2 | 3.7 | AD740XOKHJBOX | AD740XOKA44HJ | |||||||||||
Athlon X4 750K | 3.4 | 4.0 | 100 | AD750KWOHJBOX | AD750KWOA44HJ | |||||||||||
FirePro A300 | Aug 7, 2012 | 3.4 | 4.0 | FirePro | 384:24:8 6 CU |
760 | 583.6 | 65 | AWA300OKA44HJ | |||||||
FirePro A320 | 3.8 | 4.2 | 800 | 614.4 | 100 | AWA320WOA44HJ | ||||||||||
A4-5300 | Oct 1, 2012 | [1]2 | 3.4 | 3.6 | 1 MB | HD 7480D | 128:8:4 2 CU |
723 | 185 | 1600 | 65 | AD5300OKHJBOX | AD5300OKA23HJ | |||
A4-5300B | Oct 2012 | AD530BOKA23HJ | ||||||||||||||
A6-5400K | Oct 1, 2012 | 3.6 | 3.8 | HD 7540D | 192:12:4 3 CU |
760 | 291.8 | 1866 | AD540KOKHJBOX | AD540KOKA23HJ | ||||||
A6-5400B | Oct 2012 | AD540BOKA23HJ | ||||||||||||||
A8-5500 | Oct 1, 2012 | [2]4 | 3.2 | 3.7 | 2×2 MB | HD 7560D | 256:16:8 4 CU |
760 | 389.1 | AD5500OKHJBOX | AD5500OKA44HJ | |||||
A8-5500B | Oct 2012 | AD550BOKA44HJ | ||||||||||||||
A8-5600K | Oct 1, 2012 | 3.6 | 3.9 | 100 | AD560KWOHJBOX | AD560KWOA44HJ | ||||||||||
A10-5700 | 3.4 | 4.0 | HD 7660D | 384:24:8 6 CU |
760 | 583.6 | 65 | AD5700OKHJBOX | AD5700OKA44HJ | |||||||
A10-5800K | 3.8 | 4.2 | 800 | 614.4 | 100 | AD580KWOHJBOX | AD580KWOA44HJ | |||||||||
A10-5800B | Oct 2012 | AD580BWOA44HJ |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Richland" (2013)
edit- Fabrication 32 nm on GlobalFoundries SOI process
- Socket FM2
- Two or four CPU cores based on the Piledriver microarchitecture
- GPU
- TeraScale 3 architecture
- HD Media Accelerator, AMD Hybrid Graphics
Model | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Box number | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Sempron X2 250[35] | 32 nm | RL-A1 | [1]2 | 3.2 | 3.6 | 64 KB inst. per module 16 KB data per core |
1 MB | — | 65 | SD250XOKA23HL | ||||||
Athlon X2 350[38] | 3.5 | 3.9 | 1866 | AD350XOKA23HL | ||||||||||||
Athlon X2 370K | Jun 2013 | 4.0 | 4.2 | AD370KOKHLBOX | AD370KOKA23HL | |||||||||||
Athlon X4 750 | Oct 2013 | [2]4 | 3.4 | 4.0 | 2×2 MB | AD750XOKA44HL | ||||||||||
Athlon X4 760K | Jun 2013 | 3.8 | 4.1 | 100 | AD760KWOHLBOX | AD760KWOA44HL | ||||||||||
FX-670K[39] | Mar 2014 (OEM) | 3.7 | 4.3 | 65 | FD670KOKA44HL | |||||||||||
A4-4000 | May 2013 | [1]2 | 3.0 | 3.2 | 1 MB | HD 7480D | 128:8:4 2 CU |
720 | 184.3 | 1333 | AD4000OKHLBOX | AD4000OKA23HL | ||||
A4-4020 | Jan 2014 | 3.2 | 3.4 | AD4020OKHLBOX | AD4020OKA23HL | |||||||||||
A4-6300 | Jul 2013 | 3.7 | 3.9 | HD 8370D | 760 | 194.5 | 1600 | AD6300OKHLBOX | AD6300OKA23HL | |||||||
A4-6300B | AD630BOKA23HL | |||||||||||||||
A4-6320 | Dec 2013 | 3.8 | 4.0 | AD6320OKHLBOX | AD6320OKA23HL | |||||||||||
A4-6320B | Mar 2014 | AD632BOKA23HL | ||||||||||||||
A4-7300 | Aug 2014 | HD 8470D | 192:12:4 3 CU |
800 | 307.2 | AD7300OKA23HL | ||||||||||
A4 Pro-7300B | AD730BOKA23HL | |||||||||||||||
A6-6400B | Jun 4, 2013 | 3.9 | 4.1 | 1866 | AD640BOKA23HL | |||||||||||
A6-6400K | AD640KOKHLBOX | AD640KOKA23HL | ||||||||||||||
A6-6420B | Jan 2014 | 4.0 | 4.2 | AD642BOKA23HL | ||||||||||||
A6-6420K | AD642KOKHLBOX | AD642KOKA23HL | ||||||||||||||
A8-6500T | Sep 18, 2013 | [2]4 | 2.1 | 3.1 | 2×2 MB | HD 8550D | 256:16:8 4 CU |
720 | 368.6 | 45 | AD650TYHHLBOX | AD650TYHA44HL | ||||
A8-6500 | Jun 4, 2013 | 3.5 | 4.1 | HD 8570D | 800 | 409.6 | 65 | AD6500OKHLBOX | AD6500OKA44HL | |||||||
A8-6500B | AD650BOKA44HL | |||||||||||||||
A8-6600K | 3.9 | 4.2 | 844 | 432.1 | 100 | AD660KWOHLBOX | AD660KWOA44HL | |||||||||
A10-6700T | Sep 18, 2013 | 2.5 | 3.5 | HD 8650D | 384:24:8 6 CU |
720 | 552.9 | 45 | AD670TYHHLBOX | AD670TYHA44HL | ||||||
A10-6700 | Jun 4, 2013 | 3.7 | 4.3 | HD 8670D | 844 | 648.1 | 65 | AD6700OKHLBOX | AD6700OKA44HL | |||||||
A10-6790B | Oct 29, 2013 | 4.0 | 100 | AD679KWOHLBOX | AD679KWOA44HL | |||||||||||
A10-6790K | Oct 28, 2013 | AD679BWOA44HL | ||||||||||||||
A10-6800K | Jun 4, 2013 | 4.1 | 4.4 | 2133 | AD680KWOHLBOX | AD680KWOA44HL | ||||||||||
A10-6800B | AD680BWOA44HL |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm by GlobalFoundries
- Socket AM1, aka Socket FS1b (AM1 platform)
- 2 to 4 CPU Cores (Jaguar (microarchitecture))
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- SoC with integrated memory, PCIe, 2× USB 3.0, 6× USB 2.0, Gigabit Ethernet, and 2× SATA III (6 Gb/s) controllers
- GPU based on Graphics Core Next (GCN)
Model | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Box number | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Athlon X4 530 | 28 nm | KB-A1 | 4 (4) | 2.00 | — | 32 KB inst. 32 KB data per core |
2 MB | — | 1600 single-channel |
25 | AD530XJAH44HM | |||||
Athlon X4 550 | 2.20 | AD550XJAH44HM | ||||||||||||||
Sempron 2650 | Apr 9, 2014 | 2 (2) | 1.45 | 1 MB | R3 (HD 8240) | 128:8:4 2 CU |
400 | 102.4 | 1333 single-channel |
SD2650JAHMBOX | SD2650JAH23HM | |||||
Sempron 3850 | 4 (4) | 1.30 | 2 MB | R3 (HD 8280) | 450 | 115.2 | 1600 single-channel |
SD3850JAHMBOX | SD3850JAH44HM | |||||||
Athlon 5150 | 1.60 | R3 (HD 8400) | 600 | 153.6 | AD5150JAHMBOX | AD5150JAH44HM | ||||||||||
Athlon 5350 | 2.05 | AD5350JAHMBOX | AD5350JAH44HM | |||||||||||||
Athlon 5370 | Feb 2016 | 2.20 | AD5370JAH44HM |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Kaveri" (2014) & "Godavari" (2015)
edit- Fabrication 28 nm by GlobalFoundries.
- Socket FM2+,[40] support for PCIe 3.0.
- Two or four CPU cores based on the Steamroller microarchitecture.
- Kaveri refresh models have codename Godavari.[41]
- Die Size: 245 mm2, 2.41 Billion transistors.[42]
- L1 Cache: 16 KB Data per core and 96 KB Instructions per module.
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
- Three to eight Compute Units (CUs) based on GCN 2nd gen microarchitecture;[43] 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs).
- Heterogeneous System Architecture-enabled zero-copy through pointer passing.
- SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio.[44]
- Dual-channel (2× 64 Bit) DDR3 memory controller.
- Integrated custom ARM Cortex-A5 co-processor[45] with TrustZone Security Extensions[46] in select APU models, except the Performance APU models.[47]
- Select models support Hybrid Graphics technology by using a Radeon R7 240 or R7 250 discrete graphics card.[48]
- Display controller: AMD Eyefinity 2, 4K Ultra HD support, DisplayPort 1.2 Support.[49]
Model | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Box number | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Athlon X2 450[38] | Jul 31, 2014 | 28 nm | KV-A1 | [1]2 | 3.5 | 3.9 | 96 KB inst. per module 16 KB data per core |
1 MB | — | 1866 | 65 | AD450XYBI23JA | ||||
Athlon X4 830 | 2018 | [2]4 | 3.0 | 3.4 | 2×2 MB | 2133 | AD830XYBI44JA | |||||||||
Athlon X4 840[38] | Aug 2014 | 3.1 | 3.8 | AD840XYBJABOX | AD840XYBI44JA | |||||||||||
Athlon X4 850 | 2015 | GV-A1 | 3.2 | AD835XACI43KA | ||||||||||||
Athlon X4 860K | Aug 2014 | KV-A1 | 3.7 | 4.0 | 95 | AD860KXBJABOX AD860KWOHLBOX AD860KXBJASBX |
AD860KXBI44JA | |||||||||
Athlon X4 870K | Dec 2015 | GV-A1 | 3.9 | 4.1 | AD870KXBJCSBX | AD870KXBI44JC | ||||||||||
Athlon X4 880K | Mar 1, 2016 | 4.0 | 4.2 | AD880KXBJCSBX | ||||||||||||
FX-770K[50] | Dec 2014 | KV-A1 | 3.5 | 3.9 | 65 | FD770KYBI44JA | ||||||||||
A4 Pro-7350B | Jul 31, 2014 | [1]2 | 3.4 | 3.8 | 1 MB | R5 | 192:12:8 3 CU |
514 | 197.3 | 1866 | AD735BYBI23JA | |||||
Pro A4-8350B | Sep 29, 2015 | 3.5 | 3.9 | 256:16:8 4 CU |
757 | 387.5 | AD835BYBI23JC | |||||||||
A6-7400K | Jul 31, 2014 | 3.5 | 3.9 | 756 | 387 | AD740KYBJABOX | AD740KYBI23JA | |||||||||
A6 Pro-7400B | AD740BYBI23JA | |||||||||||||||
A6-7470K | Feb 2, 2016 | GV-A1 | 3.7 | 4.0 | 800 | 409.6 | 2133 | AD747KYBJCBOX | AD747KYBI23JC | |||||||
Pro A6-8550B | Sep 29, 2015 | AD855BYBI23JC | ||||||||||||||
A8-7500[51][52] | 2014 | KV-A1 | [2]4 | 3.0 | 3.7 | 2×2 MB | R7 | 384:24:8 6 CU |
720 | 552.9 | AD7500YBI44JA | |||||
A8-7600 | Jul 31, 2014 | 3.1 | 3.8 | AD7600YBJABOX | AD7600YBI44JA | |||||||||||
A8 Pro-7600B | AD760BYBI44JA | |||||||||||||||
A8-7650K | Jan 7, 2015 | 3.3 | 95 | AD765KXBJABOX AD765KXBJASBX |
AD765KXBI44JA | |||||||||||
A8-7670K | Jul 20, 2015 | GV-A1 | 3.6 | 3.9 | 757 | 581.3 | AD767KXBJCSBX AD767KXBJCBOX |
AD767KXBI44JC | ||||||||
Pro A8-8650B | Sep 29, 2015 | 3.2 | 65 | AD865BYBI44JC | ||||||||||||
A10-7700K | Jan 14, 2014 | KV-A1 | 3.4 | 3.8 | 720 | 552.9 | 95 | AD770KXBJABOX | AD770KXBI44JA | |||||||
A10-7800 | Jul 31, 2014 | 3.5 | 3.9 | 512:32:8 8 CU |
737.2 | 65 | AD7800YBJABOX | AD7800YBI44JA | ||||||||
A10 Pro-7800B | AD780BYBI44JA | |||||||||||||||
A10-7850K | Jan 14, 2014 | 3.7 | 4.0 | 95 | AD785KXBJABOX | AD785KXBI44JA | ||||||||||
A10 Pro-7850B | Jul 31, 2014 | AD785BXBI44JA | ||||||||||||||
A10-7860K | Feb 2, 2016 | GV-A1 | 3.6 | 757 | 775.1 | 65 | AD786KYBJABOX AD786KYBJCSBX |
AD786KYBI44JC | ||||||||
A10-7870K | May 28, 2015 | 3.9 | 4.1 | 866 | 886.7 | 95 | AD787KXDJCBOX AD787KXDJCSBX |
AD787KXDI44JC | ||||||||
A10-7890K | Mar 1, 2016 | 4.1 | 4.3 | AD789KXDJCHBX | AD789KXDI44JC | |||||||||||
Pro A10-8750B | Sep 29, 2015 | 3.6 | 4.0 | 757 | 775.1 | 65 | AD875BYBI44JC | |||||||||
Pro A10-8850B | 3.9 | 4.1 | 800 | 819.2 | 95 | AD885BXBI44JC | ||||||||||
Model | Released | Fab | Step. | [Modules/FPUs] Cores/threads |
Base | Boost | L1 | L2 | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] |
DDR3 memory support |
TDP (W) |
Box number | Part number |
Clock rate (GHz) | Cache[a] | |||||||||||||||
CPU | GPU |
"Carrizo" (2016)
edit- Fabrication: 28 nm by GlobalFoundries
- Socket FM2+ or AM4, support for PCIe 3.0
- Two or four CPU cores based on the Excavator microarchitecture
- Die size: 250.04 mm2, 3.1 billion transistors[53]
- L1 cache: 32 KB data per core and 96 KB instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
- Single- or dual-channel DDR3 or DDR4 memory controller
- Third generation GCN-based GPU (Radeon M300)
- Integrated custom ARM Cortex-A5 coprocessor[45] with TrustZone security extensions[46][47]
Model | Released | Fab | Step. | Socket | CPU | GPU | Memory support |
TDP (W) |
Box number[a] | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[b] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[c] | |||||||||||
Base | Boost | L1 | L2 | ||||||||||||||
Athlon X4 835 | 28 nm | CZ-A1 | FM2+ | [2]4 | 3.1 | 96 KB inst. per module 32 KB data per core |
2×1 MB | — | DDR3-2133 | 65 | AD835XACI43KA | ||||||
Athlon X4 845 | Feb 2, 2016 | 3.5 | 3.8 | AD845XYBJCSBX AD845XACKASBX |
AD845XACI43KA | ||||||||||||
A6-7480[54] | Oct 2018 | [1]2 | 1 MB | R5 | 384:24:8 6 CU |
900 | 691.2 | AD7480ACABBOX | AD7480ACI23AB | ||||||||
A8-7680[55] | [2]4 | 2×1 MB | R7 | AD7680ACABBOX | AD7680ACI43AB | ||||||||||||
Pro A6-8570E | Oct 2016 | AM4 | [1]2 | 3.0 | 3.4 | 1 MB | R5 | 256:16:4 4 CU |
800 | 409.6 | DDR4-2400 | 35 | AD857BAHM23AB | ||||
Pro A6-8570 | 3.5 | 3.8 | 384:24:6 6 CU |
1029 | 790.2 | 65 | AD857BAGM23AB | ||||||||||
Pro A10-8770E | [2]4 | 2.8 | 3.5 | 2×1 MB | R7 | 847 | 650.4 | 35 | AD877BAHM44AB | ||||||||
Pro A10-8770 | 3.5 | 3.8 | 1029 | 790.2 | 65 | AD877BAGM44AB | |||||||||||
Pro A12-8870E | 2.9 | 512:32:8 8 CU |
900 | 921.6 | 35 | AD887BAHM44AB | |||||||||||
Pro A12-8870 | 3.7 | 4.2 | 1108 | 1134.5 | 65 | AD887BAUM44AB |
- ^ With cooler if available.
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Bristol Ridge" (2016)
edit- Fabrication 28 nm by GlobalFoundries
- Socket AM4, support for PCIe 3.0
- Two or four "Excavator+" CPU cores
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
- Dual-channel DDR4 memory controller
- PCI Express 3.0 x8 (No Bifurcation support, requires a PCI-e switch for any configuration other than x8)
- PCI Express 3.0 x4 as link to optional external chipset
- 4x USB 3.1 Gen 1
- Storage: 2x SATA and 2x NVMe or 2x PCI Express
- Third Generation GCN based GPU[56] with hybrid VP9 decoding
Model | Released | Fab | Step. | CPU | GPU | DDR4 memory support |
TDP (W) |
Box number[a] | Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[b] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[c] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
Athlon X4 940[57] | Jul 27, 2017 | 28 nm | BR-A1 | [2]4 | 3.2 | 3.6 | 96 KB inst. per module 32 KB data per core |
2×1 MB | — | 2400 | 65 | AD940XAGABBOX | AD940XAGM44AB | |||
Athlon X4 950[58] | 3.5 | 3.8 | AD950XAGABBOX | AD950XAGM44AB | ||||||||||||
Athlon X4 970[59] | 3.8 | 4.0 | AD970XAUABBOX | AD970XAUM44AB | ||||||||||||
A6-9400[60] | Mar 16, 2019 | [1]2 | 3.4 | 3.7 | 1 MB | R5 | 192:12:4 3 CU |
720 | 276.4 | AD9400AGABBOX | AD9400AGM23AB | |||||
A6-9500E[61] | Sep 5, 2016 | 3.0 | 3.4 | 256:16:4 4 CU |
800 | 409.6 | 35 | AD9500AHABBOX | AD9500AHM23AB | |||||||
Pro A6-9500E[62] | Oct 3, 2016 | AD950BAHM23AB | ||||||||||||||
A6-9500[63] | Sep 5, 2016 | 3.5 | 3.8 | 384:24:6 6 CU |
1029 | 790.2 | 65 | AD9500AGABBOX | AD9500AGM23AB | |||||||
Pro A6-9500[64] | Oct 3, 2016 | AD950BAGM23AB | ||||||||||||||
A6-9550[65] | Jul 27, 2017 | 3.8 | 4.0 | 256:16:4 4 CU |
800 | 409.6 | AD9550AGABBOX | AD9550AGM23AB | ||||||||
A8-9600[66] | Sep 5, 2016 | [2]4 | 3.1 | 3.4 | 2×1 MB | R7 | 384:24:6 6 CU |
900 | 691.2 | AD9600AGABBOX | AD9600AGM44AB | |||||
Pro A8-9600[67] | Oct 3, 2016 | AD960BAGM44AB | ||||||||||||||
A10-9700E[68] | Sep 5, 2016 | 3.0 | 3.5 | 847 | 650.4 | 35 | AD9700AHABBOX | AD9700AHM44AB | ||||||||
Pro A10-9700E[69] | Oct 3, 2016 | AD970BAHM44AB | ||||||||||||||
A10-9700[70] | Sep 5, 2016 | 3.5 | 3.8 | 1029 | 790.2 | 65 | AD9700AGABBOX | AD9700AGM44AB | ||||||||
Pro A10-9700[71] | Oct 3, 2016 | AD970BAGM44AB | ||||||||||||||
A12-9800E[72] | Sep 5, 2016 | 3.1 | 3.8 | 512:32:8[73] 8 CU |
900 | 921.6 | 35 | AD9800AHABBOX | AD9800AUM44AB | |||||||
Pro A12-9800E[74] | Oct 3, 2016 | AD980BAHM44AB | ||||||||||||||
A12-9800[75] | Sep 5, 2016 | 3.8 | 4.2 | 1108 | 1134.5 | 65 | AD9800AUABBOX | AD9800AUM44AB | ||||||||
Pro A12-9800[76] | Oct 3, 2016 | AD980BAUM44AB |
- ^ With cooler if available.
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Raven Ridge" (2018)
edit- Fabrication 14 nm by GlobalFoundries
- Transistors: 4.94 billion
- Die size: 210 mm²
- Socket AM4
- Zen CPU cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual-channel DDR4 memory controller
- Fifth generation GCN based GPU
- Video Core Next (VCN) 1.0
Common features of Zen based Raven Ridge desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-2666 (DDR4-2933 Ryzen) in dual-channel mode.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 14LP.
Model | CPU | GPU | TDP | Release date |
Release price | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Model | Config[i] | Clock (MHz) |
Processing power (GFLOPS)[ii] | |||||
Base | Boost | ||||||||||
Athlon 200GE | 2 (4) | 3.2 | — | 4 MB | Vega 3 | 192:12:4 3 CU |
1000 | 384 | 35 W | Sep 6, 2018 | US $55[77] |
Athlon Pro 200GE | OEM | ||||||||||
Athlon 220GE | 3.4 | Dec 21, 2018 | US $65[78] | ||||||||
Athlon 240GE | 3.5 | US $75[78] | |||||||||
Athlon 300GE | 3.4 | 1100 | 424.4 | Jul 7, 2019 | OEM | ||||||
Athlon Pro 300GE | Sep 30, 2019 | ||||||||||
Athlon 320GE | 3.5 | Jul 7, 2019 | |||||||||
Athlon 3000G | Nov 19, 2019 | US $49[79] | |||||||||
Athlon Silver 3050GE | 3.4 | Jul 21, 2020 | OEM | ||||||||
Ryzen 3 Pro 2100GE[80] | 3.2 | 1000 | 384 | 2019 | |||||||
Ryzen 3 2200GE | 4 (4) | 3.6 | Vega 8 | 512:32:16 8 CU |
1100 | 1126 | Apr 19, 2018 | ||||
Ryzen 3 Pro 2200GE | May 10, 2018 | ||||||||||
Ryzen 3 2200G | 3.5 | 3.7 | 65 W | Feb 12, 2018 | US $99[81] | ||||||
Ryzen 3 Pro 2200G | May 10, 2018 | OEM | |||||||||
Ryzen 5 2400GE | 4 (8) | 3.2 | 3.8 | RX Vega 11 | 704:44:16 11 CU |
1250 | 1760 | 35 W | Apr 19, 2018 | ||
Ryzen 5 Pro 2400GE | Vega 11 | May 10, 2018 | |||||||||
Ryzen 5 2400G | 3.6 | 3.9 | RX Vega 11 | 65 W | Feb 12, 2018 | US $169[81] | |||||
Ryzen 5 Pro 2400G | Vega 11 | May 10, 2018 | OEM |
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Picasso" (2019)
edit- Fabrication 12 nm by GlobalFoundries
- Transistors: 4.94 billion
- Die size: 210 mm²
- Socket AM4
- Zen+ CPU cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual-channel DDR4 memory controller
- Fifth generation GCN based GPU
- Video Core Next (VCN) 1.0
Common features of Zen+ based desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-2933 in dual-channel mode, while Athlon Pro 300GE and Athlon Silver Pro 3125GE support only DDR4-2666.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 12LP.
Model | CPU | GPU | TDP | Release date |
Release price | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Model[i] | Config[ii] | Clock (MHz) |
Processing power (GFLOPS)[iii] | |||||
Base | Boost | ||||||||||
Athlon Pro 300GE | 2 (4) | 3.4 | — | 4 MB | Vega 3 | 192:12:4 3 CU |
1100 | 424.4 | 35 W | Sep 30, 2019 | OEM |
Athlon Silver Pro 3125GE | Radeon Graphics |
Jul 21, 2020 | |||||||||
Athlon Gold 3150GE | 4 (4) | 3.3 | 3.8 | ||||||||
Athlon Gold Pro 3150GE | |||||||||||
Athlon Gold 3150G | 3.5 | 3.9 | 65 W | ||||||||
Athlon Gold Pro 3150G | |||||||||||
Ryzen 3 3200GE | 3.3 | 3.8 | Vega 8 | 512:32:16 8 CU |
1200 | 1228.8 | 35 W | Jul 7, 2019 | |||
Ryzen 3 Pro 3200GE | Sep 30, 2019 | ||||||||||
Ryzen 3 3200G | 3.6 | 4.0 | 1250 | 1280 | 65 W | Jul 7, 2019 | US $99[85] | ||||
Ryzen 3 Pro 3200G | Sep 30, 2019 | OEM | |||||||||
Ryzen 5 Pro 3350GE | 3.3 | 3.9 | Radeon Graphics |
640:40:16 10 CU |
1200 | 1536 | 35 W | Jul 21, 2020 | |||
Ryzen 5 Pro 3350G | 4 (8) | 3.6 | 4.0 | 1300 | 1830.4 | 65 W | |||||
Ryzen 5 3400GE | 3.3 | Vega 11 | 704:44:16 11 CU |
35 W | Jul 7, 2019 | ||||||
Ryzen 5 Pro 3400GE | Sep 30, 2019 | ||||||||||
Ryzen 5 3400G | 3.7 | 4.2 | RX Vega 11 | 1400 | 1971.2 | 65 W | Jul 7, 2019 | US $149[85] | |||
Ryzen 5 Pro 3400G | Vega 11 | Sep 30, 2019 | OEM |
- ^ Starting with 2020 releases, AMD stopped referring to integrated graphics as "Vega", therefore all Vega based iGPUs are branded as AMD Radeon Graphics (instead Radeon Vega 3 or Radeon Vega 10).[82][83][84]
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Renoir" (2020)
edit- Fabrication 7 nm by TSMC
- Socket AM4
- Up to eight Zen 2 CPU cores
- Dual-channel DDR4 memory controller
Common features of Ryzen 4000 desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-3200 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
Branding and model | CPU | GPU | TDP | Release date |
Release price | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core Config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power[iii] (GFLOPS) | ||||||
Base | Boost | ||||||||||||
Ryzen 7 | 4700G[a] | 8 (16) | 3.6 | 4.4 | 8 MB | 2 × 4 | Radeon Graphics[b] |
2.1 | 512:32:16 8 CU |
2150.4 | 65 W | Jul 21, 2020 | OEM |
4700GE[a] | 3.1 | 4.3 | 2.0 | 2048 | 35 W | ||||||||
Ryzen 5 | 4600G[a][86] | 6 (12) | 3.7 | 4.2 | 2 × 3 | 1.9 | 448:28:14 7 CU |
1702.4 | 65 W | Jul 21, 2020 (OEM) / Apr 4, 2022 (retail) |
OEM / US $154 | ||
4600GE[a] | 3.3 | 35 W | Jul 21, 2020 | OEM | |||||||||
Ryzen 3 | 4300G[a] | 4 (8) | 3.8 | 4.0 | 4 MB | 1 × 4 | 1.7 | 384:24:12 6 CU |
1305.6 | 65 W | |||
4300GE[a] | 3.5 | 35 W |
- ^ Core complexes (CCXs) × cores per CCX
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Cezanne" (2021)
edit- Fabrication 7 nm by TSMC
- Socket AM4
- Up to eight Zen 3 CPU cores
- Dual-channel DDR4 memory controller
Common features of Ryzen 5000 desktop APUs:
- Socket: AM4.
- All the CPUs support DDR4-3200 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
Branding and model | CPU | GPU[a] | Thermal solution |
TDP | Release date |
MSRP | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Clock (MHz) |
Config[ii] | Processing power[iii] (GFLOPS) | |||||||
Base | Boost | ||||||||||||
Ryzen 7 | 5700G[b] | 8 (16) | 3.8 | 4.6 | 16 MB | 1 × 8 | 2000 | 512:32:8 8 CU |
2048 | Wraith Stealth | 65 W | Apr 13, 2021 (OEM), Aug 5, 2021 (retail) |
US $359 |
5700GE[b] | 3.2 | 35 W | Apr 13, 2021 | OEM | |||||||||
Ryzen 5 | 5600GT | 6 (12) | 3.6 | 1 × 6 | 1900 | 448:28:8 7 CU |
1702.4 | 65 W | Jan 31, 2024[94] | US $140 | |||
5600G[b] | 3.9 | 4.4 | Apr 13, 2021 (OEM), Aug 5, 2021 (retail) |
US $259 | |||||||||
5600GE[b] | 3.4 | 35 W | Apr 13, 2021 | OEM | |||||||||
5500GT | 3.6 | 65 W | Jan 31, 2024[94] | US $125 | |||||||||
Ryzen 3 | 5300G[b] | 4 (8) | 4.0 | 4.2 | 8 MB | 1 × 4 | 1700 | 384:24:8 6 CU |
1305.6 | OEM | Apr 13, 2021 | OEM | |
5300GE[b] | 3.6 | 35 W |
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Non APU or Radeon Graphics branded
edit"Raphael" (2022)
edit- Fabrication 5 nm (CCD) and 6 nm (cIOD) by TSMC
- Socket AM5
- Up to sixteen Zen 4 CPU cores
- Dual-channel DDR5 memory controller
- Basic iGPU
Common features of Ryzen 7000 desktop CPUs:
- Socket: AM5.
- All the CPUs support DDR5-5200 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 1 MB per core.
- All the CPUs support 28 PCIe 5.0 lanes. 4 of the lanes are reserved as link to the chipset.
- Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost).[i] Models with "F" suffixes are without iGPUs.
- Fabrication process: TSMC N5 FinFET (N6 FinFET for the I/O die).
Branding and model | Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Thermal solution |
Chiplets | Core config[ii] |
TDP | Release date |
MSRP | ||
---|---|---|---|---|---|---|---|---|---|---|---|
Base | Boost | ||||||||||
Ryzen 9 | 7950X3D | 16 (32) | 4.2 | 5.7 | 128 MB[iii] | — | 2 × CCD 1 × I/OD |
2 × 8 | 120 W | Feb 28, 2023 | US $699 |
7950X | 4.5 | 64 MB | 170 W | Sep 27, 2022 | |||||||
7900X3D | 12 (24) | 4.4 | 5.6 | 128 MB[iii] | 2 × 6 | 120 W | Feb 28, 2023 | US $599 | |||
7900X | 4.7 | 64 MB | 170 W | Sep 27, 2022 | US $549 | ||||||
7900 | 3.7 | 5.4 | Wraith Prism | 65 W | Jan 10, 2023 | US $429[104] | |||||
PRO 7945 | Wraith Spire | Jun 13, 2023 | OEM | ||||||||
Ryzen 7 | 7800X3D | 8 (16) | 4.2 | 5.0 | 96 MB | — | 1 × CCD 1 × I/OD |
1 × 8 | 120 W | Apr 6, 2023 | US $449 |
7700X | 4.5 | 5.4 | 32 MB | 105 W | Sep 27, 2022 | US $399 | |||||
7700 | 3.8 | 5.3 | Wraith Prism | 65 W | Jan 10, 2023 | US $329[104] | |||||
PRO 7745 | Wraith Spire | Jun 13, 2023 | OEM | ||||||||
Ryzen 5 | 7600X3D[105][106] | 6 (12) | 4.1 | 4.7 | 96 MB | — | 1 × 6 | Aug 31, 2024[iv] | US $299 | ||
7600X | 4.7 | 5.3 | 32 MB | 105 W | Sep 27, 2022 | ||||||
7600 | 3.8 | 5.1 | Wraith Stealth | 65 W | Jan 10, 2023 | US $229[104] | |||||
PRO 7645 | Wraith Spire | Jun 13, 2023 | OEM | ||||||||
7500F | 3.7 | 5.0 | Wraith Stealth | Jul 22, 2023 | US $179[107] |
- ^ Self identifies as "AMD Radeon Graphics". See RDNA 2 § Integrated graphics processors (iGPs).
- ^ Core Complexes (CCX) × cores per CCX
- ^ a b Only one of the two CCXes has additional 64 MB 3D V-Cache.[102] Only the CCX without 3D V-Cache will be able to reach the maximum boost clocks. The CCX with 3D V-Cache will clock lower.[103]
- ^ Release date for US, where it is only sold though MicroCenter.[105] In Europe it is only available in Germany, and only through MindFactory, which released it on September 5, 2024.[106]
Server APUs
editOpteron X2100-series "Kyoto" (2013) & "Steppe Eagle" (2016)
edit- Fabrication 28 nm
- Socket FT3 (BGA)
- 4 CPU Cores (Jaguar & Puma microarchitecture)
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- Single-channel DDR3 memory controller
- Turbo Dock Technology, C6 and CC6 low power states
- GPU based on 2nd generation Graphics Core Next (GCN) architecture
Model | Released | Fab | Step. | CPU | GPU | DDR3 memory support |
TDP (W) |
Part number | Release price (USD) | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock (GHz) |
Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | |||||||||
L1 | L2 | ||||||||||||||
X1150[108] | May 29, 2013[109] | 28 nm | 4 (4) | 2.0 | 32 KB inst. 32 KB data per core |
2 MB | — | 1600 | 9–17 | OX1150IPJ44HM | $64 | ||||
X2150 | 1.9 | R3 (HD 8400) | 128:8:4 2 CU |
266–600 | 28.9 | 11–22 | OX2150IAJ44HM | $99 | |||||||
X2170 | Sep 1, 2016 | 2.4 | R5 | 655–800 | 153.6 | 1866 | 11–25 | OX2170IXJ44JB |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Opteron X3000-series "Toronto" (2017)
edit- Fabrication 28 nm
- Socket FP4 (BGA)
- Two or Four CPU cores based on the Excavator microarchitecture[110][111]
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
- Dual-channel DDR4 memory controller
- GPU based on 3rd generation Graphics Core Next (GCN) architecture
Model | Released | Fab | Step. | CPU | GPU | DDR4 memory support |
TDP (W) |
Part number | Release price (USD) | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock rate (GHz) | Cache[a] | Model | Config | Clock (MHz) |
Processing power (GFLOPS)[b] | ||||||||||
Base | Boost | L1 | L2 | |||||||||||||
X3216[111][112] | June 2017 | 28 nm | 01h | [1]2 | 1.6 | 3.0 | 96 KB inst. per module 32 KB data per core |
1 MB | R5 | 256:16:4 4 CU |
800 | 409.6 | 1600 | 12–15 | OX3216AAY23KA | OEM for HP |
X3418[111][113] | [2]4 | 1.8 | 3.2 | 2 MB | R6 | 384:24:6 6 CU |
614.4 | 2400 | 12–35 | OX3418AAY43KA | ||||||
X3421[111][114] | June 2017 | 2.1 | 3.4 | R7 | 512:32:8 8 CU |
819.2 | OX3421AAY43KA |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Mobile processors with 3D graphics
editAPU or Radeon Graphics branded
editSabine: "Llano" (2011)
edit- Fabrication 32 nm on GlobalFoundries SOI process
- Socket FS1
- Upgraded Stars (AMD 10h architecture) codenamed Husky CPU cores (K10.5) with no L3 cache, and with Redwood-class integrated graphics on die
- L1 Cache: 64 KB Data per core and 64 KB Instructions per core(BeaverCreek for the dual-core variants and WinterPark for the quad-core variants)
- Integrated PCIe 2.0 controller
- GPU: TeraScale 2
- Select models support Turbo Core technology for faster CPU operation when the thermal specification permits
- Support for 1.35 V DDR3L-1333 memory, in addition to regular 1.5 V DDR3 memory specified
- 2.5 GT/s UMI
- MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
- PowerNow!
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
GFLOPS[b] | |||||||||
L1 | L2 | L3 | ||||||||||||||
E2-3000M | 2011
6/14 |
32 nm | B0 | 2 (2) | 1.8 | 2.4 | 64 KB inst. 64 KB data per core |
2× 512KB | — | HD 6380G | 160:8:4 | 400 | 128 | 1333 | 35 | EM3000DDX22GX |
A4-3300M | 2011
6/14 |
1.9 | 2.5 | 2× 1MB | HD 6480G | 240:12:4 | 444 | 213.1 | 35 | AM3300DDX23GX | ||||||
A4-3305M | December 7, 2011 | 2× 512KB | 160:8:4 | 593 | 189.7 | AM3305DDX22GX | ||||||||||
A4-3310MX | 2011
6/14 |
2.1 | 2× 1MB | 240:12:4 | 444 | 213.1 | 45 | AM3310HLX23GX | ||||||||
A4-3320M | December 7, 2011 | 2.0 | 2.6 | 35 | AM3320DDX23GX | |||||||||||
A4-3330MX | 2.2 | 45 | AM3330HLX23GX | |||||||||||||
A4-3330MX | 2.3 | 2× 512KB | 160:8:4 | 593 | 189.7 | AM3330HLX23HX | ||||||||||
A6-3400M | 2011
6/14 |
4 (4) | 1.4 | 2.3 | 4× 1MB | HD 6520G | 320:16:8 | 400 | 256 | 35 | AM3400DDX43GX | |||||
A6-3410MX | 1.6 | 1600 | 45 | AM3410HLX43GX | ||||||||||||
A6-3420M | December 7, 2011 | 1.5 | 2.4 | 1333 | 35 | AM3420DDX43GX | ||||||||||
A6-3430MX | 1.7 | 1600 | 45 | AM3430HLX43GX | ||||||||||||
A8-3500M | 2011
6/14 |
1.5 | 2.4 | HD 6620G | 400:20:8 | 444 | 355.2 | 1333 | 35 | AM3500DDX43GX | ||||||
A8-3510MX | 1.8 | 2.5 | 1600 | 45 | AM3510HLX43GX | |||||||||||
A8-3520M | December 7, 2011 | 1.6 | 1333 | 35 | AM3520DDX43GX | |||||||||||
A8-3530MX | 2011
6/14 |
1.9 | 2.6 | 1600 | 45 | AM3530HLX43GX | ||||||||||
A8-3550MX | December 7, 2011 | 2.0 | 2.7 | AM3550HLX43GX |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Comal: "Trinity" (2012)
edit- Fabrication 32 nm on GlobalFoundries SOI process
- Socket FS1r2, FP2
- Based on the Piledriver architecture
- L1 Cache: 16 KB Data per core and 64 KB Instructions per module
- GPU: TeraScale 3 (VLIW4)
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
- Memory support: 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3 memory specified (Dual-channel)
- 2.5 GT/s UMI
- Transistors: 1.303 billion
- Die size: 246 mm²
Model number | Released | Fab | Step. | Socket | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Turbo
(MHz) |
GFLOPS[b] | |||||||||
L1 | L2
(MB) | ||||||||||||||||
A4-4355M | September 27, 2012 | 32 nm | TN-A1 | FP2 | [1]2 | 1.9 | 2.4 | 64 KB inst. per module 16 KB data per core |
1 | HD 7400G | 192:12:4 3 CU |
327 | 424 | 125.5 | 1333 | 17 | AM4355SHE23HJ |
A6-4455M | May 15, 2012 | 2.1 | 2.8 | 2 | HD 7500G | 256:16:8 4 CU |
167.4 | AM4455SHE24HJ | |||||||||
A8-4555M | September 27, 2012 | [2]4 | 1.6 | 2.4 | 2×
2MB |
HD 7600G | 384:24:8 6 CU |
320 | 245.7 | 19 | AM4555SHE44HJ | ||||||
A8-4557M[115] | Mar
2013 |
1.9 | 2.8 | HD 7000 | 256:16:8 4 CU |
497 | 655 | 254.4 | (L)1600 | 35 | AM4557DFE44HJ | ||||||
A10-4655M | May 15, 2012 | 2.0 | 2.8 | HD 7620G | 384:24:8 6 CU |
360 | 496 | 276.4 | 1333 | 25 | AM4655SIE44HJ | ||||||
A10-4657M[115] | Mar
2013 |
2.3 | 3.2 | HD 7000 | 497 | 686 | 381.6 | (L)1600 | 35 | AM4657DFE44HJ | |||||||
A4-4300M | May 15, 2012 | FS1r2 | [1]2 | 2.5 | 3.0 | 1 | HD 7420G | 128:8:4 2 CU |
480 | 655 | 122.8 | 1600 | AM4300DEC23HJ | ||||
A6-4400M | 2.7 | 3.2 | HD 7520G | 192:12:4 3 CU |
496 | 685 | 190.4 | AM4400DEC23HJ | |||||||||
A8-4500M | [2]4 | 1.9 | 2.8 | 2×
2MB |
HD 7640G | 256:16:8 4 CU |
253.9 | AM4500DEC44HJ | |||||||||
A10-4600M | 2.3 | 3.2 | HD 7660G | 384:24:8 6 CU |
380.9 | AM4600DEC44HJ |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs
"Richland" (2013)
edit- Fabrication 32 nm on GlobalFoundries SOI process
- Socket FS1r2, FP2
- Elite Performance APU.[116][117]
- CPU: Piledriver architecture
- L1 Cache: 16 KB Data per core and 64 KB Instructions per module
- GPU: TeraScale 3 (VLIW4)
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
Model number | Released | Fab | Step. | Socket | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Turbo
(MHz) |
GFLOPS[b] | |||||||||
L1 | L2
(MB) | ||||||||||||||||
A4-5145M | 2013/5 | 32 nm | RL-A1 | FP2 | [1]2 | 2.0 | 2.6 | 64 KB inst. per module 16 KB data per core |
1 | HD 8310G | 128:8:4 2 CU |
424 | 554 | 108.5 | (L)1333 | 17 | AM5145SIE44HL |
A6-5345M | 2.2 | 2.8 | HD 8410G | 192:12:4 3 CU |
450 | 600 | 172.8 | AM5345SIE44HL | |||||||||
A8-5545M | [2]4 | 1.7 | 2.7 | 4 | HD 8510G | 384:28:8 6 CU |
554 | 345.6 | 19 | AM5545SIE44HL | |||||||
A10-5745M | 2.1 | 2.9 | HD 8610G | 533 | 626 | 409.3 | 25 | AM5745SIE44HL | |||||||||
A4-5150M | 2013 Q1 | FS1r2 | [1]2 | 2.7 | 3.3 | 1 | HD 8350G | 128:8:4 2 CU |
533 | 720 | 136.4 | 1600 | 35 | AM5150DEC23HL | |||
A6-5350M | 2.9 | 3.5 | HD 8450G | 192:12:4 3 CU |
204.6 | AM5350DEC23HL | |||||||||||
A6-5357M | 2013/5 | FP2 | (L)1600 | AM5357DFE23HL | |||||||||||||
A8-5550M | 2013 Q1 | FS1r2 | [2]4 | 2.1 | 3.1 | 4 | HD 8550G | 256:16:8 4 CU |
515 | 263.6 | 1600 | AM5550DEC44HL | |||||
A8-5557M | 2013/5 | FP2 | 554 | 283.6 | (L)1600 | AM5557DFE44HL | |||||||||||
A10-5750M | 2013 Q1 | FS1r2 | 2.5 | 3.5 | HD 8650G | 384:24:8 6 CU |
533 | 409.3 | 1866 | AM5750DEC44HL | |||||||
A10-5757M | 2013/5 | FP2 | 600 | 460.8 | (L)1600 | AM5757DFE44HL |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs
"Kaveri" (2014)
edit- Fabrication 28 nm
- Socket FP3
- Up to 4 Steamroller x86 CPU cores with 4 MB of L2 cache.[118]
- L1 Cache: 16 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, ABM, BMI1, TBM, Turbo Core
- Three to eight Compute Units (CUs) based on Graphics Core Next (GCN)[43] microarchitecture; 1 Compute Unit (CU) consists of 64 Unified Shader Processors : 4 Texture Mapping Units (TMUs) : 1 Render Output Unit (ROPs)
- AMD Heterogeneous System Architecture (HSA) 2.0
- SIP blocks: Unified Video Decoder, Video Coding Engine, TrueAudio[44]
- Dual-channel (2x64-bit) DDR3 memory controller
- Integrated custom ARM Cortex-A5 co-processor[45] with TrustZone Security Extensions[46]
Model number | Released | Fab | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Turbo
(MHz) |
GFLOPS[b] | |||||||
L1 | L2
(MB) | ||||||||||||||
A6-7000 | June 2014 | 28 nm | [1]2 | 2.2 | 3.0 | 96 KB inst. per module 16 KB data per core |
1 | R4 | 192:12:3 3 CU |
494 | 533 | 189.6 | 1333 | 17 | AM7000ECH23JA |
A6 PRO - 7050B | 533 | — | 204.6 | 1600 | AM705BECH23JA | ||||||||||
A8-7100 | [2]4 | 1.8 | 3.0 | 2× 2 MB | R5 | 256:16:4 4 CU |
450 | 514 | 230.4 | 1600 | 20 | AM7100ECH44JA | |||
A8 PRO - 7150B | 1.9 | 3.2 | 553 | — | 283.1 | AM715BECH44JA | |||||||||
A10-7300 | R6 | 384:24:8 6 CU |
464 | 533 | 356.3 | AM7300ECH44JA | |||||||||
A10 PRO - 7350B | 2.1 | 3.3 | 533 | — | 424.7 | AM735BECH44JA | |||||||||
FX-7500 | R7 | 498 | 553 | 382.4 | FM7500ECH44JA | ||||||||||
A8-7200P | 2.4 | 3.3 | R5 | 256:16:4 4 CU |
553 | 626 | 283.1 | 1866 | 35 | AM740PDGH44JA | |||||
A10-7400P | 2.5 | 3.4 | R6 | 384:24:8 6 CU |
576 | 654 | 442.3 | AM740PDGH44JA | |||||||
FX-7600P | 2.7 | 3.6 | R7 | 512:32:8 8 CU |
600 | 686 | 614.4 | 2133 | FM760PDGH44JA |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Carrizo" (2015)
edit- Fabrication 28 nm
- Socket FP4
- Up to 4 Excavator x86 CPU cores
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
- GPU based on Graphics Core Next 1.2
Model number | Released | Fab | CPU | GPU | DDR
Memory |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
GFLOPS[b] | |||||||
L1 | L2
(MB) | |||||||||||||
A6-8500P | June 2015 | 28 nm | [1]2 | 1.6 | 3.0 | 96 KB inst. per module 32 KB data per core |
1 | R5 | 256:16:4 4 CU |
800 | 409.6 | 3)1600 | 12-
35 |
AM850PAAY23KA |
PRO A6-8500B | AM850BAAY23KA | |||||||||||||
PRO A6-8530B | Q3 2016 | 2.3 | 3.2 | 4)1866 | AM853BADY23AB | |||||||||
A8-8600P | June 2015 | [2]4 | 1.6 | 3.0 | 2×
1MB |
R6 | 384:24:8 6 CU |
720 | 552.9 | 3)2133 | AM860PAAY43KA | |||
PRO A8-8600B | AM860BAAY43KA | |||||||||||||
A10-8700P | 1.8 | 3.2 | 800 | 614.4 | AM870PAAY43KA | |||||||||
PRO A10-8700B | AM870BAAY43KA | |||||||||||||
PRO A10-8730B | Q3 2016 | 2.4 | 3.3 | R5 | 720 | 552.9 | 4)1866 | AM873BADY44AB | ||||||
A10-8780P | December 2015 | 2.0 | 3.3 | R8 | 512:32:8 8 CU |
3)? | AM878PAIY43KA | |||||||
FX-8800P | June 2015 | 2.1 | 3.4 | R7 | 800 | 819.2 | 4)2133 | FM880PAAY43KA | ||||||
PRO A12-8800B | FM880BAAY43KA | |||||||||||||
PRO A12-8830B | Q3 2016 | 2.5 | 3.4 | 384:24:8 6 CU |
758 | 582.1 | 4)1866 | AM883BADY44AB |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Bristol Ridge" (2016)
edit- Fabrication 28 nm
- Socket FP4[119]
- Two or four "Excavator+" x86 CPU cores
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
- GPU based on Graphics Core Next 1.2 with VP9 decoding
Model number | Released | Fab | CPU | GPU | DDR4
Memory |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
GFLOPS[b] | |||||||
L1 | L2
(MB) | |||||||||||||
Pro A6-9500B | October 24, 2016 | 28nm | [1]2 | 2.3 | 3.2 | 96 KB inst. per module 32 KB data per core |
1 | R5 | 256:16:4 4 CU |
800 | 409.6 | 1866 | 12-
15 |
|
Pro A8-9600B | October 24, 2016 | [2]4 | 2.4 | 3.3 | 2× 1 MB | R5 | 384:24:6 6 CU |
720 | 552.9 | 1866 | 12–
15 |
|||
A10-9600P | June 2016 | AM960PADY44AB | ||||||||||||
A10-9620P[120] | 2017 (OEM) | 2.5 | 3.4 | 758 | 582.1 | |||||||||
Pro A10-9700B | October 24, 2016 | R7 | ||||||||||||
A12-9700P | June 2016 | AM970PADY44AB | ||||||||||||
Pro A8-9630B | October 24, 2016 | 2.6 | 3.3 | R5 | 800 | 614.4 | 2400 | 25–
45 |
||||||
A10-9630P | June 2016 | AM963PAEY44AB | ||||||||||||
Pro A10-9730B | October 24, 2016 | 2.8 | 3.5 | R7 | 900 | 691.2 | ||||||||
A12-9730P | June 2016 | AM973PAEY44AB | ||||||||||||
Pro A12-9800B | October 24, 2016 | 2.7 | 3.6 | R7 | 512:32:8 8 CU |
758 | 776.1 | 1866 | 12–
15 |
|||||
[1] FX-9800P A12-9720P[121][122] |
June 2016 2017 (OEM) |
FM980PADY44AB ? | ||||||||||||
Pro A12-9830B | October 24, 2016 | 3.0 | 3.7 | 900 | 921.6 | 2400 | 25–
45 |
|||||||
FX-9830P | June 2016 | FM983PAEY44AB |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Raven Ridge" (2017)
edit- Fabrication 14 nm by GlobalFoundries
- Transistors: 4.94 billion
- Socket FP5
- Die size: 210 mm²
- Zen CPU cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Fifth generation GCN-based GPU
Model | Release date |
Fab | CPU | GPU | Socket | PCIe lanes |
Memory support |
TDP | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Model | Config[i] | Clock (MHz) |
Processing power (GFLOPS)[ii] | ||||||||||
Base | Boost | L1 | L2 | L3 | ||||||||||||
Athlon Pro 200U | 2019 | GloFo 14LP |
2 (4) | 2.3 | 3.2 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | Radeon Vega 3 | 192:12:4 3 CU |
1000 | 384 | FP5 | 12 (8+4) | DDR4-2400 dual-channel |
12–25 W |
Athlon 300U | Jan 6, 2019 | 2.4 | 3.3 | |||||||||||||
Ryzen 3 2200U | Jan 8, 2018 | 2.5 | 3.4 | 1100 | 422.4 | |||||||||||
Ryzen 3 3200U | Jan 6, 2019 | 2.6 | 3.5 | 1200 | 460.8 | |||||||||||
Ryzen 3 2300U | Jan 8, 2018 | 4 (4) | 2.0 | 3.4 | Radeon Vega 6 | 384:24:8 6 CU |
1100 | 844.8 | ||||||||
Ryzen 3 Pro 2300U | May 15, 2018 | |||||||||||||||
Ryzen 5 2500U | Oct 26, 2017 | 4 (8) | 3.6 | Radeon Vega 8 | 512:32:16 8 CU |
1126.4 | ||||||||||
Ryzen 5 Pro 2500U | May 15, 2018 | |||||||||||||||
Ryzen 5 2600H | Sep 10, 2018 | 3.2 | DDR4-3200 dual-channel |
35–54 W | ||||||||||||
Ryzen 7 2700U | Oct 26, 2017 | 2.2 | 3.8 | Radeon RX Vega 10 | 640:40:16 10 CU |
1300 | 1664 | DDR4-2400 dual-channel |
12–25 W | |||||||
Ryzen 7 Pro 2700U | May 15, 2018 | Radeon Vega 10 | ||||||||||||||
Ryzen 7 2800H | Sep 10, 2018 | 3.3 | Radeon RX Vega 11 | 704:44:16 11 CU |
1830.4 | DDR4-3200 dual-channel |
35–54 W |
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Picasso" (2019)
edit- Fabrication 12 nm by GlobalFoundries
- Socket FP5
- Die size: 210 mm²
- Up to four Zen+ CPU cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual-channel DDR4 memory controller
- Fifth generation GCN-based GPU
Common features of Ryzen 3000 notebook APUs:
- Socket: FP5.
- All the CPUs support DDR4-2400 in dual-channel mode.
- L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: GlobalFoundries 12LP (14LP+).
Branding and Model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 7 | 3780U[123] | 4 (8) | 2.3 | 4.0 | 4 MB | 1 × 4 | RX Vega 11 | 1.4 | 704:44:16 11 CU |
1971.2 | 15 W | Oct 2019 |
3750H[124] | RX Vega 10 | 640:40:16 10 CU[125] |
1792.0 | 35 W | Jan 6, 2019 | |||||||
3700C[126] | 15 W | Sep 22, 2020 | ||||||||||
3700U[a][127] | Jan 6, 2019 | |||||||||||
Ryzen 5 | 3580U[128] | 2.1 | 3.7 | Vega 9 | 1.3 | 576:36:16 9 CU |
1497.6 | Oct 2019 | ||||
3550H[129] | Vega 8 | 1.2 | 512:32:16 8 CU[130] |
1228.8 | 35 W | Jan 6, 2019 | ||||||
3500C[131] | 15 W | Sep 22, 2020 | ||||||||||
3500U[a][132] | Jan 6, 2019 | |||||||||||
3450U[133] | 3.5 | Jun 2020 | ||||||||||
Ryzen 3 | 3350U[134] | 4 (4) | Vega 6 | 384:24:8 6 CU[135] |
921.6 | Jan 6, 2019 | ||||||
3300U[a][136] |
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Renoir" (2020)
edit- Fabrication 7 nm by TSMC[140][141][142]
- Socket FP6
- Die size: 156 mm²
- 9.8 billion transistors on one single 7 nm monolithic die[143]
- Up to eight Zen 2 CPU cores
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- Fifth generation GCN-based GPU
- Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- All the CPUs support 16 PCIe 3.0 lanes.
U
editBranding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (MHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 7 | 4980U | 8 (16) | 2.0 | 4.4 | 8 MB | 2 × 4 | Radeon Graphics[a] |
1950 | 512:32:8 8 CU |
1996.8 | 15 W | Apr 13, 2021 |
4800U | 1.8 | 4.2 | 1750 | 1792 | Mar 16, 2020 | |||||||
Pro 4750U | 1.7 | 4.1 | 1600 | 448:28:8 7 CU |
1433.6 | May 7, 2020 | ||||||
4700U | 8 (8) | 2.0 | Mar 16, 2020 | |||||||||
Ryzen 5 | 4680U | 6 (12) | 2.1 | 4.0 | 2 × 3 | 1500 | 1344 | Apr 13, 2021 | ||||
Pro 4650U | 384:24:8 6 CU |
1152 | May 7, 2020 | |||||||||
4600U | Mar 16, 2020 | |||||||||||
4500U | 6 (6) | 2.3 | ||||||||||
Ryzen 3 | Pro 4450U | 4 (8) | 2.5 | 3.7 | 4 MB | 1 × 4 | 1400 | 320:20:8 5 CU |
896 | May 7, 2020 | ||
4300U | 4 (4) | 2.7 | Mar 16, 2020 |
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
H
editBranding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (MHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 9 | 4900H | 8 (16) | 3.3 | 4.4 | 8 MB | 2 × 4 | Radeon Graphics[a] |
1750 | 512:32:8 8 CU |
1792 | 45 W | Mar 16, 2020 |
4900HS | 3.0 | 4.3 | 35 W | |||||||||
Ryzen 7 | 4800H | 2.9 | 4.2 | 1600 | 448:28:8 7 CU |
1433.6 | 45 W | |||||
4800HS | ||||||||||||
Ryzen 5 | 4600H | 6 (12) | 3.0 | 4.0 | 2 × 3 | 1500 | 384:24:8 6 CU |
1152 | ||||
4600HS[144][145][146] | 35 W |
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Lucienne" (2021)
edit- Fabrication 7 nm by TSMC
- Socket FP6
- Die size: 156 mm²
- 9.8 billion transistors on one single 7 nm monolithic die[citation needed]
- Up to eight Zen 2 CPU cores
- Fifth generation GCN-based GPU (7 nm Vega)
Common features of Ryzen 5000 notebook APUs:
- Socket: FP6.
- All the CPUs support DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 3.0 lanes.
- Includes integrated GCN 5th generation GPU.
- Fabrication process: TSMC 7FF.
Branding and Model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 7 | 5700U | 8 (16) | 1.8 | 4.3 | 8 MB | 2 × 4 | Radeon Graphics [a] |
1.9 | 512:32:8 8 CU |
1945.6 | 10–25 W | Jan 12, 2021 |
Ryzen 5 | 5500U[147] | 6 (12) | 2.1 | 4.0 | 2 × 3 | 1.8 | 448:28:8 7 CU |
1612.8 | ||||
Ryzen 3 | 5300U | 4 (8) | 2.6 | 3.8 | 4 MB | 1 × 4 | 1.5 | 384:24:8 6 CU |
1152 |
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
"Cezanne" (2021)
edit- Fabrication 7 nm by TSMC
- Socket FP6
- Die size: 180 mm²
- Up to eight Zen 3 CPU cores
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- Fifth generation GCN-based GPU
- Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- All the CPUs support 16 PCIe 3.0 lanes.
U
editBranding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (Threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 7 | 5800U[note 1][148] | 8 (16) | 1.9 | 4.4 | 16 MB | 1 × 8 | Radeon Graphics[a] |
2.0 | 512:32:8 8 CUs |
2048 | 10–25 W | Jan 12, 2021 |
Ryzen 5 | 5600U[note 1][149] | 6 (12) | 2.3 | 4.2 | 1 × 6 | 1.8 | 448:28:8 7 CUs |
1612.8 | ||||
5560U[150] | 4.0 | 8 MB | 1.6 | 384:24:8 6 CUs |
1228.8 | |||||||
Ryzen 3 | 5400U[note 1][151][152] | 4 (8) | 2.7 | 4.1 | 1 × 4 |
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
H
editBranding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (Threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 9 | 5980HX[156] | 8 (16) | 3.3 | 4.8 | 16 MB | 1 × 8 | Radeon Graphics[a] |
2.1 | 512:32:8 8 CUs |
2150.4 | 35–54 W | Jan 12, 2021 |
5980HS[157] | 3.0 | 35 W | ||||||||||
5900HX[158] | 3.3 | 4.6 | 35–54 W | |||||||||
5900HS[159] | 3.0 | 35 W | ||||||||||
Ryzen 7 | 5800H[160][161] | 3.2 | 4.4 | 2.0 | 2048 | 35–54 W | ||||||
5800HS[162] | 2.8 | 35 W | ||||||||||
Ryzen 5 | 5600H[163][164] | 6 (12) | 3.3 | 4.2 | 1 × 6 | 1.8 | 448:28:8 7 CUs |
1612.8 | 35–54 W | |||
5600HS[165] | 3.0 | 35 W |
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Barceló" (2022)
edit- Fabrication 7 nm by TSMC
- Socket FP6
- Die size: 180 mm²
- Up to eight Zen 3 CPU cores
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- Fifth generation GCN-based GPU
- Memory support: DDR4-3200 or LPDDR4-4266 in dual-channel mode.
- All the CPUs support 16 PCIe 3.0 lanes.
Branding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (Threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 7 | 5825U[note 1][note 2][166] | 8 (16) | 2.0 | 4.5 | 16 MB | 1 × 8 | Radeon Graphics[a] |
2.0 | 512:32:8 8 CUs |
2048 | 15 W | Jan 4, 2022 |
Ryzen 5 | 5625U[note 1][note 2][167] | 6 (12) | 2.3 | 4.3 | 1 × 6 | 1.8 | 448:28:8 7 CUs |
1612.8 | ||||
Ryzen 3 | 5125C[168] | 2 (4) | 3.0 | — | 8 MB | 1 × 2 | ? | 192:12:8 3 CU |
? | May 5, 2022 |
- ^ All of the iGPUs are branded as AMD Radeon Graphics.
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Rembrandt" (2022)
edit- Fabrication 6 nm by TSMC
- Socket FP7
- Die size: 210 mm²
- Up to eight Zen 3+ CPU cores
- Second generation RDNA-based GPU
Common features of Ryzen 6000 notebook APUs:
- Socket: FP7, FP7r2.
- All the CPUs support DDR5-4800 or LPDDR5-6400 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 16 PCIe 4.0 lanes.
- Includes integrated RDNA 2 GPU.
- Fabrication process: TSMC N6 FinFET.
Branding and model | CPU | GPU | TDP | Release date | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock (GHz) |
Config[ii] | Processing power (GFLOPS)[iii] | |||||
Base | Boost | |||||||||||
Ryzen 9 | 6980HX | 8 (16) | 3.3 | 5.0 | 16 MB | 1 × 8 | 680M | 2.4 | 768:48:8 12 CUs |
3686.4 | 45 W | Jan 4, 2022 [175] |
6980HS | 35 W | |||||||||||
6900HX[a] | 4.9 | 45 W | ||||||||||
6900HS[a] | 35 W | |||||||||||
Ryzen 7 | 6800H[a] | 3.2 | 4.7 | 2.2 | 3379.2 | 45 W | ||||||
6800HS[a] | 35 W | |||||||||||
6800U[a] | 2.7 | 15–28 W | ||||||||||
Ryzen 5 | 6600H[a] | 6 (12) | 3.3 | 4.5 | 1 × 6 | 660M | 1.9 | 384:24:8 6 CUs |
1459.2 | 45 W | ||
6600HS[a] | 35 W | |||||||||||
6600U[a] | 2.9 | 15–28 W |
- ^ Core Complexes (CCX) × cores per CCX
- ^ Unified shaders : texture mapping units : render output units and compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Phoenix" (2023)
edit- Fabrication 4 nm by TSMC
- Up to eight Zen 4 CPU cores
- Dual-channel DDR5 or LPDDR5x memory controller
- RDNA3 iGPU
- XDNA accelerator
"Dragon Range" (2023)
edit- Fabrication 5 nm (CCD) and 6 nm (cIOD) by TSMC
- Up to sixteen Zen 4 CPU cores
- Dual-channel DDR5 memory controller
- Basic RDNA2 iGPU
Ultra-mobile APUs
editBrazos: "Desna", "Ontario", "Zacate" (2011)
edit- Fabrication 40 nm by TSMC
- Socket FT1 (BGA-413)
- Based on the Bobcat microarchitecture[184]
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
- PowerNow!
- DirectX 11 integrated graphics with UVD 3.0
- Z-series denote Desna; C-series denote Ontario; and the E-series denotes Zacate
- 2.50 GT/s UMI (PCIe 1.0 ×4)
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Turbo
(MHz) |
GFLOPS[b] | ||||||||
L1 | L2 | |||||||||||||||
Z-01 | June 1, 2011 | 40 nm | B0 | 2 (2) | 1.0 | — | 32KB inst. 32KB data per core |
2× 512KB | HD 6250 | 80:8:4 | 276 | — | 44.1 | 1066 | 5.9 | XMZ01AFVB22GV |
C-30 | January 4, 2011 | 1 (1) | 1.2 | 512KB | 9 | CMC30AFPB12GT | ||||||||||
C-50 | 2 (2) | 1.0 | 2× 512KB | CMC50AFPB22GT | ||||||||||||
C-60 | August 22, 2011 | C0 | 1.33 | HD 6290 | 400 | CMC60AFPB22GV | ||||||||||
E-240 | January 4, 2011 | B0 | 1 (1) | 1.5 | — | 512KB | HD 6310 | 500 | — | 80 | 1066 | 18 | EME240GBB12GT | |||
E-300 | August 22, 2011 | 2 (2) | 1.3 | 2×
512KB |
488 | 78 | EME300GBB22GV | |||||||||
E-350 | January 4, 2011 | 1.6 | 492 | 78.7 | EME350GBB22GT | |||||||||||
E-450 | August 22, 2011 | B0 C0 |
1.65 | HD 6320 | 508 | 600 | 81.2 | 1333 | EME450GBB22GV |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Brazos 2.0: "Ontario", "Zacate" (2012)
edit- Fabrication 40 nm by TSMC
- Socket FT1 (BGA-413)
- Based on the Bobcat microarchitecture[184]
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
- PowerNow!
- DirectX 11 integrated graphics
- C-series denote Ontario; and the E-series denotes Zacate
- 2.50 GT/s UMI (PCIe 1.0 ×4)
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Turbo
(MHz) |
GFLOPS[b] | |||||||||
L1 | L2 | L3 | |||||||||||||||
C-70 | September 15, 2012 | 40 nm | C0 | 2 (2) | 1.0 | 1.33 | 32 KB inst. 32 KB data per core |
2× 512KB | — | HD 7290 | 80:8:4 | 276 | 400 | 44.1 | 1066 | 9 | CMC70AFPB22GV |
E1-1200 | June 6, 2012 | C0 | 1.4 | — | HD 7310 | 500 | — | 80 | 1066 | 18 | EM1200GBB22GV | ||||||
E1-1500 | January 7, 2013 | 1.48 | 529 | 84.6 | |||||||||||||
E2-1800 | June 6, 2012 | 1.7 | HD 7340 | 523 | 680 | 83.6 | 1333 | EM1800GBB22GV | |||||||||
E2-2000 | January 7, 2013 | 1.75 | 538 | 700 | 86 |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Brazos-T: "Hondo" (2012)
edit- Fabrication 40 nm by TSMC
- Socket FT1 (BGA-413)
- Based on the Bobcat microarchitecture[184]
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- Found in tablet computers
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
- PowerNow!
- DirectX 11 integrated graphics
- 2.50 GT/s UMI (PCIe 1.0 ×4)
Model | Released | Fab | Step. | CPU | GPU | DDR3 Memory support |
TDP (W) | Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock (GHz) | Cache[a] | Model | Config | Clock (MHz) | GFLOPS[b] | ||||||||
L1 | L2 | |||||||||||||
Z-60 | October 9, 2012 | 40 nm | C0 | 2 (2) | 1.0 | 32KB inst. 32KB data per core |
2× 512 KB | HD 6250 | 80:8:4 | 276 | 44.1 | 1066 | 4.5 | XMZ60AFVB22GV |
- ^ AMD in its technical documentation uses KB, which it defines as "kilobyte" and as equal to 1024 B (i.e., 1 KiB), and MB, which it defines as "megabyte" and as equal to 1024 KB (1 MiB).[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Kabini", "Temash" (2013)
edit- Fabrication 28 nm by TSMC
- Socket FT3 (BGA)
- 2 to 4 CPU Cores (Jaguar (microarchitecture))
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- Turbo Dock Technology, C6 and CC6 low power states
- GPU based on Graphics Core Next (GCN)
- AMD Eyefinity multi-monitor for up to two displays
Temash, Elite Mobility APU
editModel | Released | Fab | Step. | CPU | GPU | DDR3L
Memory |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Turbo
(MHz) | ||||||||
L1 | L2
(MB) | ||||||||||||||
A4-1200 | May 23, 2013 | 28 nm | KB-A1 | 2 (2) | 1.0 | — | 32 KB inst. 32 KB data per core |
1 | HD 8180 | 128:8:4 2 CU |
225 | — | 1066 | 4 | AT1200IFJ23HM |
A4-1250 | HD 8210 | 300 | 1333 | 8 | AT1250IDJ23HM | ||||||||||
A4-1350 | 4 (4) | 2 | 1066 | AT1350IDJ44HM | |||||||||||
A6-1450 | 1.4 | HD 8250 | 400 | AT1450IDJ44HM |
Kabini, Mainstream APU
editModel | Released | Fab | Step. | CPU | GPU | DDR3L
Memory |
TDP
(W) |
Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) | |||||||||
L1 | L2
(MB) |
L3 | ||||||||||||
E1-2100 | May 2013 | 28 nm | KB-A1 | 2 (2) | 1.0 | 32KB inst. 32KB data per core |
1 | — | HD 8210 | 128:8:4 2 CU |
300 | 1333 | 9 | EM2100ICJ23HM |
E1-2200 | Feb 2014 | 1.05 | EM2200ICJ23HM | |||||||||||
E1-2500 | May 2013 | 1.4 | HD 8240 | 400 | 15 | EM2500IBJ23HM | ||||||||
E2-3000 | 1.65 | HD 8280 | 450 | 1600 | EM3000IBJ23HM | |||||||||
E2-3800 | Feb 2014 | 4 | 1.3 | 2 | EM3800IBJ44HM | |||||||||
A4-5000 | May 2013 | 1.5 | HD 8330 | 497 | AM5000IBJ44HM | |||||||||
A4-5100 | Feb 2014 | 1.55 | AM5100IBJ44HM | |||||||||||
A6-5200 | May 2013 | 2.0 | HD 8400 | 600 | 25 | AM5200IAJ44HM | ||||||||
A4 Pro-3340B | Nov 2014 | 2.2 | HD 8240 | 400 | AM334BIAJ44HM |
"Beema", "Mullins" (2014)
edit- Fabrication 28 nm by GlobalFoundries
- Socket FT3b (BGA)
- CPU: 2 to 4 (Puma cores)
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- GPU based on Graphics Core Next (GCN)
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- Intelligent Turbo Boost
- Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution
Mullins, Tablet/2-in-1 APU
editModel | Released | Fab | Step. | CPU | GPU | DDR3L
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Turbo
(MHz) | |||||||||
L1 | L2
(MB) |
L3 | ||||||||||||||
E1 Micro-6200T | Q2 2014 | 28 nm | ML-A1 | 2 (2) | 1.0 | 1.4 | 32 KB inst. 32 KB data per core |
1 | — | R2 | 128:8:4 2 CU |
300 | 600 | 1066 | 3.95 | EM620TIWJ23JB |
A4 Micro-6400T | 4 (4) | 1.6 | 2 | R3 | 350 | 686 | 1333 | 4.5 | AM640TIVJ44JB | |||||||
A10 Micro-6700T | 1.2 | 2.2 | R6 | 500 | — | AM670TIVJ44JB |
Beema, Notebook APU
editModel | Released | Fab | Step. | CPU | GPU | DDR3 Memory support | TDP (W) | Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) [FPUs] | Clock (GHz) | Turbo (GHz) | Cache[a] | Model | Config | Clock (MHz) | Turbo (MHz) | |||||||||
L1 | L2 (MB) | L3 | ||||||||||||||
E1-6010 | Q2 2014 | 28 nm | ML-A1 | 2 (2) | 1.35 | — | 32 KB inst. 32 KB data per core | 1 | — | R2 | 128:8:4 2 CU |
300 | 600 | (L)1333 | 10 | EM6010IUJ23JB |
E1-6015[185] | Q2 2015 | 1.4 | ||||||||||||||
E2-6110 | Q2 2014 | 4 (4) | 1.5 | 2 | (L)1600 | 15 | EM6110ITJ44JB | |||||||||
A4-6210 | 1.8 | R3 | 350 | 686 | AM6210ITJ44JB | |||||||||||
A4-6250J[186] | 2.0 | 25 | ||||||||||||||
A6-6310 | 1.8 | 2.4 | R4 | 300 | 800 | (L)1866 | 15 | AM6310ITJ44JB | ||||||||
A8-6410 | 2.0 | R5 | AM6410ITJ44JB |
"Carrizo-L" (2015)
edit- Fabrication 28 nm by GlobalFoundries
- Socket FT3b (BGA), FP4 (μBGA)[187]
- CPU: 2 to 4 (Puma+ cores)
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- GPU based on Graphics Core Next (GCN)
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- Intelligent Turbo Boost
- Platform Security Processor, with an integrated ARM Cortex-A5 for TrustZone execution
- All models except A8-7410 available in both laptop and all-in-one desktop versions
Model | Released | Fab | Step. | CPU | GPU | DDR3 Memory support |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) [FPUs] |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock | Turbo
(MHz) | ||||||||
L1 | L2
(MB) | ||||||||||||||
E1-7010 | May 2015 | 28 nm | ML-A1 | 2 | 1.5 | — | 32 KB inst. 32 KB data per core |
1 | R2 | 128:8:4 2 CU |
400 | (L)1333 | 10 | EM7010IUJ23JB EM7010JCY23JB EM7010JCY23JBD | |
E2-7110 | 4 | 1.8 | 2 | R2 | 600 | (L)1600 | 12–25 | EM7110ITJ44JB EM7110JBY44JB EM7110JBY44JBD | |||||||
A4-7210 | 2.2 | R3 | 686 | AM7210ITJ44JB AM7210JBY44JBD | |||||||||||
A6-7310 | 2.0 | 2.4 | R4 | 800 | (L)1866 | AM7310ITJ44JB AM7310JBY44JB AM7310JBY44JBD | |||||||||
A8-7410 | 2.2 | 2.5 | R5 | 847 | 15 | AM7410JBY44JB | |||||||||
A4 PRO-3350B | May 2016 | 2.0 | 2.4 | R4 | 800 | 1600 | AM335BITJ44JB |
"Stoney Ridge" (2016)
edit- Fabrication 28 nm by GlobalFoundries
- Socket FP4[119] / FT4
- 2 "Excavator+" x86 CPU cores
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- Single-channel DDR4 memory controller
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND, Turbo Core
- GPU based on Graphics Core Next 3rd Generation with VP9 decoding
Model number | Released | Fab | CPU | GPU | DDR4
Memory |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] | Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
GFLOPS[b] | |||||||
L1 | L2
(MB) | |||||||||||||
E2-9000e | November 2016 | 28 nm | [1]2 | 1.5 | 2.0 | 96 KB inst. per module 32 KB data per core |
1 | R2 | 128:8:4 2 CU |
600 | 153.6 | 1866 | 6 | EM900EANN23AC |
E2-9000 | June 2016 | 1.8 | 2.2 | 10 | EM9000AKN23AC | |||||||||
E2-9010 | 2.0 | 2.2 | 10–15 | EM9010AVY23AC | ||||||||||
A4-9120 | Q2 2017 | 2.2 | 2.5 | R3 | 655 | 167.6 | 2133 | 10–15 | AM9120AYN23AC | |||||
A4-9125 | Q2 2018 | 2.3 | 2.6 | 686 | 175.6 | AM9125AYN23AC | ||||||||
A4-9120C | January 6, 2019 | 1.6 | 2.4 | R4 | 192:12:8 3 CU |
600 | 230.4 | 1866 | 6 | AM912CANN23AC | ||||
A6-9200e | November 2016 | 1.8 | 2.7 | 2133 | AM920EANN23AC | |||||||||
A6-9200 | 2.0 | 2.8 | 10 | AM9200AKN23AC | ||||||||||
A6-9210 | June 2016 | 2.4 | 2.8 | 10–15 | AM9210AVY23AC | |||||||||
A6-9220 | Q2 2017 | 2.5 | 2.9 | 655 | 251.5 | 10–15 | AM9220AYN23AC | |||||||
A6-9225 | Q2 2018 | 2.6 | 3.0 | 686 | 263.4 | AM9225AYN23AC | ||||||||
A6-9220C | January 6, 2019 | 1.8 | 2.7 | R5 | 720 | 276.4 | 1866 | 6 | AM922CANN23AC | |||||
A9-9400 | November 2016 | 2.4 | 3.2 | 800 | 307.2 | 2133 | 10 | AM9400AKN23AC | ||||||
A9-9410 | June 2016 | 2.9 | 3.5 | 10–25 | AM9410AFY23AC | |||||||||
A9-9420 | Q2 2017 | 3.0 | 3.6 | 847 | 325.2 | AM9420AYN23AC | ||||||||
A9-9425 | Q2 2018 | 3.1 | 3.7 | 900 | 345.6 | AM9425AYN23AC | ||||||||
A9-9430[188] | Q2 2017 | 3.2 | 3.5 | 847 | 325.2 | 2400 | 25 | AD9430AJN23AC | ||||||
Pro A4-4350B | Q1 2018 | 2.5 | 2.9 | 655 | 251.5 | 2133 | 15 | |||||||
Pro A4-5350B | Q1 2020 | 3.0 | 3.6 | 847 | 325.2 | |||||||||
Pro A6-7350B | Q1 2018 | |||||||||||||
Pro A6-8350B | Q1 2020 | 3.1 | 3.7 | 900 | 345.6 |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Dalí" (2020)
edit- Fabrication 14 nm by GlobalFoundries
- Socket FP5
- Two Zen CPU cores
- Over 30% die size reduction over predecessor (Raven Ridge)
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual-channel RAM
Model | Release date |
Fab | CPU | GPU | Socket | PCIe lanes |
Memory support |
TDP | Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Model | Config[a] | Clock (GHz) |
Processing power (GFLOPS)[b] | |||||||||||
Base | Boost | L1 | L2 | L3 | |||||||||||||
AMD 3020e | Jan 6, 2020 | 14 nm | 2 (2) | 1.2 | 2.6 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | Radeon Graphics (Vega) |
192:12:4 3 CU |
1.0 | 384 | FP5 | 12 (8+4) | DDR4-2400 dual-channel |
6 W | YM3020C7T2OFG |
Athlon PRO 3045B | Q1 2021 | 2.3 | 3.2 | 128:8:4 2 CU |
1.1 | 281.6 | 15 W | YM3045C4T2OFG | |||||||||
Athlon Silver 3050U | Jan 6, 2020 | YM3050C4T2OFG | |||||||||||||||
Athlon Silver 3050C | Sep 22, 2020 | YM305CC4T2OFG | |||||||||||||||
Athlon Silver 3050e | Jan 6, 2020 | 2 (4) | 1.4 | 2.8 | 192:12:4 3 CU[189] |
1.0 | 384 | 6 W | YM3050C7T2OFG | ||||||||
Athlon PRO 3145B | Q1 2021 | 2.4 | 3.3 | 15 W | YM3145C4T2OFG | ||||||||||||
Athlon Gold 3150U | Jan 6, 2020 | YM3150C4T2OFG | |||||||||||||||
Athlon Gold 3150C | Sep 22, 2020 | YM315CC4T2OFG | |||||||||||||||
Ryzen 3 3250U | Jan 6, 2020 | 2.6 | 3.5 | 1.2 | 460.8 | YM3250C4T2OFG | |||||||||||
Ryzen 3 3250C | Sep 22, 2020 | YM325CC4T2OFG |
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Pollock" (2020)
edit- Fabrication 14 nm by GlobalFoundries
- Socket FT5
- Two Zen CPU cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Single-channel RAM
Model | Release date |
Fab | CPU | GPU | Socket | PCIe lanes |
Memory support |
TDP | Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Model | Config[a] | Clock (GHz) |
Processing power (GFLOPS)[b] | |||||||||||
Base | Boost | L1 | L2 | L3 | |||||||||||||
AMD 3015e | Jul 6, 2020 | 14 nm | 2 (4) | 1.2 | 2.3 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | Radeon Graphics (Vega) |
192:12:4 3 CU |
0.6 | 230.4 | FT5 | 12 (8+4) | DDR4-1600 single-channel |
6 W | AM3015BRP2OFJ |
AMD 3015Ce | Apr 29, 2021 | AM301CBRP2OFJ |
- ^ Unified shaders : Texture mapping units : Render output units and Compute units (CU)
- ^ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Mendocino" (2022)
editCommon features:
- Socket: FT6
- All the CPUs support LPDDR5-5500 in dual-channel mode.
- L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
- L2 cache: 512 KB per core.
- All the CPUs support 4 PCIe 3.0 lanes.
- Includes integrated RDNA2 GPU.
- Fabrication process: TSMC 6 nm FinFET.
Branding and Model | CPU | GPU | TDP | Release date | ||||||
---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | L3 cache (total) |
Core config[i] |
Model | Clock | |||||
Base | Boost | |||||||||
Athlon Gold | 7220U[a][190] | 2 (4) | 2.4 | 3.7 | 4 MB | 1 x 2 | 610M 2 CU |
1900 MHz | 8–15 W | Sep 20, 2022[191] |
Athlon Silver | 7120U[a][192] | 2 (2) | 3.5 | 2 MB |
- ^ Core Complexes (CCX) × cores per CCX
Embedded APUs
editG-Series
editBrazos: "Ontario" and "Zacate" (2011)
edit- Fabrication 40 nm
- Socket FT1 (BGA-413)
- CPU microarchitecture: Bobcat[195]
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, AMD-V
- GPU microarchitecture: TeraScale 2 (VLIW5) "Evergreen"
- Memory support: single-channel, support up to two DIMMs of DDR3-1333 or DDR3L-1066
- 5 GT/s UMI
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Processing power (GFLOPS)[b] | ||||||||
L1 | L2 | |||||||||||||
G-Series T24L | March 1, 2011 May 23, 2011 |
40 nm | B0 | 1 (1) | 0.8 1.0 |
32 KB inst. 32 KB data per core |
512 KB | — | 1066 | 5 | GET24LFPB12GTE GET24LFQB12GVE | |||
G-Series T30L | March 1, 2011 May 23, 2011 |
1.4 | 18 | GET30LGBB12GTE GET30LGBB12GVE | ||||||||||
G-Series T48L | March 1, 2011 May 23, 2011 |
2 (2) | 2 × 512 KB | GET48LGBB22GTE GET48LGBB22GVE | ||||||||||
G-Series T16R | June 25, 2012 | B0 | 1 (1) | 0.615 | 512 KB | HD 6250 | 80:8:4 | 276 | 44.1 | (L)1066 | 4.5 | GET16RFWB12GVE | ||
G-Series T40R | May 23, 2011 | 1.0 | 280 | 44.8 | 1066 | 5.5 | GET40RFQB12GVE | |||||||
G-Series T40E | 2 (2) | 2 × 512 KB | 6.4 | GET40EFQB22GVE | ||||||||||
G-Series T40N | January 19, 2011 May 23, 2011 |
HD 6250 HD 6290 |
9 | GET40NFPB22GTE GET40NFPB22GVE | ||||||||||
G-Series T40R | May 23, 2011 | 1 (1) | 512 KB | HD 6250 | 5.5 | GET40RFSB12GVE | ||||||||
G-Series T44R | January 19, 2011 May 23, 2011 |
1.2 | 9 | GET44RFPB12GTE GET44RFPB12GVE | ||||||||||
G-Series T48E | June 25, 2012 | 2 (2) | 1.4 | 2 × 512 KB | 18 | GET48EGBB22GVE | ||||||||
G-Series T48N | January 19, 2011 May 23, 2011 |
HD 6310 | 500 520 |
80 83.2 |
GET48NGBB22GTE GET48NGBB22GVE | |||||||||
G-Series T52R | January 19, 2011 May 23, 2011 |
1 (1) | 1.5 | 512 KB | 500 | 80 | 1066 1333 |
GET52RGBB12GTE GET52RGBB12GVE | ||||||
G-Series T56E | June 25, 2012 | 2 (2) | 1.65 | 2 × 512 KB | HD 6250 | 275 | 44 | 1333 | GET56EGBB22GVE | |||||
G-Series T56N | January 19, 2011 May 23, 2011 |
1.6 1.65 |
HD 6310 HD 6320 |
500 | 80 | 1066 1333 |
GET56NGBB22GTE GET56NGBB22GVE |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FT3 (769-BGA)[196]
- CPU microarchitecture: Jaguar
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support. No support for FMA (Fused Multiply-Accumulate). Trusted Platform Module (TPM) 1.2 support
- GPU microarchitecture: Graphics Core Next (GCN) with Unified Video Decoder 3 (H.264, VC-1, MPEG2, etc.)
- Single channel DDR3-1600, 1.25 and 1.35 V voltage level support, support for ECC memory
- Integrates Controller Hub functional block, HD audio, 2 SATA channels, USB 2.0 and USB 3.0 (except GX-210JA)
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Junction temperature (°C) | Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Processing power (GFLOPS)[b] | |||||||||
L1 | L2
(MB) | ||||||||||||||
GX-210UA | Unknown | 28 nm | B0 | 2 (2) | 1.0 | 32 KB inst. 32 KB data per core |
1 | — | 1333 | 8.5 | 0-90 | GE210UIGJ23HM | |||
GX-210JA | July 30, 2013 | HD 8180E | 128:8:4 2 CU |
225 | 57.6 | 1066 | 6 | GE210JIHJ23HM | |||||||
GX-209HA | Unknown | HD 8400E | 600 | 153.6 | 9 | -40-105 | GE209HISJ23HM | ||||||||
GX-210HA | June 1, 2013 | HD 8210E | 300 | 76.8 | 1333 | 0-90 | GE210HICJ23HM | ||||||||
GX-217GA | 1.65 | HD 8280E | 450 | 115.2 | 1600 | 15 | GE217GIBJ23HM | ||||||||
GX-411GA | Unknown | 4 (4) | 1.1 | 2 | HD 8210E | 300 | 76.8 | 1066 | -40-105 | GE411GIRJ44HM | |||||
GX-415GA | June 1, 2013 | 1.5 | HD 8330E | 500 | 128 | 1600 | 0-90 | GE415GIBJ44HM | |||||||
GX-416RA | 1.6 | — | GE416RIBJ44HM | ||||||||||||
GX-420CA | 2.0 | HD 8400E | 128:8:4 2 CU |
600 | 153.6 | 25 | GE420CIAJ44HM |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FT3b (769-BGA)
- CPU microarchitecture: Puma
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Junction temperature (°C) | Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) [FPUs] |
Clock
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Processing power (GFLOPS)[b] | |||||||||
L1 | L2
(MB) | ||||||||||||||
GX-210JC | June 4, 2014 | 28 nm | ML-A1 | 2 (2) [1] | 1.0 | 32 KB inst. 32 KB data per core |
1 | R1E | 128:8:4 2 CU |
267 | 68.3 | 1600 | 6 | -40-105 | GE210JIZJ23JB |
GX-212JC | 1.2 | R2E | 300 | 76.8 | 1333 | 0-90 | GE212JIYJ23JB | ||||||||
GX-216HC | 1.6 | R4E | 1066 | 10 | -40-105 | GE216HHBJ23JB | |||||||||
GX-222GC | 2.2 | R5E | 655 | 167.6 | 1600 | 15 | 0-90 | GE222GITJ23JB | |||||||
GX-412HC | 4 (4) [2] | 1.2 | 2 | R3E | 300 | 76.8 | 1333 | 7 | GE412HIYJ44JB | ||||||
GX-424CC | 2.4 | R5E | 497 | 127.2 | 1866 | 25 | GE424CIXJ44JB |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FT3b (769-BGA)
- CPU microarchitecture: Puma
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- no GPU
Model | Released | Fab | CPU | GPU | DDR3
Memory |
TDP
(W) |
Junction
(°C) |
Part number | |||
---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) [FPUs] |
Clock
(GHz) |
Cache[a] | |||||||||
L1 | L2
(MB) | ||||||||||
GX-224PC | June 4, 2014 | 28 nm | 2 (2) [1] | 2.4 | 32 KB inst. 32 KB data per core |
1 | — | 1866 | 25 | 0-90 | GE224PIXJ23JB |
GX-410VC | 4 (4) [2] | 1.0 | 2 | 1066 | 7 | -40-105 | GE410VIZJ44JB | ||||
GX-412TC | 1.2 | 1600 | 6 | 0-90 | GE412TIYJ44JB | ||||||
GX-420MC | 2.0 | 17.5 | GE420MIXJ44JB |
- Fabrication 28 nm
- Socket FT3b (769-BGA)
- 2 Puma x86 cores with 1MB shared L2 cache
- L1 Cache: 32 KB Data per core and 32 KB Instructions per core
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support
- GPU microarchitecture: Graphics Core Next (GCN) (1CU) with support for DirectX 11.2
- Single channel 64-bit DDR3 memory with ECC
- Integrated Controller Hub supports: PCIe® 2.0 4×1, 2 USB3 + 4 USB2 ports, 2 SATA 2.0/3.0 ports
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) [FPUs] |
Clock
(GHz) |
Cache[a] | Model | Config | Clock
(MHz) |
Processing power (GFLOPS)[b] | ||||||||
L1 | L2
(MB) | |||||||||||||
GX-208JL | February 23, 2016 | 28 nm | ML-A1 | 2 | 0.8 | 32 KB inst. 32 KB data per core |
1 | R1E | 64:4:1 1 CU |
267 | 34.1 | 1333 | 6 | GE208JIVJ23JB |
GX-210HL | 2017 | 1.0 | 1066 | 7 | GE208HIZJ23JB | |||||||||
GX-210JL | February 23, 2016 | 1333 | 6 | GE210JIVJ23JB | ||||||||||
GX-210KL | 2017 | 4.5 | GE210KIVJ23JB | |||||||||||
GX-215GL | February 23, 2016 | 1.5 | 497 | 63.6 | 1600 | 15 | GE215GITJ23JB | |||||||
GX-218GL | 1.8 | GE218GITJ23JB |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FP4[197]
- 2 or 4 Excavator x86 cores with 1MB shared L2 cache
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
- GPU microarchitecture: Graphics Core Next (GCN) (up to 4 CUs) with support for DirectX 12
- Dual channel 64-bit DDR4 or DDR3 memory with ECC
- 4K × 2K H.265 decode capability and multi format encode and decode
- Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports
Model | Released | Fab | CPU | GPU | Memory support |
TDP
(W) |
Part number | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Processing power (GFLOPS)[b] | |||||||
L1 | L2
(MB) | |||||||||||||
GX-217GI | February 23, 2016 | 28 nm | [1] 2 | 1.7 | 2.0 | 96 KB inst. per module 32 KB data per core |
1 | R6E | 256:16:4 4 CU |
758 | 388 | DDR3/DDR4-1600 | 15 | GE217GAAY23KA |
GX-420GI[198] | 2016 | [2] 4 | 2.0 | 2.2 | 2 | R6E R7E |
256:16:4 4 CU 384:24:4 6 CU |
758 626 |
388 480.7 |
DDR4-1866 | 16.1 | GE420GAAY43KA |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FP4[199]
- 2 "Excavator+" x86 cores with 1MB shared L2 cache
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
- GPU microarchitecture: Radeon R5E Graphics Core Next (GCN) (up to 3 CUs) with support for DirectX 12
- Single channel 64-bit DDR4 or DDR3 memory
- 4K × 2K H.265 decode capability with 10-bit compatibility and multi format encode and decode
- Integrated Controller Hub supports: PCIe 3.0 1×4, PCIe 2/3 4×1, 2 USB3 + 2 USB2 ports, 2 SATA 2.0/3.0 ports
Model | Released | Fab | CPU | GPU | Memory support |
TDP
(W) |
Junction temperature (°C) | Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Turbo | Processing power (GFLOPS)[b] | ||||||||
L1 | L2
(MB) | |||||||||||||||
GX-212JJ | 2018 | 28 nm | [1] 2 | 1.2 | 1.6 | 96 KB inst. per module 32 KB data per core |
1 | R1E | 64:4:1 1 CU |
600 | — | 76.8 | DDR3-1333 DDR4-1600 |
6–
10 |
0-90 | GE212JAWY23AC |
GX-215JJ | 2017 | 1.5 | 2.0 | R2E | 128:8:2 2 CU |
153.6 | DDR3-1600 DDR4-1866 |
GE215JAWY23AC | ||||||||
GX-220IJ | 2018 | 2.0 | 2.2 | 10–
15 |
GE220IAVY23AC | |||||||||||
GX-224IJ | 2017 | 2.4 | 2.8 | R4E | 192:12:3 3 CU |
230.4 | DDR3-1866 DDR4-2133 |
GE224IAVY23AC |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
R-Series
editComal: "Trinity" (2012)
edit- Fabrication 32 nm
- Socket FP2 (BGA-827), FS1r2
- CPU microarchitecture: Piledriver
- L1 Cache: 16 KB Data per core and 64 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
- GPU microarchitecture: TeraScale 3 (VLIW4) "Northern Islands"
- Memory support: dual-channel 1.35 V DDR3L-1600 memory, in addition to regular 1.5 V DDR3
- 2.5 GT/s UMI
- Die size: 246 mm²; Transistors: 1.303 billion
- OpenCL 1.1 and OpenGL 4.2 support
Model | Released | Fab | Step. | CPU | GPU | DDR3
Memory |
TDP
(W) |
Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Turbo
(MHz) |
Processing power (GFLOPS)[b] | ||||||||
L1 | L2
(MB) | |||||||||||||||
R-252F | May 21, 2012 | 32 nm | B0 | [1] 2 | 1.9 | 2.4 | 64 KB inst. per module 16 KB data per core |
1 | HD 7400G | 192:12:4 3 CU |
333 | 417 | 127.8 | 1333 | 17 | RE252FSHE23HJE |
R-260H | 2.1 | 2.6 | 2? | HD 7500G | 256:16:8 4 CU |
327 | 424 | 167.4 | RE260HSHE24HJE | |||||||
R-268D | 2.5 | 3.0 | 1 | HD 7420G | 192:12:4 3 CU |
470 | 640 | 180.4 | 1600 | 35 | RE268DDEC23HJE | |||||
R-272F | 2.7 | 3.2 | HD 7520G | 497 | 686 | 190.8 | RE272FDEC23HJE | |||||||||
R-452L | [2] 4 | 1.6 | 2.4 | 2 × 2 MB | HD 7600G | 256:16:8 4 CU |
327 | 424 | 167.4 | 19 | RE452LSHE44HJE | |||||
R-460H | 1.9 | 2.8 | HD 7640G | 497 | 655 | 254.4 | 35 | RE460HDEC44HJE | ||||||||
R-460L | 2.0 | HD 7620G | 384:24:8 6 CU |
360 | 497 | 276.4 | 1333 | 25 | RE460LSIE44HJE | |||||||
R-464L | 2.3 | 3.2 | HD 7660G | 497 | 686 | 381.6 | 1600 | 35 | RE464LDEC44HJE |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
"Bald Eagle" (2014)
edit- Fabrication 28 nm
- Socket FP3
- Up to 4 Steamroller x86 cores[200]
- L1 Cache: 16 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AMD64, AMD-V, AES, CLMUL, AVX 1.1, XOP, FMA3, FMA4, F16C,[29] ABM, BMI1, TBM
- GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 11.1 and OpenGL 4.2
- Dual channel DDR3 memory with ECC
- Unified Video Decode (UVD) 4.2 and Video Coding Engine (VCE) 2.0
Model | Released | Fab | CPU | GPU | DDR3
Memory |
TDP
(W) |
Junction temperature (°C) | Part number | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(MHz) |
Turbo
(MHz) |
Processing power (GFLOPS)[b] | ||||||||
L1 | L2
(MB) | |||||||||||||||
RX-219NB | May 20, 2014 | 28 nm | [1] 2 | 2.2 | 3.0 | 96 KB inst. per module 16 KB data per core |
1 | — | 1600 | 15-
17 |
0-100 | RE219NECH23JA | ||||
RX-225FB | R4 | 192:12:4 3 CU |
464 | 533 | 178.1 | RE225FECH23JA | ||||||||||
RX-425BB | [2] 4 | 2.5 | 3.4 | 4 | R6 | 384:24:8 6 CU |
576 | 654 | 442.3 | 1866 | 30-
35 |
RE425BDGH44JA | ||||
RX-427BB | 2.7 | 3.6 | R7 | 512:32:8 8 CU |
600 | 686 | 614.4 | 2133 | 30-
35 |
RE427BDGH44JA | ||||||
RX-427NB | — | RE427NDGH44JA |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 28 nm
- Socket FP4
- Up to 4 Excavator x86 cores[201]
- L1 Cache: 32 KB Data per core and 96 KB Instructions per module
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, XOP, FMA3, FMA4, F16C, ABM, BMI1, BMI2, TBM, RDRAND
- GPU microarchitecture: Graphics Core Next (GCN) (up to 8 CUs) with support for DirectX 12
- Dual channel 64-bit DDR4 or DDR3 memory with ECC
- Unified Video Decode (UVD) 6 (4K H.265 and H.264 decode) and Video Coding Engine (VCE) 3.1 (4K H.264 encode)
- Dedicated AMD Secure Processor supports secure boot with AMD Hardware Validated Boot (HVB)
- Integrated FCH featuring PCIe 3.0 USB3.0, SATA3, SD, GPIO, SPI, I2S, I2C, UART
Model | Released | Fab | Stepping | CPU | GPU | Memory support |
TDP
(W) |
Junction temperature (°C) | Part number | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[Modules/FPUs] Cores/threads |
Clock
(GHz) |
Turbo
(GHz) |
Cache[a] | Model | Config[note 1] | Clock
(GHz) |
Turbo | Processing power (GFLOPS)[b] | ||||||||||
L1 | L2
(MB) |
L3 | ||||||||||||||||
RX-216TD | October 21, 2015 | 28 nm | [1] 2 | 1.6 | 3.0 | 96 KB inst. per module 32 KB data per core |
1 | — | — | DDR3/DDR4-1600 | 12-
15 |
0-90 | RE216TAAY23KA | |||||
RX-216GD | R5 | 256:?:? 4 CU |
0.8 | — | 409.6 | RE216GAAY23KA | ||||||||||||
RX-416GD | [2] 4 | 2.4 | 2 | R6 | 384:?:? 6 CU |
0.72 | 552.9 | 15 | -40-105 | RE416GATY43KA | ||||||||
RX-418GD | October 21, 2015 | 1.8 | 3.2 | 384:?:? 6 CU |
0.8 | 614.4 | DDR3-2133 DDR4-2400 |
12-
35 |
0-90 | RE418GAAY43KA | ||||||||
RX-421BD | 2.1 | 3.4 | R7 | 512:?:? 8 CU |
819.2 | RE421BAAY43KA | ||||||||||||
RX-421ND | — | RE421NAAY43KA |
- ^ AMD in its technical documentation uses KB, which it defines as Kilobyte and as equal to 1024 bytes, and MB, which it defines as Megabyte and as equal to 1024 KB.[27]
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
1000-Series
edit- Fabrication 14 nm by GlobalFoundries
- Up to 4 Zen cores
- Socket FP5
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual channel DDR4 memory with ECC
- Fifth generation GCN based GPU
Model | Release date |
Fab | CPU | GPU | Memory support |
TDP | Junction temp. range (°C) | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Model | Config[i] | Clock (GHz) |
Processing power (GFLOPS)[ii] | |||||||||
Base | Boost | L1 | L2 | L3 | |||||||||||
V1202B | February 2018 | GloFo 14LP |
2 (4) | 2.3 | 3.2 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | Vega 3 | 192:12:16 3 CU |
1.0 | 384 | DDR4-2400 dual-channel |
12–25 W | 0–105 |
V1404I | December 2018 | 4 (8) | 2.0 | 3.6 | Vega 8 | 512:32:16 8 CU |
1.1 | 1126.4 | -40–105 | ||||||
V1500B | 2.2 | — | — | 0–105 | |||||||||||
V1605B | February 2018 | 2.0 | 3.6 | Vega 8 | 512:32:16 8 CU |
1.1 | 1126.4 | ||||||||
V1756B | 3.25 | DDR4-3200 dual-channel |
35–54 W | ||||||||||||
V1780B | December 2018 | 3.35 | — | ||||||||||||
V1807B | February 2018 | 3.8 | Vega 11 | 704:44:16 11 CU |
1.3 | 1830.4 |
- ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 14 nm by GlobalFoundries
- Up to 2 Zen cores
- Socket FP5
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
- Dual channel DDR4 memory with ECC
- Fifth generation GCN based GPU
Model | Release date |
Fab | CPU | GPU | Memory support |
TDP | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Model | Config[i] | Clock (GHz) |
Processing power (GFLOPS)[ii] | ||||||||
Base | Boost | L1 | L2 | L3 | ||||||||||
R1102G | February 25, 2020 | GloFo 14LP |
2 (2) | 1.2 | 2.6 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | Vega 3 | 192:12:4 3 CU |
1.0 | 384 | DDR4-2400 single-channel |
6 W |
R1305G | 2 (4) | 1.5 | 2.8 | DDR4-2400 dual-channel |
8-10 W | |||||||||
R1505G | April 16, 2019 | 2.4 | 3.3 | 12–25 W | ||||||||||
R1606G | 2.6 | 3.5 | 1.2 | 460.8 |
- ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
2000-Series
edit- Fabrication 7 nm by TSMC
- Up to 8 Zen 2 cores
- Fifth generation GCN based GPU
Model | Release date |
Fab | CPU | GPU | Socket | PCIe support |
Memory support |
TDP | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Archi- tecture |
Config[i] | Clock (GHz) |
Processing power[ii] (GFLOPS) | ||||||||||
Base | Boost | L1 | L2 | L3 | ||||||||||||
V2516[202] | November 10, 2020[203] | TSMC 7FF |
6 (12) | 2.1 | 3.95 | 32 KB inst. 32 KB data per core |
512 KB per core |
8 MB | GCN 5 | 384:24:8 6 CU |
1.5 | 1152 | FP6 | 20 (8+4+4+4) PCIe 3.0 |
DDR4-3200 dual-channel LPDDR4X-4266 quad-channel |
10–25 W |
V2546[202] | 3.0 | 3.95 | 35–54 W | |||||||||||||
V2718[202] | 8 (16) | 1.7 | 4.15 | 448:28:8 7 CU |
1.6 | 1433.6 | 10–25 W | |||||||||
V2748[202] | 2.9 | 4.25 | 35–54 W |
- ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- Fabrication 12 nm by GlobalFoundries
- Up to 4 Zen+ cores
- MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, AVX2, FMA3, F16C, ABM, BMI1, BMI2, RDRAND, Turbo Core
Model | Release date |
Fab | CPU | GPU | Socket | PCIe support |
Memory support |
TDP | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Cores (threads) |
Clock rate (GHz) | Cache | Archi- tecture |
Config[i] | Clock (GHz) |
Processing power[ii] (GFLOPS) | ||||||||||
Base | Boost | L1 | L2 | L3 | ||||||||||||
R2312[204] | June 7, 2022[205] | GloFo 12LP |
2 (4) | 2.7 | 3.5 | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | GCN 5 | 192:12:4 3 CU |
1.2 | 460.8 | FP5 | 8 lanes Gen 3 |
DDR4-2400 dual-channel ECC |
10–25 W |
R2314[204] | 4 (4) | 2.1 | 384:24:8 6 CU |
921.6 | 16 lanes Gen 3 |
DDR4-2666 dual-channel ECC |
10–35 W |
- ^ Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
- ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
Custom APUs
editAs of May 1, 2013, AMD opened the doors of their "semi-custom" business unit.[206] Since these chips are custom-made for specific customer needs, they vary widely from both consumer-grade APUs and even the other custom-built ones. Some notable examples of semi-custom chips that have come from this sector include the chips from the PlayStation 4 and Xbox One.[207] So far the size of the integrated GPU in these semi-custom APUs exceed by far the GPU size in the consumer-grade APUs.
Chip (device) |
Release date | Fab | Die area (mm2) | CPU | GPU | Memory | Storage | API support | Special features | ||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Archi- tecture |
Cores | Clock (GHz) | L2 cache | Archi- tecture |
Core config[a] | Clock (MHz) | GFLOPS[b] | Pixel fillrate (GP/s)[c] | Texture fillrate (GT/s)[d] | Other | Size | Bus type & width | Band- width (GB/s) |
Audio | Other | ||||||
Liverpool (PS4) |
Nov 2013 | 28 nm | 348 | Jaguar | 8 cores | 1.6 | 2× 2 MB | GCN 2 | 1152:72:32 18 CU |
800 | 1843 | 25.6 | 57.6 | 8 ACEs | 8 GB | GDDR5 256-bit |
176 | 3DBD/DVD 1× 2.5" SATA hard drive Easily replaceable hard drive USB 3.0 |
OpenGL 4.2, GNM, GNMX and PSSL | Dolby Atmos (BD) S/PDIF |
PS VR PS4 additional modules HDR10 (except discs)[e] CEC Optional IR sensor |
Durango (Xbox One) |
Nov 2013 | 363 | 1.75 | 768:48:16 12 CU |
853 | 1310 | 13.6 | 40.9 | 2 ACEs | 32 MB | ESRAM[f] | 204 | 3DBD/DVD/CD 1× 2.5" SATA hard drive USB 3.0 |
Direct3D 11.2 and 12 | Fully Dolby Atmos, DTS:X, and Windows Sonic S/PDIF |
Xbox One additional modules FreeSync (1) HDMI 1.4 through IR sensor and IR out port Kensington lock | |||||
8 GB | DDR3 256-bit |
68 | |||||||||||||||||||
Edmonton (Xbox One S) [208] |
Jun 2016 | 16 nm | 240 | 914 | 1404 | 14.6 | 43.9 | 2 ACEs | 32 MB | ESRAM | 219 | 4KBD/3DBD/DVD/CD[g] 1× 2.5" SATA hard drive USB 3.0 |
Fully Dolby Atmos, DTS:X, and Windows Sonic S/PDIF |
Xbox One S additional modules Fully HDR10 Dolby Vision (streaming) FreeSync (1&2) HDMI 1.4 through IR sensor and IR out port Kensington lock | |||||||
8 GB | DDR3 256-bit |
68 | |||||||||||||||||||
(PS4 Slim) | Sep 2016 | 208 | 1.6 | 1152:72:32 18 CU |
800 | 1843 | 25.6 | 57.6 | 8 ACEs | 8 GB | GDDR5 256-bit |
176 | 3DBD/DVD 1× 2.5" SATA hard drive Easily replaceable hard drive USB 3.0 |
OpenGL 4.2, GNM, GNMX and PSSL | Dolby Atmos (BD) | PS VR PS4 Slim additional modules HDR10 (except discs) CEC Optional IR sensor | |||||
Neo (PS4 Pro) [209][210][211] |
Nov 2016 | 325 | 2.13 | GCN 4 (Polaris) [212] |
2304:144:32 36 CU |
911 | 4198 | 58.3 | 131.2 | 4 ACEs and 2 HWS Double-rate FP16[h] checkerboard rendering |
8 GB[213] | GDDR5 256-bit |
218 | 3DBD/DVD 1× 2.5" SATA hard drive Easily replaceable hard drive USB 3.0 |
OpenGL 4.2 (4.5), GNM, GNMX and PSSL | Dolby Atmos (BD) S/PDIF |
PS VR PS4 Pro additional modules HDR10 (except discs) Up to 4K@60 Hz CEC Optional IR sensor | ||||
1 GB | DDR3[i] | ? | |||||||||||||||||||
Scorpio (Xbox One X) [214][215][216] |
Nov 2017 | 359 | Customized Jaguar |
2.3 | 2560:160:32 40 CU |
1172 | 6001 | 37.5 | 187.5 | 4 ACEs and 2 HWS | 12 GB | GDDR5 384-bit |
326 | 4KBD/3DBD/DVD/CD 1× 2.5" SATA hard drive USB 3.0 |
Direct3D 11.2 and 12 | Fully Dolby Atmos, DTS:X, and Windows Sonic S/PDIF |
Xbox One X additional modules Fully HDR10 Dolby Vision (streaming) FreeSync (1&2) Up to 4K@60 Hz HDMI 1.4b through IR sensor and IR out port | ||||
Fenghuang (Subor Z+) [217][218][219] |
cancelled [220] | 14 nm [221] | 397 | Zen | 4 cores 8 threads |
3.0 | GCN 5 | 1536:96:32 24 CU |
1300 | 3994 | 41.6 | 124.8 | Double-rate FP16 | 8 GB | GDDR5 256-bit |
154 | 1× 2.5" SATA SSD 1× 2.5" SATA hard drive Easily replaceable drives USB 3.0 |
Vulkan 1.1, Direct3D 12.1 | S/PDIF | Subor Z Plus additional modules Windows 10 Enterprise LTSC | |
Oberon (PS5)[222] |
Nov 2020 | 7 nm | 308 | Zen 2 | 8 cores 16 threads |
3.5 (variable) | 4 MB | RDNA 2 | 2304:144:64 36 CU |
2233 (variable) | 10290 (variable) | 142.9 | 321.6 | Double-rate FP16 Real-time ray tracing Primitive shaders Custom 3D audio blocks |
16 GB | GDDR6 256-bit |
448 | 4KBD Custom 5.5 GB/s PCIe 4.0 x4 NVMe SSD PCIe 4.0 M.2 slot Easily replaceable M.2 SSD USB (except PS5 games) |
Vulkan 1.2 | PS5 TEMPEST 3D AudioTech | PS VR Dedicated DMA controller and I/O coprocessors Custom coherency engines and cache scrubbers Custom decompression block HDR Up to 4K@120 Hz Up to 8K@30 Hz |
Anaconda (Xbox Series X) |
Nov 2020 | 360 | 3.6 (3.8 w/o SMT) |
3328:208:64 52 CU |
1825 | 12147 | 116.8 | 379.6 | Double-rate FP16 Real-time ray tracing Mesh shaders Variable rate shading ANN acceleration |
10 GB | GDDR6 320-bit |
560 | 4KBD Custom 2.4 GB/s NVMe SSD Custom expansion card USB 3.1 (except XSX games) |
DirectX 12 Ultimate | Custom spatial audio block MS Project Acoustics Fully Dolby Atmos, DTS:X, and Windows Sonic |
Custom decompression block HDR VRR Up to 4K@120 Hz Up to 8K@30 Hz CEC | |||||
6 GB | GDDR6 192-bit[j] |
336 | |||||||||||||||||||
Lockhart (Xbox Series S) |
197 | 3.4 (3.6 w/o SMT) |
1280:80:32 20 CU |
1565 | 4006 | 50.1 | 125.2 | 8 GB | GDDR6 128-bit |
224 | |||||||||||
2 GB | GDDR6 32-bit |
56 | |||||||||||||||||||
Van Gogh "Aerith" (Steam Deck)[223] |
Dec 2021 | 163 | 4 cores 8 threads |
2.4-3.5 | 2 MB | 512:32:16 8 CU |
1000-1600 | 1000-1600 | 16-25.6 | 32-51.2 | Double-rate FP16 Real-time ray tracing Variable rate shading |
16 GB | LPDDR5 128-bit |
88 | 64 GB eMMC (PCIe Gen 2 × 1) 256 GB NVMe SSD (PCIe Gen 3 × 4) 512 GB NVMe SSD (PCIe Gen 3 × 4) microSD card slot |
DirectX 9-12 Ultimate, OpenGL 4.6, Vulkan 1.2 | |||||
Van Gogh "Sephiroth" (Steam Deck OLED) |
Nov 2023 | 6 nm | 131 | 102 | 256 GB NVMe SSD (PCIe Gen 3 × 4) 512 GB NVMe SSD (PCIe Gen 3 × 4) 1 TB NVMe SSD (PCIe Gen 3 × 4) microSD card slot |
||||||||||||||||
Viola (PS5 Pro) |
Nov 2024 | 4 nm | 260 | 8 cores 16 threads |
3.85 (variable) |
4 MB | RDNA 3 | 3840:240:120 60 CU |
2180 (variable) |
16742 (variable) |
261.6 | 523.2 | Double-rate FP16 Real-time ray tracing Primitive shaders Custom 3D audio blocks Hardware-accelerated upscaling |
16 GB | GDDR6 256-bit |
576 | 4KBD 2 TB NVMe SSD (PCIe Gen 4 × 4) PCIe 4.0 M.2 slot USB |
Vulkan 1.2 | PS5 TEMPEST 3D AudioTech | PS VR Dedicated DMA controller and I/O coprocessors Custom coherency engines and cache scrubbers Custom decompression block HDR Up to 4K@120 Hz Up to 8K@60 Hz | |
2 GB | DDR5 | ? |
- ^ Unified shaders : Texture mapping units : Render output units
- ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Pixel fillrate is calculated as the number of ROPs multiplied by the base (or boost) core clock speed.
- ^ Texture fillrate is calculated as the number of TMUs multiplied by the base (or boost) core clock speed.
- ^ UHD BD is the only video disc format supporting HDR.
- ^ Cache
- ^ "Digital" version does not have an optical drive.
- ^ Feature preview of Rapid Packed Math, introduced in GCN 5.
- ^ Swap
- ^ A plain 320-bit 20 GB version could be made by just replacing four 1 GB GDDR6 chips by 2 GB ones.
See also
editNotes
edit- ^ a b c d e Unified shader processors (USPs): Texture mapping units (TMUs): Render output units (ROPs). 1 CU (Compute Unit) = 64 USPs: 4 TMUs : 1 ROPs
References
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- ^ a b "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved June 6, 2017.
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- ^ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved August 13, 2016
- ^ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved July 6, 2014.
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- ^ Theo Valich (May 28, 2012). "AMD Comes Clean on Transistor Numbers With FX, Fusion Processors". Retrieved August 23, 2013.
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- ^ a b c d e f g h i j k l m n o p q r s t u v w x y z aa ab ac ad ae af ag ah "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). AMD Technical Documentation. AMD Developer Central: Advanced Micro Devices, Inc. April 15, 2017. p. 25. Archived (PDF) from the original on October 24, 2019. Retrieved November 1, 2019.
- ^ "Trinity Improvements Include Updated Piledriver Cores and VLIW4 GPUs". May 4, 2012. Archived from the original on November 10, 2013. Retrieved November 10, 2013.
- ^ a b c "AMD detonates Trinity: Behold Bulldozer's second coming - ExtremeTech". Retrieved October 7, 2017.
- ^ "AMD Trinity On The Desktop: A10, A8, And A6 Get Benchmarked!—Trinity: Coming Soon To A Desktop Near You". Retrieved November 10, 2013.
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