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IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
RoR: A low insertion loss design of rearrangeable hybrid photonic-plasmonic 6 × 6 non-blocking router for ONoCs
Muhammad Rehan YahyaNing Wu School of Electrical and Electronic Engineering, Anhui Science and Technology University">Gaizhen YanFen GeTanveer Ahmed
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2019 Volume 16 Issue 13 Pages 20190346

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Abstract

Optical networks on chip (ONoC) delivers a promising alternative to meet growing needs of higher bandwidth and low power consumption in manycore processors. Optical routers are the key element in ONoCs that significantly affect the performance of overall network. In this letter, we propose a rearrangeable non-blocking 6 × 6 router (RoR) constructed with 2 × 2 hybrid photonic-plasmonic switching (HPPS) elements. Router architectures with 15 HPPS elements and an optimized design using reduced HPPS elements are presented and analyzed. In optimized form, proposed design consumes only 12 HPPS elements which results in low insertion loss and crosstalk noise in comparison to the un-optimized architecture. We observe up to 50% reduction in switching elements count in comparison to other router architecture of same radix.

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© 2019 by The Institute of Electronics, Information and Communication Engineers
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