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ORCIDEric M. Schwarz
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2010 – 2019
- 2015
[j20]Eric M. Schwarz, R. B. Krishnamurthy, C. J. Parris, Jonathan D. Bradbury, I. M. Nnebe, Michael Gschwind:
The SIMD accelerator for business analytics on the IBM z13. IBM J. Res. Dev. 59(4/5) (2015)- 2011
- [j19]Brian W. Curran, Lee Eisen, Eric M. Schwarz, Pak-kin Mak, James D. Warnock, Patrick J. Meaney, Michael F. Fee:
The zEnterprise 196 System and Microprocessor. IEEE Micro 31(2): 26-40 (2011) - [c16]James D. Warnock, Y. Chan, William V. Huott, Sean M. Carey, Michael F. Fee, Huajun Wen, Mary Jo Saccamango, Frank Malgioglio, Patrick J. Meaney, Donald W. Plass, Yuen H. Chan, Mark D. Mayo, Guenter Mayer, Leon J. Sigal, David L. Rude, Robert M. Averill III, Michael H. Wood, Thomas Strach, Howard H. Smith, Brian W. Curran, Eric M. Schwarz, Lee Eisen, Doug Malone, Steve Weitzel, Pak-kin Mak, Thomas J. McPherson, Charles F. Webb:
A 5.2GHz microprocessor chip for the IBM zEnterprise™ system. ISSCC 2011: 70-72 - 2010
- [j18]Liang-Kai Wang, Mark A. Erle, Charles Tsen, Eric M. Schwarz, Michael J. Schulte:
A survey of hardware designs for decimal arithmetic. IBM J. Res. Dev. 54(2): 8 (2010) - [j17]Xiao Yan Zhang, Yiu-Hing Chan, Robert K. Montoye, Leon J. Sigal, Eric M. Schwarz, Michael Kelly:
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit. J. Signal Process. Syst. 58(2): 139-144 (2010)
2000 – 2009
- 2009
- [j16]Eric M. Schwarz, John S. Kapernick, Mike F. Cowlishaw:
Decimal floating-point support on the IBM System z10 processor. IBM J. Res. Dev. 53(1): 4 (2009) - 2007
- [j15]Hung Q. Le, William J. Starke, J. Stephen Fields, Francis P. O'Connell, Dung Q. Nguyen, Bruce J. Ronchetti, Wolfram Sauer, Eric M. Schwarz, Michael T. Vaden:
IBM POWER6 microarchitecture. IBM J. Res. Dev. 51(6): 639-662 (2007) - [j14]Lee Eisen, John Wesley Ward III, Hans-Werner Tast, Nicolas Mäding, Jens Leenstra, Silvia M. Müller, Christian Jacobi, Jochen Preiss, Eric M. Schwarz, Steven R. Carlough:
IBM POWER6 accelerators: VMX and DFU. IBM J. Res. Dev. 51(6): 663-684 (2007) - [c15]Son Dao Trong, Martin S. Schmookler, Eric M. Schwarz, Michael Kroener:
P6 Binary Floating-Point Unit. IEEE Symposium on Computer Arithmetic 2007: 77-86 - [c14]Eric M. Schwarz, Steven R. Carlough:
Power6 Decimal Divide. ASAP 2007: 128-133 - 2006
- [c13]Brian W. Curran, Bradley D. McCredie, Leonid Sigal, Eric M. Schwarz, Bruce M. Fleischer, Yuen H. Chan, D. Webber, Vaden Vaden, A. Goyal:
4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor. ISSCC 2006: 1728-1734 - 2005
- [j13]Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong:
FPU Implementations with Denormalized Numbers. IEEE Trans. Computers 54(7): 825-836 (2005) - [c12]Mark A. Erle, Eric M. Schwarz, Michael J. Schulte:
Decimal Multiplication with Efficient Partial Product Generation. IEEE Symposium on Computer Arithmetic 2005: 21-28 - 2004
- [j12]Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess, Christopher A. Krygowski, Bruce M. Fleischer, Michael Kroener:
The IBM eServer z990 floating-point unit. IBM J. Res. Dev. 48(3-4): 311-322 (2004) - 2003
- [c11]Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong:
Hardware Implementations of Denormalized Numbers. IEEE Symposium on Computer Arithmetic 2003: 70-78 - [c10]Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess:
High Performance Floating-Point Unit with 116 Bit Wide Divider. IEEE Symposium on Computer Arithmetic 2003: 87-94 - [c9]Eric M. Schwarz:
Panel: Revisions to the IEEE 754 Standard for Floating-Point Arithmetic. IEEE Symposium on Computer Arithmetic 2003: 112- - 2002
- [j11]Eric M. Schwarz, Mark A. Check, Chung-Lung Kevin Shum, Thomas Koehler, Scott B. Swaney, John D. MacDougall, Christopher A. Krygowski:
The microarchitecture of the IBM eServer z900 processor. IBM J. Res. Dev. 46(4-5): 381-396 (2002) - 2001
- [c8]Michael F. Cowlishaw, Eric M. Schwarz, Ronald M. Smith, Charles F. Webb:
A Decimal Floating-Point Specification. IEEE Symposium on Computer Arithmetic 2001: 147-154
1990 – 1999
- 1999
- [j10]Eric M. Schwarz, Christopher A. Krygowski:
The S/390 G5 floating-point unit. IBM J. Res. Dev. 43(5): 707-722 (1999) - [j9]Timothy J. Slegel, Robert M. Averill III, Mark A. Check, Bruce C. Giamei, Barry Krumm, Christopher A. Krygowski, W. H. Li, John S. Liptay, John D. MacDougall, Thomas J. McPherson, Jennifer A. Navarro, Eric M. Schwarz, Chung-Lung Kevin Shum, Charles F. Webb:
IBM's S/390 G5 microprocessor design. IEEE Micro 19(2): 12-23 (1999) - [c7]Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski:
The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures. IEEE Symposium on Computer Arithmetic 1999: 258-265 - 1997
- [j8]Eric M. Schwarz, Leon J. Sigal, Thomas J. McPherson:
CMOS floating-point unit for the S/390 Parallel Enterprise Server G4. IBM J. Res. Dev. 41(4&5): 475-488 (1997) - [j7]Charles F. Webb, Carl J. Anderson, Leon J. Sigal, Kenneth L. Shepard, John S. Liptay, James D. Warnock, Brian W. Curran, Barry Krumm, Mark D. Mayo, Peter J. Camporese, Eric M. Schwarz, Mark S. Farrell, Phillip J. Restle, Robert M. Averill III, Timothy J. Slegel, William V. Huott, Yuen H. Chan, Bruce Wile, Thao N. Nguyen, Philip G. Emma, Daniel K. Beece, Ching-Te Chuang, Cyril Price:
A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders. IEEE J. Solid State Circuits 32(11): 1676-1682 (1997) - [c6]Eric M. Schwarz, Robert M. Averill III, Leon J. Sigal:
A Radix-8 CMOS S/390 Multiplier. IEEE Symposium on Computer Arithmetic 1997: 2-9 - 1996
- [j6]Eric M. Schwarz, Michael J. Flynn:
Hardware Starting Approximation Method and Its Application to the Square Root Operation. IEEE Trans. Computers 45(12): 1356-1369 (1996) - 1995
- [c5]Michael J. Flynn, Kevin J. Nowka
, Gary Bewick, Eric M. Schwarz, Nhon T. Quach:
The SNAP Project: Towards Sub-Nanosecond Arithmetic. IEEE Symposium on Computer Arithmetic 1995: 75- - 1993
- [j5]Eric M. Schwarz, Michael J. Flynn:
Parallel High-Radix Nonrestoring Division. IEEE Trans. Computers 42(10): 1234-1246 (1993) - [c4]Eric M. Schwarz, Michael J. Flynn:
Hardware starting approximation for the square root operation. IEEE Symposium on Computer Arithmetic 1993: 103-111 - 1991
- [j4]Stamatis Vassiliadis, Eric M. Schwarz, Baik Moon Sung:
Hard-Wired Multipliers with Encoded Partial Products. IEEE Trans. Computers 40(11): 1181-1197 (1991) - [j3]Eric M. Schwarz, Michael J. Flynn:
Cost-efficient high-radix division. J. VLSI Signal Process. 3(4): 293-305 (1991) - 1990
- [c3]Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi:
Results on the Interface between Formal Verification and ATPG. CAV (DIMACS/AMS volume) 1990: 615-628 - [c2]Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi:
ATPG Aspects of FSM Verification. ICCAD 1990: 134-137
1980 – 1989
- 1989
- [j2]Stamatis Vassiliadis, Eric M. Schwarz, Don J. Hanrahan:
A General Proof for Overlapped Multiple-Bit Scanning Multiplications. IEEE Trans. Computers 38(2): 172-183 (1989) - [c1]Glenn Colón-Bonet, Eric M. Schwarz, D. G. Bostick, Gary D. Hachtel, Michael R. Lightner:
On optimal extraction of combinational logic and don't care sets from hardware description languages. ICCAD 1989: 308-311 - 1988
- [j1]Stamatis Vassiliadis, Michael Putrino, Eric M. Schwarz:
Parallel Encryted Array Multipliers. IBM J. Res. Dev. 32(4): 536-551 (1988)
Coauthor Index
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