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2000 – 2009
- 2009
[c12]Woo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong:
In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem. DATE 2009: 1058-1063- 2007
- [c11]Young-Sang Kim, Seung-Jin Park, Yong-Sub Kim, Dong-Bi Jang, Seh-Woong Jeong, Hong-June Park, Jae-Yoon Sim:
A 40-to-800MHz Locking Multi-Phase DLL. ISSCC 2007: 306-605 - 2006
- [j7]Donghyun Kim, Kyusik Chung, Chang-Hyo Yu, Chun-Ho Kim, Inho Lee, Jaewan Bae, Young-Jun Kim, Jae-Hyeon Park, Sungbeen Kim, Yong-Ha Park, Nak Hee Seong, Jin-Aeon Lee, Jaehong Park, Stephen Oh, Seh-Woong Jeong, Lee-Sup Kim:
An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications. IEEE J. Solid State Circuits 41(1): 71-84 (2006) - 2003
- [j6]Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems:
An Intelligent Cache System with Hardware Prefetching for High Performance. IEEE Trans. Computers 52(5): 607-616 (2003) - 2002
- [j5]Jin-Hyuck Choi, Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems:
A Low Power TLB Structure for Embedded Systems. IEEE Comput. Archit. Lett. 1 (2002) - [j4]Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems:
A banked-promotion translation lookaside buffer system. J. Syst. Archit. 47(14-15): 1065-1078 (2002) - [c10]Woo-Young Jang, Byung-Hoan Chon, Seh-Woong Jeong, Kwanghoon Sohn:
Grouped zerotree wavelet image coding for very low bit rate. ICIP (3) 2002: 261-264 - 2001
- [j3]Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, H. S. Yang:
CalmRISCTM: a low power microcontroller with efficient coprocessor interface. Microprocess. Microsystems 25(5): 247-261 (2001) - [c9]Jung-Hoon Lee, Jang-Soo Lee, Seh-Woong Jeong, Shin-Dug Kim:
A Banked-Promotion TLB for High Performance and Low Power. ICCD 2001: 118-123 - [c8]Sangyeun Cho, Wooyoung Jung, Yongchun Kim, Seh-Woong Jeong:
A Low-Power Cache Design for CalmRISCTM-Based Systems. ICCD 2001: 394-399 - [c7]Pipat Reungsang, Sun Kyu Park, Seh-Woong Jeong, Hyung-Lae Roh, Gyungho Lee:
Reducing Cache Pollution of Prefetching in a Small Data Cache. ICCD 2001: 530-533
1990 – 1999
- 1999
- [c6]Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, Seung-Jae Jeong, Hong-Kyu Kim, Yang-Ho Kim, Bong-Young Chung, Hyung-Lae Roh, H. S. Yang:
CalmRISCTM: A Low Power Microcontroller with Efficient Coprocessor Interface. ICCD 1999: 299-302 - 1994
- [j2]Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel:
Exact calculation of synchronizing sequences based on binary decision diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(8): 1024-1034 (1994) - 1993
- [j1]Hyunwoo Cho, Seh-Woong Jeong, Fabio Somenzi, Carl Pixley:
Synchronizing sequences and symbolic traversal techniques in test generation. J. Electron. Test. 4(1): 19-31 (1993) - 1992
- [c5]Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel:
Exact Calculation of Synchronization Sequences Based on Binary Decision Diagrams. DAC 1992: 620-623 - [c4]Seh-Woong Jeong, Fabio Somenzi:
A new algorithm for the binate covering problem and its application to the minimization of Boolean relations. ICCAD 1992: 417-420 - 1991
- [c3]Seh-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi:
Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms. ICCAD 1991: 464-467 - 1990
- [c2]Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi:
Results on the Interface between Formal Verification and ATPG. CAV (DIMACS/AMS volume) 1990: 615-628 - [c1]Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi:
ATPG Aspects of FSM Verification. ICCAD 1990: 134-137
Coauthor Index
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