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2020 – today
- 2024
[j14]Bastien Giraud
, Sebastien Ricavy, Cyrille Laffond, Ilan Sever, Valentin Gherman, Florent Lepin, Mariam Diallo, Khadija Zenati, Sylvain Dumas, Olivier Guille, Maxim Vershkov, Alessandro Bricalli, Giuseppe Piccolboni, Jean-Philippe Noel, Anass Samir, Gaël Pillonnet, Yvain Thonnart, Gabriel Molas:
Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro. IEEE J. Solid State Circuits 59(9): 3045-3057 (2024)- [c43]Quentin Schmidt, Brian Martinez, Thomas Houriez, Baptiste Jadot, Aloysius G. M. Jansen, Xavier Jehl, Tristan Meunier, Gaël Pillonnet, Gérard Billiot, Adrien Morel, Yvain Thonnart, Franck Badets:
A 7.4μW and 860μm2per Channel Cryo-CMOS IC for 70-Channel Frequency-Multiplexed μs-Readout of Semiconductor Qubits. CICC 2024: 1-2 - 2023
- [j13]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58(6): 1782-1797 (2023) - [c42]Baptiste Jadot, Marcos Zurita, Gérard Billiot, Yvain Thonnart, Loïck Le Guevel, Mathieu Darnas, Candice Thomas, Jean Charbonnier, Tristan Meunier, Maud Vinet, Franck Badets, Gaël Pillonnet:
A Cryogenic Active Router for Qubit Array Biasing from DC to 320 MHz at 100 nm Gate Pitch. ESSCIRC 2023: 157-160 - [c41]Bastien Giraud, Sebastien Ricavy, Yasser Moursy, Cyrille Laffond, Ilan Sever, Valentin Gherman, Manuel Pezzin, Florent Lepin, Mariam Diallo, Khadija Zenati, Sylvain Dumas, Maxim Vershkov, Alessandro Bricalli, Giuseppe Piccolboni, Jean-Philippe Noël, Anass Samir, Gaël Pillonnet, Yvain Thonnart, Gabriel Molas:
Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro. IMW 2023: 1-4 - [i2]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR abs/2304.13726 (2023) - 2022
- [j12]Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi:
Architecting Optically Controlled Phase Change Memory. ACM Trans. Archit. Code Optim. 19(4): 48:1-48:26 (2022) - 2021
- [j11]Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, César Fuguet Tortolero, Ivan Miro-Panades, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy:
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56(1): 79-97 (2021) - [j10]Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun:
PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10): 2156-2169 (2021) - [c40]Alicia Klinefelter, Huichu Liu, Luca Benini, Yvain Thonnart, Keith A. Bowman, Kathy Wilcox, David Bol, Alvin Loke, Ofer Shacham:
SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration. ISSCC 2021: 539-540 - [c39]Yvain Thonnart:
Designing a Multi-Chiplet Manycore System using the POPSTAR Optical NoC Architecture (Invited). SLIP 2021: 42 - [i1]Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi:
Architecting Optically-Controlled Phase Change Memory. CoRR abs/2107.11516 (2021) - 2020
- [c38]Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi, Ayse K. Coskun:
System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. DATE 2020: 1444-1449 - [c37]Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet Tortolero, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse K. Coskun, Denis Dutoit, Pascal Vivet:
POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. DATE 2020: 1456-1461 - [c36]Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy:
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. ISSCC 2020: 46-48 - [c35]Loïck Le Guevel, Gérard Billiot, Xavier Jehl, Silvano De Franceschi, Marcos Zurita, Yvain Thonnart, Maud Vinet, Marc Sanquer, Romain Maurand, Aloysius G. M. Jansen, Gaël Pillonnet:
19.2 A 110mK 295µW 28nm FDSOI CMOS Quantum Integrated Circuit with a 2.8GHz Excitation and nA Current Sensing of an On-Chip Double Quantum Dot. ISSCC 2020: 306-308
2010 – 2019
- 2019
- [c34]Yvain Thonnart, Pascal Vivet, Shikhanshu Agarwal, Ramesh Chauhan:
Latency Improvement of an Industrial SoC System Interconnect using an Asynchronous NoC Backbone. ASYNC 2019: 46-47 - [c33]Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero, Ayse K. Coskun:
WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs. DATE 2019: 516-521 - 2018
- [c32]Yvain Thonnart, Mounir Zid, Jose-Luis Gonzalez Jimenez, Guillaume Waltener, Robert Polster, Olivier Dubray, Florent Lepin, Stéphane Bernabé, Sylvie Menezo, Gabriel Pares, Olivier Castany, Laura Boutafa, Philippe Grosse, Benoît Charbonnier, Charles Baudot:
A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm2 Die-to-Die Optical Networks. ISSCC 2018: 350-352 - 2017
- [j9]Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel:
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits 52(1): 33-49 (2017) - [c31]Ivan Miro Panades, Edith Beigné, Olivier Billoint, Yvain Thonnart:
In-situ Fmax/Vmin tracking for energy efficiency and reliability optimization. IOLTS 2017: 96-99 - 2016
- [j8]Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael K. V. Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart:
Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2475-2487 (2016) - [j7]Robert Polster, Yvain Thonnart, Guillaume Waltener, Jose-Luis Gonzalez Jimenez, Eric Cassan:
Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3450-3459 (2016) - [c30]Pascal Vivet, Yvain Thonnart, Romain Lemaire, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Cristiano Santos, Fabien Clermidy, Séverine Cheramy, Frédéric Pétrot, Eric Flamand, Jean Michailos:
8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links. ISSCC 2016: 146-147 - [c29]Jose-Luis Gonzalez Jimenez, Robert Polster, Guillaume Waltener, Yvain Thonnart, Eric Cassan:
10 Gbps, 560 fJ/b TIA and modulator driver for optical networks-on-chip in CMOS 65nm. NEWCAS 2016: 1-4 - 2015
- [j6]Edith Beigné, Alexandre Valentian, Ivan Miro Panades, Robin Wilson, Philippe Flatresse, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Jean-Philippe Noel, Olivier Thomas, Yvain Thonnart:
A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking. IEEE J. Solid State Circuits 50(1): 125-136 (2015) - [c28]Pascal Vivet, Christian Bernard, Fabien Clermidy, Denis Dutoit, Eric Guthmuller, Ivan Miro Panades, Gaël Pillonnet, Yvain Thonnart, Arnaud Garnier, Didier Lattard, Amandine Jouve, Franck Bana, Thierry Mourier, Séverine Cheramy:
3D advanced integration technology for heterogeneous systems. 3DIC 2015: FS6.1-FS6.3 - [c27]Julian J. H. Pontes, Pascal Vivet, Yvain Thonnart:
Two-phase protocol converters for 3D asynchronous 1-of-n data links. ASP-DAC 2015: 154-159 - [c26]Hui Li, Sébastien Le Beux, Yvain Thonnart, Ian O'Connor:
Complementary communication path for energy efficient on-chip optical interconnects. DAC 2015: 7:1-7:6 - [c25]Luan H. K. Duong, Mahdi Nikdast, Jiang Xu, Zhehui Wang, Yvain Thonnart, Sébastien Le Beux, Peng Yang, Xiaowen Wu, Zhifei Wang:
Coherent crosstalk noise analyses in ring-based optical interconnects. DATE 2015: 501-506 - [c24]Edith Beigné, Fabien Clermidy, Didier Lattard, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet:
Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. ISCAS 2015: 1550-1553 - [c23]Pascal Vivet, Christian Bernard, Eric Guthmuller, Ivan Miro Panades, Yvain Thonnart, Fabien Clermidy:
Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects. ISVLSI 2015: 615-620 - 2014
- [j5]Ivan Miro Panades, Edith Beigné, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Anca Molnos, Farhat Thabet, Benoît Tain, Karim Ben Chehida, Sylvain Engels, Robin Wilson, Didier Fuin:
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC. IEEE J. Solid State Circuits 49(7): 1475-1486 (2014) - [c22]Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack:
27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. ISSCC 2014: 452-453 - [c21]Jiang Xu, Sébastien Le Beux, Yvain Thonnart:
Introduction to the special session on "Silicon photonic interconnects: an illusion or a realistic solution?". NOCS 2014: 167 - [c20]Yvain Thonnart, Mounir Zid:
Technology assessment of silicon interposers for manycore SoCs: Active, passive, or optical? NOCS 2014: 168-169 - 2013
- [j4]Sahar Foroutan, Yvain Thonnart, Frédéric Pétrot:
An Iterative Computational Technique for Performance Evaluation of Networks-on-Chip. IEEE Trans. Computers 62(8): 1641-1655 (2013) - [c19]Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson:
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE 2013: 613-618 - [c18]Edith Beigné, Ivan Miro-Panades, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Farhat Thabet, Benoît Tain, K. Benchehida, Sylvain Engels, Robin Wilson, Didier Fuin:
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. ESSCIRC 2013: 57-60 - [c17]Bertrand Pelloux-Prayer, Alexandre Valentian, Bastien Giraud, Yvain Thonnart, Jean-Philippe Noel, Philippe Flatresse, Edith Beigné:
Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology. VLSI-SoC 2013: 168-173 - 2012
- [c16]Yvain Thonnart, Edith Beigné, Pascal Vivet:
A Pseudo-Synchronous Implementation Flow for WCHB QDI Asynchronous Circuits. ASYNC 2012: 73-80 - 2011
- [c15]Pascal Vivet, Denis Dutoit, Yvain Thonnart, Fabien Clermidy:
3D NoC using through silicon Via: An asynchronous implementation. VLSI-SoC 2011: 232-237 - 2010
- [c14]Yvain Thonnart, Pascal Vivet, Fabien Clermidy:
A fully-asynchronous low-power framework for GALS NoC integration. DATE 2010: 33-38 - [c13]Sahar Foroutan, Yvain Thonnart, Richard Hersemeule, Ahmed Jerraya:
An analytical method for evaluating Network-on-Chip performance. DATE 2010: 1629-1632 - [c12]Sahar Foroutan, Yvain Thonnart, Richard Hersemeule, Ahmed Jerraya:
A Markov chain based method for NoC end-to-end latency evaluation. IPDPS Workshops 2010: 1-8 - [c11]Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet, Norbert Wehn:
A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC 2010: 278-279 - [c10]Yvain Thonnart, Romain Lemaire, Fabien Clermidy:
Distributed Sequencing for Resource Sharing in Multi-applicative Heterogeneous NoC Platforms. NOCS 2010: 233-240
2000 – 2009
- 2009
- [j3]Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach:
Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application. IET Comput. Digit. Tech. 3(5): 487-500 (2009) - [j2]Edith Beigné, Fabien Clermidy, Hélène Lhermet, Sylvain Miermont, Yvain Thonnart, Xuan-Tu Tran, Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, Hugo Lebreton:
An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE J. Solid State Circuits 44(4): 1167-1177 (2009) - [j1]Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet:
Power Reduction of Asynchronous Logic Circuits Using Activity Detection. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 893-906 (2009) - [c9]Yvain Thonnart, Edith Beigné, Pascal Vivet:
Design and Implementation of a GALS Adapter for ANoC Based Architectures. ASYNC 2009: 13-22 - [c8]Fabien Clermidy, Romain Lemaire, Xavier Popon, Dimitri Ktenas, Yvain Thonnart:
An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application. DSD 2009: 449-456 - [c7]Fabien Clermidy, Romain Lemaire, Yvain Thonnart, Pascal Vivet:
A Communication and configuration controller for NoC based reconfigurable data flow architecture. NOCS 2009: 153-162 - 2008
- [c6]Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet:
Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. ASYNC 2008: 48-57 - [c5]Nicolas Coste, Hubert Garavel, Holger Hermanns, Richard Hersemeule, Yvain Thonnart, Meriem Zidouni:
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures. DATE 2008: 88-89 - [c4]Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach:
A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. NOCS 2008: 149-158 - 2007
- [c3]Gwen Salaün, Wendelin Serwe, Yvain Thonnart, Pascal Vivet:
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip. ASYNC 2007: 73-82 - [c2]Xuan-Tu Tran, Jean Durupt, Yvain Thonnart, François Bertrand, Vincent Beroulle, Chantal Robach:
Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip. NOCS 2007: 216 - [c1]Cedric Koch-Hofer, Marc Renaudin, Yvain Thonnart, Pascal Vivet:
ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC. NOCS 2007: 295-306
Coauthor Index
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