CHAPTER 1: Introduction to Verilog and FPGA
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Syllabus
Week Content Notes
1 Chapter 0: Course Introduction (1)
Chapter 1: Introduction of Verilog and FPGA (2)
2 Chapter 2: Verilog Syntax, Structural Verilog and Timing (3)
3, 4 Chapter 3: Testbench, Dataflow and Behavioral Verilog (6)
5 Chapter 4: Counters, Shifters/Rotators, Parameters (3)
6 Chapter 5: Handy Testbench Constructs (3)
7 Midterm Exam Practice (3)
8 Midterm Exam (3)
9, 10 Chapter 6: Finite State Machine (FSM) in Verilog (6)
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Content
1.Digital Systems
2.Introduction of HDL
3.Verilog and VHDL
4.Verilog Module
5.Test Benches
6.FPGAs
7.KIT LP-2900 and Quartus II
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1. Digital Systems
Analog signal Digital signal
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1. Digital Systems (cont.)
Digital systems are designed to store, process, and communicate
information in digital form.
Advantages of digital devices
• Reproducibility of information
• Flexibility and functionality: easier to store, transmit information
• Easier to design and programmable
Moore’s Law
• Chips double its density (number of transistor) in every 18 months
• Devices become smaller, faster, and cheaper
• Now a chip consists of hundreds of million gates
• And we can have a “wireless-PDA-MP3-video-player-camera-GPS-cell-
phone”.
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1. Digital Systems (cont.)
Applications
• “Digitization” has spread to a wide range of applications, including
information (computers), telecommunication, control systems, …
• Digital circuitry replaces many analog systems:
Audio recording: from tape to music CD to MP3 (MPEG Layer 3) player
Image processing: from silver-hand film to digital camera
Telephone switching networks
Control systems
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1. Digital Systems (cont.)
e.g, temperature control system
• Temperature information in analog
form is measured.
• ADC (Analog-to-Digital Converter)
• Digital signal processing
• DAC (Digital-to-Analog Converter)
• Controller
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1. Digital Systems (cont.)
e.g, digital circuit in a wireless communication system
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2. Introduction of HDL
HDL = Hardware Description Language
• Allows for modeling and simulation (with timing) of digital designs
• Can be synthesized into hardware (netlist) by synthesis tools (FPGA
compilers)
• Two major standards in industry and academia
Verilog HDL (Flexible, loose, more common in industry)
VHDL – Very High-Speed Circuit HDL (Strongly typed, more
common in defense and automotive)
Having used both but this course will use Verilog (VHDL in another
course)
Once you have the concept of an HDL down (can think and code
hardware), the language makes little difference.
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2. Introduction of HDL (cont.)
• It looks like a programing language
• It is not a programing language
It is always critical to recall you are describing hardware.
This code primary purpose is to generate hardware.
The hardware this code describes (a counter) can be simulated on a computer.
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2. Introduction of HDL (cont.)
Simulating/Validating HDL
• The sad truth 10% design, 90% validation
• If you do right, you will spend 9 times more than testing/validating
a design than designing it
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2. Introduction of HDL (cont.)
Why Use an HDL?
• Enables Larger Design
More abstracted than schematics, allows larger designs
Work at transistor/gate level for large designs: complicated
• Portable Design
Behavior or dataflow Verilog can be synthesized to a new library with little
effort
Verilog written in ASCII text. The ultimate in portability. Much more portable
than the binary files of a GUI schematic capture tool.
• Explore larger solution space
Synthesis options can help optimize (power, area, speed)
• Better Validated Designs
Verilog itself is used to create the testbench: flexible method that allows self
checking tests 12
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3. Verilog and VHDL
Verilog Versus VHDL
Popularity Commercial and Industrial Defense and Automotive
Applications Systems
Syntax Based on C language and Based on Ada and Pascal
case sensitive languages, not case
sensitive
Flexibility and flexibility and freedom in clearer rules and provides
Control implementing complex stricter control over the
designs, allowing architecture of the
programmers to have hardware model
higher control over design
Development Faster and easier code More suitable for
Time writing, shorter developing large and
development time complex systems
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3. Verilog and VHDL (cont.)
Trend over time
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3. Verilog and VHDL (cont.)
VHDL: Euro, South America, Australia
Verilog: Asia, North America, East Euro
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4. Verilog Module
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4. Verilog Module (cont.)
In Verilog, a circuit is a module
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4. Verilog Module (cont.)
Module Styles
• Structural – connect primitives and modules
• Dataflow – use continuous assignments
• Behavioral – use initial and always blocks
A single module can use more than one method!
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4. Verilog Module (cont.)
Structural
• A schematic in text form
• Build up a circuit from gates/flip-flops
Gates are primitives (part of language)
Flip-flops themselves described behaviorally
• Structural design
Create module interface
Instantiate the gates in the circuit
Declare the internal wires needed to connect gates
Put the name of the wires in the connect port locations of the gates
For primitives, outputs always come first
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4. Verilog Module (cont.)
Structural Example
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4. Verilog Module (cont.)
Data Flow Example
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4. Verilog Module (cont.)
Behavioral Example
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4. Testbenches
Verification is required to ensure the design meets the timing and
functionality requirements.
Verification of the digital hardware design.
Simulate and analyze designs without the need of any physical hardware
or device hardware.
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4. Testbenches (cont.)
Example:
a b c Y
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
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4. Testbenches (cont.)
Example:
Testbench Example – Self Checking Testbench Example with Waveform Editor
a b c Y
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
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5. FPGAs
What is an FPGA?
A field-programmable gate array
(FPGA) is an integrated circuit
designed to be configured by a
customer or a designer after
manufacturing – hence the term
"field-programmable".
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5. FPGAs
Hardware Building Blocks
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5. FPGAs (cont.)
Standard Cells
• Library of common gates and structures (logic-cells)
• A cell includes 1 LUT (Look-up Table), 1 D-Flipflop, and 1 2-1 MUX
• Arrange the cells on the chip: balance between flexible and speed (delay)
• Connect them using programable routing: fuse and anti-fuse technologies
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5. FPGAs (cont.)
Standard Cells
• Use small memories as truth tables of function (LUT)
• A LUT consists of a block of SRAM that can do many different logic
functions.
• The LUT in holds a custom truth table.
• When an FPGA is configured, the bits of the LUT are loaded with ones or
zeros based on what the desired truth table would be.
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5. FPGAs (cont.)
IO-Cells and Internal RAM
• IO-Cells connect I/O pins of the FPGA (user pins and dedicated pins) with
internal logic blocks
I/O Cells Internal RAM
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5. FPGAs (cont.)
Why FPGA rather than CPUs?
• CPUs (Central Processing Units) are general purpose and can perform any
function based on the software program.
• CPU executes a program based on a specified set of instructions in a
sequential manner.
• FPGA can be modified and
configured by the user to
performing specific tasks.
• FPGAs are ideal for parallel
systems where multiple tasks
must be performed
simultaneously.
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5. FPGAs (cont.)
Advantages:
• Parallel computing
• Flexibility and Customizability
• Real-time performance
• Low power consumption
Disadvantages:
• High complexity
• High development time
• Cost
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5. FPGAs (cont.)
Applications: due to their flexibility, reconfigurability, and parallel
processing capabilities
• Digital Signal Processing: extensively used in DSP applications such as image
and video processing, audio processing, speech recognition, and compression
• Communication and Networking: crucial role in networking equipment such
as routers, switches, and network interface cards
• Aerospace and Defense: including radar systems, avionics, satellite
communications, missile guidance systems
• Industrial Automation: motor control, robotics, programmable logic
controllers (PLCs), and process control
• High-Performance Computing: customized to perform specialized
computations, such as data encryption, image and video processing, and
machine learning algorithms
• ... 33
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6. KIT LP-2900 and Quartus II
LP-2900 Logic Lab Platform
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6. KIT LP-2900 and Quartus II (cont.)
Intel Quartus is programmable logic device design software (earlier
Altera Quartus II).
Enables analysis and synthesis of HDL designs, which enables the
developer to compile their designs, perform timing analysis, examine
RTL diagrams, and configure the target device with the programmer.
Includes an implementation of VHDL and Verilog for hardware
description, visual editing of logic circuits, and vector waveform
simulation.
Quartus II 13.1 Student Web Edition is used in this course.
Link:
https://www.intel.com/content/www/us/en/software-kit/666221/intel-
quartus-ii-web-edition-design-software-version-13-1-for-windows.html 35
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Summary
Digital systems and its advantages
HDL: modeling and simulation of digital designs
Verilog and VHDL
Three types of Verilog module design: structural, dataflow,
and behavioral
Testbenches and how to implements to verify your code
FPGAs
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