Process Corners
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PROCESS-VOLTAGE-TEMPERATURE
In VLSI circuit design during simulation, we run the
design through various PVT (Process, Voltage and
Temperature) corners with an aim that the circuit should
be able to reliably operate at all the extreme conditions
Three important factors contributed to
performance variation.
Process variation (P)
Supply voltage (V)
Operating Temperature (T)
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Process variation (P)
• Process variation accounts for deviations
in the semiconductor fabrication process.
• Variations in the process parameters can
be impurity concentration densities,
oxide thicknesses and diffusion depths.
• This introduces variations in the sheet
resistance and transistor parameters such
as threshold voltage. 3
Supply Voltage Variation (V)
• The design’s supply voltage can vary from
the established ideal value in real operation.
• A simple linear scaling factor is also used for logic-
level performance calculations.
• Performance of a transistor depends on the power
supply. For instance, the delay , the power supply
inflects the propagation delay of a cell.
4
Operating Temperature Variation (T)
• Temperature variation is unavoidable
• When a chip is operating, the
temperature can vary throughout the
chip. This is due to the power
dissipation in the MOS transistors.
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.These PVT variations can be generalized as,
1.Temperature from as low as -40° to as high as 125°C
2. Voltage ±10% variation from its nominal value
3. Process – This is generally two letter convention
where first letter is the behavior of NMOS and second
letter is of PMOS.
CORNER ANALYSIS
TT, SS, FF, SF and FS are the corners generally
used. Letter T stands for Typical (Nominal V t), F for
Fast (Low Vt) and S for Slow (High Vt).
There are five possible corners:
• typical-typical (TT),
• fast-fast (FF),
• slow-slow (SS),
• fast-slow (FS),
• slow-fast (SF).
Analog Circuits Design Automation 7
Running the design over different PVT corners cover the
environmental variations (voltage and temperature) as well as
manufacturing variations (process). A very common figure to
illustrate the process corner is shown here,
Mismatch Variation
• Dimension variations of the devices, are mainly
resulted from the limited resolution of the
photolithographic process.
• This causes (W/L) variations or mismatch in MOS
transistors.
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“Can we guarantee the functionality of silicon across all
condition by simulating the design across PVT corners?
The answer comes out to be NO and guess what’s the
reason?
It’s the manufacturing variations introduced during
fabrication of the chip.
But, didn’t we cover the manufacturing variations in the
process corners (TT, SS, FF, FS and SF)?
Yes, we did but that’s not enough.
• Take a case, where design has 100 NMOS and 100
PMOS.
• Let’s say we are running this design at FS corner,
considering all the 100 NMOS are identically FAST and
all the 100 PMOS are identically SLOW.
• This is not true in real silicon where no two transistors are
identical due to Systematic and Random variations.
• So even after running the design across process corners
we are leaving behind the corner case where there is
variations across different transistors in the same process
corner.
• This is where Monte Carlo pitches in. It aids in
introducing the randomness into the transistors by
changing its Vt in different directions such that all the
1000 NMOS/PMOS are different at a time, depicting the
real silicon behavior.
MONTE CARLO SIMULATION
• Specialized design tools to help meet
this goal are available. For instance,
the Monte Carlo analysis approach
[Jensen91] simulates a circuit over a
wide range of randomly chosen
values for the device parameters.
• Variation distribution will be
provided by manufacture company
• The result is a distribution plot of
design parameters (such as speed or
sensitivity to noise) that can help to
determine if the nominal design is
• Examples of such distribution plots, showing the impact of
variations in the effective transistor channel length and the
PMOS transistor thresholds on the speed of an adder cell, are
shown in figure.
• As can be observed, technology variations can have a
substantial impact on the performance parameters of a design
• An important conclusion from the above
discussion is that SPICE simulations should be
treated with care.
• The device parameters presented in a model
represent average values, measured over a batch of
manufactured wafers.
• Actual implementations are bound to differ from
the simulation results, and for reasons other than
imperfections in the modelling approach.
PROCESS-VOLTAGE-
TEMPERATURE
Process variation corners
The first three corners (TT, FF, SS) are called even corners,
because both types of devices are affected evenly, and
generally do not adversely affect the logical correctness of
the circuit.
The last two corners (FS, SF) are called "skewed" corners, nda
are cause for concern. This is because one type of FET will
switch much faster than the other, and this form of
imbalanced switching can cause one edge of the output to
have much less slew than the other edge.
Analog Circuits Design Automation 16
PROCESS-VOLTAGE-
TEMPERATURE
• REFERENCES
• WESTE, NEIL H.E. AND HARRIS, DAVID (2005). CMOS VLSI
DESIGN: A CIRCUITS AND SYSTEMS PERSPECTIVE, 3RD ED.,.
ADDISON-WESLEY, PP.231-235.
• HTTP://EN.WIKIPEDIA.ORG/WIKI/PROCESS_CORNERS
• HTTP://ASIC-SOC.BLOGSPOT.COM/2008/03/PROCESS-VAR
IATIONS-AND-
STATIC-TIMING.HTML
Analog Circuits Design Automation 17
