High Voltage MOSFETs
High Voltage MOSFETs
High Voltage MOSFETs
A presentation on
The charge carriers flow from source to drain through the channel
and the drift region.
HVMOS structure
Fabrication
fabrication requires a diffusion.
The device can be fabricated by diffusion as well as ion implantation.
The p-type region is formed first, followed by shallow p+ and n+ regions..
Eliminates the body effect:- The p+-region contacts the p-type body, which is
typically shorted to the source, thereby eliminating the body effect
LDMOS structure
MODELLING STRATEGY
DRIFT RESISTANCE MODEL:-
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DC BEHAVIOUR OF LDMOS
ANAMALOUS EFFECTS
QUASI SATURATION
SELF HEATING
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QUASI SATURATION
Characteristics
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Minimization
Quasi saturation effects can be minimized or even eliminated by
increasing the doping level in the drift region.
SELF HEATING
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P = IDS VDS
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With the device scaling and increasing integration density self heating
becomes one of the major issues in device design.
With the increase of the internal device temperature due to selfheating the charge carriers mobility decreases because of increased
lattice scattering. This causes a negative resistance effect in the
characteristic output curves where the current starts falling with
increasing drain voltage
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EFFECT
Applications
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2. VMOS Transistors
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The VMOS transistor, named after the V-shaped groove, is a vertical MOSFET
with high current handling capability as well as high blocking voltage.
It consists of a double diffused n+/p layer, which is cut by a V-shaped groove
. The substrate acts as a drift region.
The vertical structure allows the use of a low-doped drain region, which results
in a high blocking voltage.
The V-groove is easily fabricated by anisotropically etching a (100) silicon
surface using a concentrated KOH solution.
The V-groove is then coated with a gate oxide, followed by the gate electrode.
As the V-groove cuts through the double diffused layer, it creates two
vertical MOSFETs, one on each side of the groove.
The combination of the V-groove with the double diffused layers results in a
short channel length, which is determined by the thickness of the p-type layer.
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V-MOS structure
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For low drain voltage, channel and drift regions both contribute to the on-resistance. For
large gate biases, the channel resistance and, hence, the total on-resistance reduces until
a point where the on-resistance becomes independent of further change in gate bias. At
this stage, the on-resistance becomes almost equal to the drift resistance. A small value
of on-resistance is always desirable to achieve low power dissipation (P dissipation), given
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Applications:VMOS FETs overcome the power problems normally associated with FETs.
Current flow is now vertically upwards, from drain to source, in much the same
way as in bipolar transistors. The larger chip area means large current. Hence we
have transistors exhibiting all the advantages of MOSFETs without the usual
power limits. VMOS FETs also have some other very interesting advantages:
low ON resistance good for audio switching purposes. Low ON resistances
and high OFF resistances make VMOS FETs ideal for use in audio switching
networks. Figure shows a simple on/off audio switch controlled by the voltage
on the transistor gate: + 15V turns the switch on and OV turns it off. Audio
signals can only pass in one direction, from drain to source, but any audio
voltage of about 1/2V to + 5V can be switched.
The extremely high gate-input resistance of VMOSFETs means that they can be
switched by virtually any control method, such as CMOS, TTL, op-amps and
soon.
power amplification as high as 10*6 .
positive temperature coefficient on the ON resistance as the temperature goes
up the transistor passes less current, therefore remaining thermally stable.
easily operated in parallel to increase overall current flow due to the
inherent thermal stability no 'current hogging' by one device occurs.
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REFERENCES
http://ieeexplore.ieee.org/
http://ecee.colorado.edu/
http://en.wikipedia.org
http://www.scribd.com/
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