Faculty of Information Science and Technology
(FIST)
TCO 1114
Introduction to Computer Architecture and Operating
System
Foundation in Information Technology
ONLINE NOTES
Tutorial 1
Introduction to Assembly Language
TCO1114 Introduction to Assembly Language Tutorial 1
Objectives:
Upon completion of this topic, the students should be able to:
• Identify the architecture of 8085 microprocessor.
• Describe the basic concept of assembly language programming with 8085
Microprocessor.
• Write simple assembly language programs using the instruction sets.
1.0 8085 Microprocessor
• The 8085 is an 8-bit microprocessor introduced by Intel in 1976.
• The speed is from 3 MHz to 6 MHz
• It is a single cycle CPU, a processor that carries out one instruction in a single
clock cycle.
• It has 8-bit 6 registers (B, C, D, E, H and L), one 8-bit accumulator (A), one flag
register (S, Z, AC, P, CY) and two 16-bit registers (the stack pointer and the
program counter).
• It has a 16-bit address bus.
Figure 1.1: The model of 8085 Microprocessor
1.1 Registers
▪ The 6 registers are general-purpose registers to store 8-bit data. They are
identified as B, C, D, E, H, and L as shown in Figure 1.2.
▪ They can be combined as register pairs - BC, DE, and HL - to perform
some 16-bit operations. The programmer can use these registers to store
or copy data into the registers by using data copy instructions.
1.2 Accumulator
▪ The accumulator is an 8-bit register that is a part of arithmetic/logic unit
(ALU). This register is used to store 8-bit data and to perform arithmetic
and logical operations.
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▪ The result of an operation is stored in the accumulator. The accumulator
is also identified as register A.
1.3 Flags
▪ The ALU includes five flip-flops, which are set or reset after an operation
according to data conditions of the result in the accumulator and other
registers.
▪ They are called Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary
Carry (AC) flags. Their bit positions in the flag register are shown in
Figure 1.3 below.
▪ The most commonly used flags are Zero, Carry, and Sign. The
microprocessor uses these flags to test data conditions.
Figure 1.2: Flag register
▪ Z: The Zero flag is set to 1 when the result is zero; otherwise, it is reset.
▪ CY: If an arithmetic operation results in a carry, the CY flag is set;
otherwise, it is reset.
▪ S: The Sign flag is set if bit D7 of the result = 1; otherwise, it is reset.
▪ P: If the result has an even number of 1s, the flag is set; for an odd
number of 1s, the flag is reset.
▪ AC: In an arithmetic operation, when a carry is generated by digit D3 and
passed to digit D4, the AC flag is set. This flag is used internally for BCD
(binary-coded decimal) operations; there is no Jump instruction
associated with this flag.
1.4 Program Counter (PC)
▪ This register is a memory pointer. Memory locations have 16-bit
addresses, and that is why this is a 16-bit register.
▪ The microprocessor uses this register to sequence the execution of the
instructions. The function of the program counter is to point to the
memory address from which the next byte is to be fetched. When a byte
(machine code) is being fetched, the program counter is incremented by
one to point to the next memory location.
1.5 Stack Pointer (SP)
▪ The stack pointer is also a 16-bit register used as a memory pointer. It
points to a memory location in R/W memory, called the stack. The
beginning of the stack is defined by loading 16-bit address in the stack
pointer.
2.0 The 8085 Addressing Modes
• The instructions MOV B, A or MVI A, 82H are to copy data from a source into a
destination. In these instructions the source can be a register, an input port, or an
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8-bit number (00H to FFH). Similarly, a destination can be a register or an output
port.
• The sources and destination are operands. The various formats for specifying
operands are called the addressing modes. For 8085, they are:
➢ Immediate addressing
An immediate is transferred directly to the register.
E.g. MVI A, 30H ; (30H is copied into the register A)
MVI B, 40H ; (40H is copied into the register B)
➢ Register addressing
Data is copied from one register to another register.
E.g. MOV B, A ; (the content of A is copied into the register B)
MOV A, C ; (the content of C is copied into the register A)
➢ Direct addressing
Data is directly copied from the given address to the register.
E.g. LDA 3000H ; (the content at the location 3000H is copied into
the register A)
➢ Indirect addressing
The data is transferred from the address pointed by the data in a register to
another register.
E.g. MOV A, M ; (data is transferred from the memory location
pointed by the register to the accumulator)
3.0 Basic operations Using 8 bits Microprocessor kits.
3.1 Data transfer (Copy) Operations
• These instructions move data between registers, or between memory and
registers.
• These instructions copy data from source to destination and while
copying, the contents of source are not modified.
3.2 Arithmetic Operations
• The arithmetic instructions provided by 8085 perform addition,
subtraction, increment and decrement operations.
o Addition: Any 8-bit number, or the content of a register, or the
content of a memory location can be added to the content of the
accumulator and the resulting sum is stored in the accumulator. The
resulting carry bit is stored in the carry flag. In 8085, no two other
registers can be added directly.
o Subtraction: Any 8-bit number, or the content of a register, or the
contents of a memory location can be subtracted from the content of
the accumulator and the result is stored in the accumulator. The
resulting borrow bit is stored in the carry flag. In 8085, no two other
registers can be subtracted directly.
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o Increment / Decrement: The 8085 has the increment and decrement
instructions to increment and decrement the contents of any register,
memory location or register pair by 1.
4.0 Writing simple assembly language programs using the instruction set.
4.1 DATA TRANSFER (COPY) OPERATIONS:
1. MVI r, data
- To move data immediate to register r (r can be any one of A/B/C/D/E/H/L
registers)
- This instruction directly loads a single register with a single byte of data.
Example: MVI B, 45H
Explanation: This instruction loads register B with the 8-bit data 45H (Note that
here H represents hexadecimal)
2. MVI M, data
- To move data immediate to memory location whose address is in HL register
pair)
- M represents HL
- This instruction directly stores the data in the memory location specified by the
contents of the H and L registers.
Example: MVI M, 65H
Explanation: Suppose HL register pair contains 8000H, the data 65H is loaded
in the memory location 8000H.
3. MOV r1, r2
- To move data from register to register; r2 to r1, r2 is the source and r1 is the
destination.
- r1 and r2 can be any one of A/B/C/D/E/H/L registers.
- This instruction transfers the contents of one register to another register.
Example: MOV B, C
Explanation: Copy the contents of register C to register B. C is the source and
B is destination.
4. MOV M, r
- To move data from register r to memory whose address is in H and L
- r can be any one of A/B/C/D/E/H/L registers and M represents HL
- This instruction transfers data from the source register to a memory location
address of which is pointed by H and L registers.
Example: MOV M, B
Explanation: Suppose HL register contains 6000H, this instruction will copy the
contents of register B to memory location 6000H.
5. MOV r, M
- To move data from location specified by H and L registers to register r
- r can be any one of A/B/C/D/E/H/L registers and M represents HL
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- This instruction transfers data from a memory location whose address is in H
and L registers to the destination register r.
Example: MOV L, M
Explanation: Suppose HL register contains 7050H and memory location 7050H
contains 80H, L register will contain 80H after the execution of instruction.
6. LXI rp, data
- To load register pair with 16-bit data
- rp can be BC, DE, HL register pairs or stack pointer register (SP)
- This instruction loads immediately the double byte or 16-bit data into a register
pair or into the SP register.
Example: LXI H, 8000H
Explanation: After the execution of the instruction, HL register pair contains the
16-bit data 8000H.
7. STA 16bit address
- To store data from Accumulator (A) to the memory location address
- This instruction stores the contents of the accumulator in the memory, the
address of which is specified.
Example: STA 6080H
Explanation: Suppose A contains 67H, after the execution of the instruction,
6080H memory location also contains 67H.
8. LDA 16bit address
- To copy the contents of the memory location given by the address onto the A
Example: LDA 8000H
Explanation: Suppose 8000H contains 98H, after the execution of the
instruction, A will contain 98H.
9. SHLD 16bit address
- To store H and L direct
- The contents of the register L are stored in the memory location corresponding
to the address given and the contents of register H at the next address
location.
Example: SHLD 7000H
Explanation: Suppose H register contains 56H and L register contains 89H,
after the execution of the instruction, 7000H memory location will contain 89H
and 7001H memory location will contain 56H.
10. LHLD 16bit address
- To load H and L direct
- This instruction copies the contents of the memory location given by the
address onto the register L and the contents of the next address location onto
register H.
Example: LHLD 8050H
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Explanation: Suppose 8050H memory location contains 77H and 8051H
memory location contains 88H, after the execution of the instruction, L register
will contain 77H and H register will contain 88H.
11. LDAX rp
- To load A with the contents of the memory location whose address is in rp.
- Here rp indicates BC or DE register pair.
- This instruction copies onto the A the contents of the memory location whose
address is given by the contents of register pair.
Example: LDAX D
Explanation: Suppose DE register pair contains 8900H and 8900H memory
location contains 78H, after the execution of the instruction, A will contain 78H.
12. STAX rp
- To store contents of A indirect
- Here rp indicates BC or DE register pair.
- This instruction stores the contents of the A at the memory location whose
address is given by register pair (BC or DE only)
Example: STAX B
Explanation: Suppose BC register pair contains 5000H and A contains the 8-bit
data 87H, then after the execution of the instruction, memory location 5000H
will contain 87H
13. XCHG
- Exchange register pair contents
- This instruction exchanges the contents of the register H with that of D and of L
with that of E.
Example: XCHG
Explanation: Suppose HL register contains 8678H and DE register contains
9876H, then after the execution of the instruction, HL register will contain
9876H and DE register will contain 8678H.
4.2 ARITHMETIC GROUP (Increment/Decrement, Addition, Subtraction)
1. INR r
- To increase register
- Here r indicates A/B/C/D/E/H/L register.
- The contents of the specified register are incremented by one. All flags except
Carry are affected.
Example: INR D
Explanation: Suppose register D contains FFH, after the execution of the
instruction, register D will contain 00H and Zero flag, sign flag, parity flag will be
set. Carry flag will not be affected and it remains in the previous state.
2. INR M
- To increase data in memory
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- M represents (HL)
- The contents of the memory location whose address is in HL are incremented
by one. All flags except carry are affected.
Example: INR M
Explanation: Suppose HL register pair contains 8000H and memory location
8000H contains 8-bit data 45H, then after the execution of the instruction,
memory location 8000H will contain 46H.
3. INX rp
- To increase register pair
- rp represents BC, DE, HL, SP
- The contents of the specified register pair are incremented by one. No flags are
affected.
Example: INX H
Explanation: Suppose HL register pair contains 899FH, after the execution of
the instruction, HL register will contain 89A0H.
4. DCR r
- To decrease register
- r represents A/B/C/D/E/H/L register
- The contents of the specified register are decremented by one. All flags except
carry are affected.
Example: DCR A
Explanation: Suppose A contains 88H, then after the execution of the
instruction, accumulator will contain 87H. Zero flag will be reset. Sign, Parity,
and auxiliary carry flag will be set. Carry flag will remain at the previous state.
5. DCR M
- To decrease data in memory
- M represents (HL)
- The contents of the memory location whose address is in HL are decremented
by one. All flags except carry are affected.
Example: DCR M
Explanation: Suppose HL register pair contains 8000H and 8000H memory
location contains 00H, then after the execution of the instruction, 8000H
memory location will contain FFH. Sign and Parity flags will be set. Zero flag
will be reset. Carry flag will not be affected.
6. DCX rp
- To decrease register pair
- Here rp represents one of BC, DE, HL register pairs or SP (Stack pointer
register)
- The contents of the specified register pair are decremented by one. No flags
are affected.
Example: DCX SP
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Explanation: Suppose stack pointer contains FFFFH, after the execution of the
instruction, SP will contain FFFEH.
7. ADD r
- To add register r to A
- r can be any one of the 8-bit registers - A/B/C/D/E/H/L
- The contents of the specified register are added to the contents of the A
- The result is stored in the A. All flags are affected according to the result in A
Example: ADD C
Explanation: Suppose register A contains 67H and C register contains FEH,
then after the execution of the instruction, register A contains 65H. Carry flag,
Auxiliary Carry flag and Parity flag will be set. Zero and Sign flags will be reset.
8. ADD M
- To add data in memory to A
- M represents (HL)
- The contents of the memory location whose address is in HL are added to the
accumulator. All flags are affected according to the result.
Example: ADD M
Explanation: Suppose A contains 01H and HL register pair contains 4098H and
the contents of memory locations 4098H is FFH, then after the execution of the
instruction, A will contain 00H. Carry, Zero, Auxiliary Carry, and Parity flags will
be set, and Sign flag will be reset.
9. ADI data
- To add data immediate to A
- The data given in the second byte of the instruction is added to the contents of
A and the result is stored in the A. All flags are affected.
Example: ADI 95H
Explanation: Suppose A contains 29H, then after the execution of the
instruction, A will contain BEH. Signs and Parity flags will be set. Carry,
Auxiliary Carry and Zero flags will be reset.
10. ADC r
- To add register r (A/B/C/D/E/H/L) with carry to Accumulator
- If the Carry flag is set by some previous operation, adds 1 first, then adds the
contents of register r to A, else it adds the contents of r only. The result
remains in A and all flags are affected according to the result.
Example: ADC D
Explanation: Suppose A contains 88H and D register contains 98H and carry
flag is set previous to the execution of the instruction, then after the execution,
accumulator will contain 21H. Carry, Auxiliary Carry and Parity flags will be set
and Zero and Sign flags will be reset.
11. ADC M
- To add data in memory to A with carry
- M represents (HL)
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- If the Carry flag is set by some previous operation, it adds 1 and the contents of
the memory location whose address is in HL to A, else it adds the memory
contents only. The result remains in the A. All flags are affected.
Example: ADC M
Explanation: Suppose Accumulator contains 34H, HL register contains 8000H
and memory location 8000H contains CB H, then after the execution of the
instruction, A ( ((HL))+01H+(A) ) will contain 00H. Carry, Auxiliary Carry, Parity
and Zero flags will be set while Sign flag will be reset.
12. ACI data
- To add immediate data to A with carry
- If the Carry flag is set, then it adds 1 and the given 8-bit data as part of second
byte of the instruction to A, else it adds only the given data. The result remains
in A. All flags are affected.
Example: ACI 88H
Explanation: Suppose A contains FFH and Carry flag is reset before execution
of the instruction, then after the execution, A will contain 87H. Carry, Auxiliary
Carry, Sign and Parity flags will be set while Zero flag will be reset.
13. DAD rp
- To add register pair (BC/DE/HL/SP) to HL
- The contents of the specified register pair is added to HL register pair. The
result remains in HL. Only the carry flag is affected.
Example: DAD B
Explanation: Suppose BC register pair contains 7000H and HL register pair
contains 9000H then after the execution of the instruction, HL register pair will
contain 0000H and carry flag will be set. Zero, Sign, Parity and Auxiliary Carry
flags will remain in the previous state.
14. SUB r
- To subtract register r from A
- The contents of the specified register (A/B/C/D/E/H/L) are subtracted from A. If
A is less than r, the Carry (in case of subtraction the same flag is used as
borrow) flag is set. The result of subtraction will remain in A. All flags are
affected.
Example: SUB A
Explanation: This is one of the instructions which will be used for clearing the
accumulator contents. Suppose Accumulator contains EEH, then after the
execution of the instruction accumulator will contain 00H. Zero, Parity flags will
be set and Sign, Auxiliary carry and Borrow (carry) flags will be reset.
15. SUB M
- To subtract data in memory from A
- The contents of the memory location whose address is in HL are subtracted
from A. If A is less than the memory data, the borrow (carry) flag is set. The
result remains in A. All flags are affected.
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Example: SUB M
Explanation: Suppose A contains 88H, HL register pair contains F000H and
memory location F000H contains A0H, then after the execution of the
instruction, A will contain E8H. Borrow (carry), Sign and Parity flags will be set
while Zero and Auxiliary Carry flags will be reset.
16. SUI data
- To subtract immediate from A
- The given data is subtracted from A. If A is less than the data, the Borrow
(carry) flag is set. The result remains in A. All flags are affected.
Example: SUI 50H
Explanation: Suppose A contains 20H, then after the execution of the
instruction, A will contain E0H. Borrow (carry) and Sign flags will be set while
Parity, Auxiliary Carry and Zero flags will be reset.
17. SBB r
- To subtract register r from A with borrow
- The contents of the specified register are subtracted from A along with borrow.
If the Carry flag is set by some previous operation, then 1 plus the contents of r
are subtracted from A, else only the contents of r are subtracted. The result
remains in A. All flags are affected.
Example: SBB H
Explanation: Suppose A contains 45H, H register contains 44H and the Carry
(borrow) flag is set, then after the execution of the instruction, A will contain
00H, Zero, Parity and Auxiliary Carry flag will be set while Sign and Carry
(borrow) flags will be reset.
18. SBB M
- To subtract memory data from A with borrow
- The contents of the memory location whose address is in HL are subtracted
from A along with borrow. If the Carry flag is set by some previous operation,
then 1 plus the memory contents are subtracted from A, else only the memory
contents are subtracted. The result remains in A. All flags are affected.
Example: SBB M
Explanation: Suppose A contains FFH, HL register pair contains 4000H, the
memory location contains 00H and Carry flag is set, then after the execution of
the instruction, A will contain FEH. Sign and Auxiliary Carry flags will be set
while Carry (borrow), Parity and Zero flags will be reset.
19. SBI data
- To subtract immediate data from A with borrow
- The given data as a part of the instruction is subtracted from A with borrow. If
the Carry flag is set by some previous operation, then 1 plus the data are
subtracted from A, else only the given data is subtracted from A. The result
remains in A. All flags are affected.
Example: SBI 87H
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Explanation: Suppose A contains FFH and the Carry (borrow) flag is reset,
then after the execution of the instruction, A will contain 78H. Parity and
Auxiliary Carry flags will be set while Zero, Sign and Carry (borrow) flags will be
reset.
Program 1: To store the data byte 32H into memory location 4000H.
MVI A, 32
STA 4000
HLT
OR
LXI H, 4000
MVI M, 32
HLT
Program 2: To exchange the contents of memory locations 2000H and 2001H.
MVI A, 09
STA 2000
MVI A, 10
STA 2001
LDA 2000
MOV B, A
LDA 2001
STA 2000
MOV A, B
STA 2001
HLT
Program 3: To add two numbers.
MVI D, 8BH
MVI C, 6FH
MOV A, C
ADD D
OUT PORT1
HLT
Program 4: To add two numbers.
MVI A, 14
STA 4000
MVI A, 89
STA 4001
LXI H, 4000
MOV A, M
INX H
ADD M
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INX H
MOV M, A
HLT
References:
1. TMA1271 Introduction to Machine Architecture
2. http://sequoia.ict.pwr.wroc.pl/~iro/RISC/sm/www.hp.com/acd-7.html
3. http://uwf.edu/clemley/cgs1570w/notes/Concepts-4.htm#2
4. Microprocessor And Assembly Language Programming by D.A. Godse and A.P.
Godse
5. http://unaab.edu.ng/attachments/473_CSC%20303A.pdf
6. http://prasant.com.np/flags-in-8085-microprocessor/
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