CSE 520210

Microprocessor and Assembly

Language

Memory Segmentation and

Addressing Modes in 8086
 Segment Register
In 8086 processor has 4 segments registers
•Code Segment register (CS)
•Data Segment register(DS)
•Extra Segment register(ES)
•Stack Segment (SS)register.
All are16 bit registers.
Each of the Segment registers store the upper 16
bit address of the starting address of the
corresponding segments.
Memory Segments of 8086
 Segment Register
• Code Segment (CS): The CS register is used for
addressing a memory location in the Code Segment of
the memory, where the executable program is stored.
• Data Segment (DS): The DS contains most data used by
program. Data are accessed in the Data Segment by an
offset address or the content of other register that
holds the offset address.
• Stack Segment (SS): SS defined the area of memory
used for the stack.
• Extra Segment (ES): ES is additional data segment that
is used by some of the string to hold the destination
data.
 Segmented Memory
The memory in an 8086 based system is organized as segmented memory.
The CPU 8086 is able to address 1Mbyte of memory.
The Complete physically available memory may be divided into
a number of logical segments.
The 4 segments are Code, Data, Extra and Stack segments.
A Segment is a 64kbyte block of memory.
The16 bit contents of the segment registers in the BIU actually
Point to the starting location of a particular segment.
Segments may be overlapped or non-overlapped
 16-bit word fetch from even valued
physical address
Consider the following instruction:
MOV BX, [XXXX] where DS:XXXX points to an even
physical address say 01234H Address Word
Then the BX will loaded in One 01230 12
01231 34
memory access operation in 01232 56
01233 78
following way:
01234 9A
High byte of the word in BH Low byte of the word BL 01235 BC
BCH 9AH 01236 DE
From address 01235H From address 01234H
 16-bit word fetch from odd valued
physical address
Consider the following instruction:
MOV BX, [XXXX] where DS:XXXX points to an odd
physical address say 01233H Address Word
Then the BX will loaded in Two 01230 12
01231 34
memory access operation in 01232 56
01233 78
following way:
01234 9A
High byte of the word in BH Low byte of the word BL 01235 BC
9AH 78H 01236 DE
From address 01234H From address 01233H
 16-bit word fetch from odd valued
physical address
In first operation, the processor will fetch from physical
address 01232H and 01233H and will discard the contents
of 01232H
And in next fetch operation, contents Address Word
01230 12
from 01234H and 01235H will be 01231 34
fetched but contents from 01235H 01232 56
01233 78
will be discarded
01234 9A
High byte of the word in BH Low byte of the word BL 01235 BC
9AH 78H 01236 DE
From address 01234H From address 01233H
 8-bit word fetch from even valued
physical address
Consider the following instruction:
MOV BH, [XXXX] where DS:XXXX points to an even
physical address say 01234H
Address Word
Then only BH part will be loaded in 01230 12
One memory access operation. Words 01231 34
01232 56
from both 01234H and 01235H will 01233 78
be fetched but contents from 01235H 01234 9A
01235 BC
will be discarded. And…… 01236 DE
BH = 9AH
 8-bit word fetch from odd valued
physical address
Consider the following instruction:
MOV BL, [XXXX] where DS:XXXX points to an odd
physical address say 01235H
Address Word
Then only BL part will be loaded in 01230 12
One memory access operation. Words 01231 34
01232 56
from both 01234H and 01235H will 01233 78
be fetched but contents from 01234H 01234 9A
01235 BC
will be discarded. And…… 01236 DE
BL = BCH
 ADDRESSING MODES
The CPU can access operands (data) in various ways,
called addressing modes. The number of addressing
modes is determined when microprocessor is
designed and cannot be changed. The 80x86 provides
a total of seven distinct addressing modes:
1. Register
2. Immediate
3. Direct
4. Register indirect
5. Based relative
6. Indexed relative
7. Based indexed relative
size of source and destination
must match
;move contents of DS:2400H into DL
 Example of Direct addressing mode
Find the physical address of the memory location and its contents after the
execution of the following, assuming that DS = 1512H.
MOV AL, 99H
MOV [3518H], AL
Solution: First AL is initialized to 99H, then in line two, the contents of
AL are moved to logical address DS:3518Hwhich is 1512:3518. Shifting
DS left and adding it to the offset gives the physical address of 18638H
(15120H + 3518H = 18638H).
That means after the execution of the second instruction, the memory
location with address 18638H will contain the value 99H
;move contents of DS:SI into CL

;move contents of AH into DS:DI

;moves contents of AX into memory

;locations DS:SI and DS:SI +1
 Example of Register indirect addressing mode

Assume that DS = 1120, SI = 2498, and AX = 17FE. Show the contents of

memory locations after the execution of
MOV [SI], AX

Solution: The contents of AX are moved into memory locations with

logical address DS:SI and DS:SI+1. Low address 13698H contain FE, and
high address 13699H contains 17H.
;move DS:BX+10 & DS:BX+10+1
;into CX. PA= DS(sl) +BX+10

;PA = SS (sl) + BP + 5
 Based relative addressing mode
• In the based relative addressing mode, base registers are BX
and BP. The default segments are DS for BX and SS for BP. For
example:
MOV CX, [BX]+10 ;move DS:BX+10 and DS:BX+10+1
into CX
;PA = DS (shifted left) + BX + 10
Alternative codings are
MOV CX, [BX+10] or MOV CX, 10[BX]
• In the case of the BP register,
MOV AL, [BP]+5 ;PA = SS(shifted left) + BP + 5
alternative codings are
MOV AL, [BP+5] or MOV AL, 5[BP]
;PA = DS (sl) + SI + 5

;PA = DS (sl) + DI + 20
 Example of Indexed relative addressing mode
Assume that DS = 4500, SS = 2000, BX = 2100, SI = 1486,
DI = 8500, BP = 7814, and AX = 2512. Show the exact
physical memory location where AX is stored in each of the
following. All values are in hex.
(a) MOV [BX]+20, AX (b) MOV [SI]+10, AX
(c) MOV [DI]+4, AX (d) MOV [BP]+12, AX
Solution:
(a) DS:BX+20 location 47120 = (12) and 47121 = (25)
(b) DS:SI+10 location 46496 = (12) and 46497 = (25)
(c) DS:DI+4 location 4D504 = (12) and 4D505 = (25)
(d)SS:BP+12 location 27826 = (12) and 27827 = (25)
;PA=DS(sl)+BX+DI +8

;PA=SS(sl)+BP+SI +29
 Summary of 8086 addressing modes
Addressing Mode Operand Default

Register reg None

Immediate Data None

Direct [offset] DS

Register indirect [BX], [SI], [DI] DS, DS, DS

Based relative [BX]+disp, [BP]+disp DS, SS

Indexed relative [DI]+disp, [SI]+disp DS, DS

Based indexed relative [BX][SI]+disp, [BX][DI]+disp DS, DS

[BP][SI]+disp, [BP][DI]+disp SS, SS