Microprocessors

A microprocessor is essentially the brain of a computer, implemented as a single

integrated circuit (chip). It's a programmable electronic device that can:

●​ Fetch instructions from memory.

●​ Decode those instructions to understand what needs to be done.
●​ Execute the instructions by performing arithmetic, logical, and control
operations on data.

​
https://edrawmax.wondershare.com/block-diagram/microprocessor.html

The Arithmetic Logic Unit (ALU) can perform arithmetic calculations like
addition, subtraction, multiplication, and division.

It can also perform operations of the AND, OR, NOT gates.

Microcontrollers
A microcontroller is a compact, integrated circuit designed to govern specific
operations in embedded systems

Feature Microprocessor (µP) Microcontroller (µC)

The "brain" of a computer; a
central processing unit (CPU)
on a single chip (or a few A small, self-contained computer on a single
Definition integrated circuits). integrated circuit, designed to control specific tasks.
Primarily the Arithmetic Logic
Unit (ALU) and Control Unit
Core (CU). May include cache CPU core, memory (RAM, ROM/Flash), and various
Components memory. peripherals integrated onto a single chip.
Relies on external memory
(RAM, ROM) for program and
Memory data storage. Typically has on-chip memory.
System Designed for general-purpose Designed for embedded systems with a specific
Architecture computing systems function.
Generally higher clock speeds
and more complex instruction
Processing sets, leading to greater Typically lower clock speeds and simpler instruction
Power computational power. sets, optimized for control tasks.

Flip Flops and Registers

Flip-flops are fundamental sequential circuit elements capable of holding one bit of
binary information.

A register is essentially a group of flip-flops that work together as a single unit to

store multiple bits of data. For example, an 8-bit register is made up of eight
flip-flops, and it can store an 8-bit binary number (a byte).

Bus - pathway or connection between components. Main bus for 8086 -> Address
bus (20-bit), Data bus (16-bit).
Microprocessor 8086 ARCHITECTURE

Two Sections - Bus Interface Unit (BIU) and Execution Unit (EU)

Operation of BIU -
●​ Send address of the memory or I/O.
●​ Reads/writes data from/into memory/port.
●​ Supports Instruction Queuing
Instruction Queuing

To speed up program execution, the BIU fetches six instruction bytes ahead of time
from the memory. These prefetched instruction bytes are held for the execution
unit in a group of registers called 6-byte Pre-fetch Queue.

For example, a multiplication instruction is being Executed in EU. During this

execution time, the BIU fetches the next instruction or instructions from memory
into the instruction queue instead of remaining idle. The BIU continues this
process as long as the queue is not full.

Due to this, the execution unit gets the ready instruction in the queue and
instruction fetch time is eliminated.

The queue operates on the principle of first in first out (FIFO). Feature of fetching
the next instruction while the current instruction is being executed is called
Pipelining.

The 6-byte Pre-fetch Queue doesn’t store values or memory address, it stores
program instructions that will be executed by the EU.

Operation of the EU:

●​ Instruction Execution: This is the primary function. The EU takes

instructions that have been fetched and decoded by the Control Unit (CU)
and carries out the operations they specify.​

●​ Arithmetic and Logical Operations: The EU contains the Arithmetic

Logic Unit (ALU), which performs all the arithmetic calculations (addition,
subtraction, multiplication, division) and logical operations (AND, OR,
NOT, XOR, comparisons) on data.

These data are stored in the General Purpose Registers. Therefore, the EU
can also manipulate the data stored in Registers.

●​ Flag Manipulation: The EU updates status flags (often stored in a status

register or flag register) based on the results of operations. These flags
indicate conditions like zero result, negative result, carry, overflow, etc.
REGISTERS in 8086
General Purpose Registers

AX (Accumulator Register): Primarily used for arithmetic operations and data

transfers.

BX (Base Register): Commonly used as a base address for memory addressing.

CX (Count Register): Typically used as a loop counter in iterative instructions.

DX (Data Register): Often used for I/O operations and storing high parts of
multiplication/division results.

All the General Purpose Registers are 16 bits. They can be operated as 8-bits as
well.

For example, AX can be divided into AH and AL 8-bit parts for efficient operation.

Flag Registers
In the image above, “U” can be replaced with “X” as “ don’t care ”.

1. Carry Flag (CF) : In case of addition this flag is set if there is a carry out of the
MSB. The carry flag also serves as a borrow flag for subtraction. In case of
subtraction it is set when borrow is needed.

2. Parity Flag (PF) : It is set to 1 if result of byte operation or lower byte of the
word operation contain an even number of ones; otherwise it is zero.

3. Auxiliary Flag (AF) : This flag is set if there is an overflow out of bit 3 i.e.,
carry from lower nibble to higher nibble (D₃ bit to D₄ bit).

4. Zero Flag (ZF) : The zero flag sets if the result of operation in ALU is zero and
flag resets if the result is nonzero.

5. Sign Flag (SF) : After the execution of arithmetic or logical operations, if the
MSB of the result is 1, the sign bit is set. Sign bit 1 indicates the result is negative;
otherwise it is positive.

6. Overflow Flag (OF) : This flag is set if the result is out of range. For addition
this flag is set when there is a carry into the MSB and no carry out of the MSB or
vice-versa.

7. Trap Flag (TF): One way to debug a program is to run the program one
instruction at a time and see the contents of used registers and memory variables
after execution of every instruction. This process is called 'single stepping' through
a program. Trap flag is used for single stepping through a program. If set, a trap is
executed after execution of each instruction, i.e. interrupt service routine is
executed which displays various registers and memory variable contents on the
display after execution of each instruction. Thus programmer can easily trace and
correct errors in the program.

8. Interrupt Flag (IF) : It is used to allow/prohibit the interruption of a program.

If set, a certain type of interrupt (a maskable interrupt) can be recognized by the
8086; otherwise, these interrupts are ignored.

9. Direction Flag (DF) : It is used with string instructions. If DF = 0, the string is

processed from its beginning with the first element having the lowest address.
Otherwise, the string is processed from the high address towards the low address.

Segment Registers, Pointer/Index Registers

Segment Registers:

●​ CS (Code Segment): Points to the memory segment containing the

program's instructions.
●​ DS (Data Segment): Points to the memory segment where program data is
typically stored.
●​ SS (Stack Segment): Points to the memory segment used for the program's
stack.
●​ ES (Extra Segment): An additional data segment pointer for various
purposes.

Pointer/Index Registers:

●​ IP (Instruction Pointer): Holds the offset address of the next instruction to

be executed within the Code Segment.
●​ SP (Stack Pointer): Holds the offset address of the top of the stack within
the Stack Segment.
●​ BP (Base Pointer): Often used to access data on the stack relative to the
Stack Segment.
●​ SI (Source Index): Typically used to point to the source operand in string
operations relative to the Data Segment.
 ●​ DI (Destination Index): Typically used to point to the destination operand
in string operations relative to the Extra Segment.

Important Information:

●​ Segment registers define a 64KB memory area.

●​ Pointer/Index registers provide the 16-bit offset within their associated
segment.

The physical address of a particular data or information is calculated by combining

the Segment/Base Address and the Offset address.

EXAMPLE MATH

Let's say we have the following:

●​ Base Address (Segment Register Value): 1234h
●​ Offset Address (Pointer/Index Register Value): 5678h

𝑃ℎ𝑦𝑠𝑖𝑐𝑎𝑙 𝐴𝑑𝑑𝑟𝑒𝑠𝑠 = (𝐵𝑎𝑠𝑒/𝑆𝑒𝑔𝑚𝑒𝑛𝑡 𝐴𝑑𝑑𝑟𝑒𝑠𝑠 𝑋 10𝐻) + 𝑂𝑓𝑓𝑠𝑒𝑡 𝐴𝑑𝑑𝑟𝑒𝑠𝑠

1234h * 10h = 12340h

12340h + 5678h = 179B8h

Therefore, the Physical Address is 179B8h.

The 8086 uses a segmented memory architecture. To access a specific memory

location, it combines a 16-bit segment address with a 16-bit offset address to form
a 20-bit physical address.

The segment registers (like CS, DS, SS, ES) hold the base address of a 64KB
segment. To get the starting physical address of that segment, the 16-bit segment
register value is effectively multiplied by 10h.

The offset address (held in registers like IP, SP, BP, SI, DI) then specifies the
location within that segment. Adding the offset to the starting physical address of
the segment gives the final 20-bit physical address.
A basic workflow of an 8086 (do not memorize, just understand)

Let’s say you’re multiplying two numbers, 8 and 6. The microprocessor will now
fetch the “Multiplication” or “MUL” instruction. After that, it will fetch the
operands.

●​ The BIU calculates the physical address by using the base address of the
CS register and adding the offset address of the IP register.
●​ The BIU then sends this physical address to the memory. The memory
retrieves the instruction (which, in our scenario, would eventually be the
MUL instruction) and sends it back to the BIU.
●​ The BIU places this fetched instruction into the 6-byte Pre-fetch Queue.
The Pre-fetch Queue holds several pre-fetched instructions, allowing the
CPU to continue processing while the BIU fetches the next instructions, thus
improving efficiency.
●​ If the operands (8 and 6) are not already in General Purpose Registers, the
CU directs the BIU to fetch them from memory. The addresses of these
operands are determined by the instruction using the Data Segment (DS)
register along with an offset (SI register) specified in the instruction.
●​ The BIU calculates the physical addresses and retrieves the data, which is
then placed into General Purpose Registers.
●​ The Control System takes the instruction from the front of the Pre-fetch
Queue. It decodes this instruction to determine the operation to be
performed (multiplication), the operands involved and the destination for the
result.
●​ The Control System signals the Execution Unit (EU) to perform the
multiplication. The EU contains the Arithmetic Logic Unit (ALU). The
 Control System directs the ALU to take the operands from the specified
General Purpose Registers (e.g., AL containing 8 and BL containing 6).
●​ The ALU performs the multiplication operation. The result (48) is then
typically stored back into a General Purpose Register, such as the AX
register.
●​ During the execution, the status flags in the Flag Register (part of the EU)
are also updated based on the result of the operation
●​ If the instruction requires the result to be stored back in memory, the Control
System directs the BIU to perform a memory write operation.

PIN DIAGRAM of 8086

https://www.geeksforgeeks.org/pin-diagram-8086-microprocessor/
Address/Data Bus Pins (AD0-AD15):

These 16 pins (AD0 through AD15) are multiplexed. This means they serve two
distinct purposes, but at different times.

For a certain part of a memory cycle, these pins act as the lower 16 bits of the
20-bit memory address bus. AD0 is the least significant bit (LSB) of the address.

These same pins can become the 16-bit data bus for data read/write operations.

Address/Status Signal Pins (A16/S3 - A19/S6):

These four pins (A16/S3, A17/S4, A18/S5, A19/S6) are also multiplexed, and the
A16-A19 pins form the remaining part of the 20-bit Address Bus. A19 is the MSB
of the address.

Status Signal Pins S3 and S4 together indicate which segment register was used
to generate the address for the current bus cycle. This is useful for system
monitoring and debugging.

S3 S4 = 00: Extra Segment

S3 S4 = 01: Stack Segment

S3 S4 = 10: Code Segment

S3 S4 = 11: Data Segment

S5: This signal reflects the state of the Interrupt Enable Flag (IF). S5 = 1 indicates
interrupts are enabled.

S6: This signal is always logic 0 in the 8086.

Address Latch Enable (ALE) Pin:

The Address Latch Enable (ALE) pin is an output signal from the 8086.

The Address/Data pins (AD0-AD15) and the Address/Status pins (A16/S3 -

A19/S6) carry the memory or I/O address when the Address Latch Enable (ALE)
signal is HIGH (logic 1). When ALE transitions LOW (logic 0), these pins don’t
carry the address anymore and become available for data transfer (AD0-AD15)
or status signals (A16/S3 - A19/S6).