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ADE Exp 08

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0% found this document useful (0 votes)
10 views2 pages

ADE Exp 08

Uploaded by

Vishal Moyal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Shri Vile Parle Kelavani Mandal’s

INSTITUTE OF TECHNOLOGY
Dhule (M.S.)
Subject: Analog and Digital Electronics Laboratory. (BTEEEL411) Remarks

Name: __________________________________________ Roll No: _______________

Class: _________________ Branch: _______________ Division: ______________

Exp. No: _______________ Date : / /20 Signature

Title: Design and implementation of multiplexer and demultiplexer and its


applications.

Objective: Study of 8:1 MUX and 1:8 DEMUX.


Components required: Trainer kit, patch cords.
Theory:
Multiplexers are very useful components in digital systems. They transfer a large number of information
units over a smaller number of channels, (usually one channel) under the control of selection signals.
Multiplexer means many to one. A multiplexer is a circuit with many inputs but only one output. By
using control signals (select lines) we can select any input to the output. Multiplexer is also called as data
selector because the output bit depends on the input data bit that is selected. The general multiplexer
circuit has 2n input signals, n control/select signals and 1 output signal. De-multiplexers perform the
opposite function of multiplexers. They transfer a small number of information units (usually one unit)
over a larger number of channels under the control of selection signals. The general de-multiplexer circuit
has 1 input signal, n control/select signals and 2 n output signals. De-multiplexer circuit can also be
realized using a decoder circuit with enable.
i) 8:1 Multiplexer ii) 1:8 Demultiplexer

Fig 1: Logic Symbol of 8:1 MUX Fig 2: Logic Symbol of 1:8 DEMUX
Fig 4: Logic Diagram of 1:8
Fig 3: Logic Diagram of 8:1 MUX
DEMUX

Table 2: Truth Table of 1:8


Table 1: Truth Table of 8:1 MUX
Select Input O/P Select Input
DEMUX O/P
A2 A1 A0 Y A2 A1 A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0 0 0 I0
0 0 0 1 1 1 1 1 1 1 0
0 0 1 I1
0 0 1 1 1 1 1 1 1 0 1
0 1 0 I2
0 1 0 1 1 1 1 1 0 1 1
0 1 1 I3
0 1 1 1 1 1 1 0 1 1 1
1 0 0 I4
1 0 0 1 1 1 0 1 1 1 1
1 0 1 I5
1 0 1 1 1 0 1 1 1 1 1
1 1 0 I6
1 1 0 1 0 1 1 1 1 1 1
1 1 1 I7
1 1 1 0 1 1 1 1 1 1 1

Procedure:
1. Study the circuit diagram provided on the front panel of the kit.
2. Switch ON the power supply.
3. Check the +5V DC supply at pin no. 16.
4. Observe and note Logic 1 & Logic 0 voltage level of Logic inputs.
5. Connect select inputs A0, A1 & A2 to Logic inputs D0, D1 & D2 respectively.
6. Connect all the outputs Q0-Q7 to logic output indicators using patch cords.
7. Change select inputsA0, A1 & A2 and observe the corresponding low output as per truth table.

Concussion: Hence, we have verified the truth table of 8:1 multiplexer and 1:8 demultiplexer.

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