[go: up one dir, main page]

0% found this document useful (0 votes)
14 views4 pages

Module-3-Introduction of ALU and Data Path

Uploaded by

anshahlawat555
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
14 views4 pages

Module-3-Introduction of ALU and Data Path

Uploaded by

anshahlawat555
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

Introduction of ALU and Data Path


Representing and storing numbers were the basic operations of the computers of earlier times. The
real go came when computation, manipulating numbers like adding and multiplying came into the
picture. These operations are handled by the computer's arithmetic logic unit (ALU). The ALU is the
mathematical brain of a computer. The first ALU (Arithmetic Logic Unit) was indeed the INTEL
74181, which was implemented as part of the 7400 series TTL (Transistor-Transistor Logic)
integrated circuits. It was released by Intel in 1970.
What is ALU?
ALU is a digital circuit that provides arithmetic and logic operations. It is the fundamental building
block of the central processing unit of a computer. A modern central processing unit(CPU) has a very
powerful ALU and it is complex in design. In addition to ALU modern CPU contains a control unit
and a set of registers. Most of the operations are performed by one or more ALUs, which load data
from the input register. Registers are a small amount of storage available to the CPU. These registers
can be accessed very fast. The control unit tells ALU what operation to perform on the available data.
After calculation/manipulation, the ALU stores the output in an output register.

The CPU can be divided into two sections: the data section and the control section. The data section
is also known as the data path.
An Arithmetic Logic Unit (ALU) is a key component of the CPU responsible for performing
arithmetic and logical operations. The collection of functional units like ALUs, registers, and buses
that move data within the processor. together are known as Data Path, they execute instructions and
manipulate data during processing tasks.
BUS
In early computers BUS were parallel electrical wires with multiple hardware connections. Therefore
a bus is a communication system that transfers data between components inside a computer, or
between computers. It includes hardware components like wires, optical fibers, etc and software,
including communication protocols. The Registers, ALU, and the interconnecting BUS are
collectively referred to as data paths.
Types of the bus
There are mainly three type of bus:-
1. Address bus: Transfers memory addresses from the processor to components like storage and
input/output devices. It's one-way communication.
2. Data bus: carries the data between the processor and other components. The data bus is
bidirectional.
3. Control bus: carries control signals from the processor to other components. The control bus
also carries the clock's pulses. The control bus is unidirectional.
The bus can be dedicated, i.e., it can be used for a single purpose or it can be multiplexed, i.e., it can
be used for multiple purposes. when we would have different kinds of buses, different types of bus
organizations will take place.
Registers
In Computer Architecture, the Registers are very fast computer memory which is used to execute
programs and operations efficiently. but In that scenario, registers serve as gates, sending signals to
various components to carry out little tasks. Register signals are directed by the control unit, which
also operates the registers.
The following list of five registers for in-out signal data storage:
1. Program Counter
A program counter (PC) is a CPU register in the computer processor which has the address of
the next instruction to be executed from memory . As each instruction gets fetched, the
program counter increases its stored value by 1. It is a digital counter needed for faster
execution of tasks as well as for tracking the current execution point.
2. Instruction Register
In computing, an instruction register (IR) is the part of a CPU's control unit that holds the
instruction currently being executed or decoded. The instruction register specifically holds the
instruction and provides it to the instruction decoder circuit.
3. Memory Address Register
The Memory Address Register (MAR) is the CPU register that either stores the memory
address from which data will be fetched from the CPU, or the address to which data will be
sent and stored. It is a temporary storage component in the CPU(central processing unit) that
temporarily stores the address (location) of the data sent by the memory unit until the
instruction for the particular data is executed.
4. Memory Data Register
The memory data register (MDR) is the register in a computer's processor, or central
processing unit, CPU, that stores the data being transferred to and from the immediate access
storage. Memory data register (MDR) is also known as memory buffer register (MBR).
5. General Purpose Register
General-purpose registers are used to store temporary data within the microprocessor . It is a
multipurpose register. They can be used either by a programmer or by a user.
What is Data Path?
Suppose that the CPU needs to carry out any data processing action, such as copying data from
memory to a register and vice versa, moving register content from one register to another, or adding
two numbers in the ALU. Therefore, whenever a data processing action takes place in the CPU, the
data involved for that operation follows a particular path, or data path.
Data paths are made up of various functional components, such as multipliers or arithmetic logic
units. Data path is required to do data processing operations.
One Bus Organization
In one bus organization, a single bus is used for multiple purposes. A set of general-purpose registers,
program counters, instruction registers, memory address registers (MAR), memory data registers
(MDR) are connected with the single bus. Memory read/write can be done with MAR and MDR. The
program counter points to the memory location from where the next instruction is to be fetched.
Instruction register is that very register will hold the copy of the current instruction. In the case of one
bus organization, at a time only one operand can be read from the bus.
As a result, if the requirement is to read two operands for the operation then the read operation needs
to be carried twice. So that's why it is making the process a little longer. One of the advantages of one
bus organization is that it is one of the simplest and also this is very cheap to implement. At the same
time a disadvantage lies that it has only one bus and this "one bus" is accessed by all general-purpose
registers, program counter, instruction register, MAR, MDR making each and every operation
sequential. No one recommends this architecture nowadays.
Two Bus Organization
To overcome the disadvantage of one bus organization another architecture was developed known as
two bus organization. In two bus organizations, there are two buses. The general-purpose register can
read/write from both the buses. In this case, two operands can be fetched at the same time because of
the two buses. One bus fetch operand for ALU and another bus fetch for register. The situation arises
when both buses are busy fetching operands, the output can be stored in a temporary register and
when the buses are free, the particular output can be dumped on the buses.

There are two versions of two bus organizations, i.e., in-bus and out-bus. From in-bus, the general-
purpose register can read data and to the out bus, the general-purpose registers can write data. Here
buses get dedicated.
Three Bus Organization
In three bus organizations we have three buses, OUT bus1, OUT bus2, and an IN bus. From the out
buses, we can get the operand which can come from the general-purpose register and evaluated in
ALU and the output is dropped on In Bus so it can be sent to respective registers. This implementation
is a bit complex but faster in nature because in parallel two operands can flow into ALU and out of
ALU. It was developed to overcome the busy waiting problem of two bus organizations. In this
structure after execution, the output can be dropped on the bus without waiting because of the
presence of an extra bus. The structure is given below in the figure.

The main advantages of multiple bus organizations over the single bus are as given below.
1. Increase in size of the registers.
2. Reduction in the number of cycles for execution.
3. Increases the speed of execution or we can say faster execution.

You might also like