Module 1
Module 1
Semester 2/2024
Contents
1
1.4.2.2 One’s Complement . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
1.4.3 Two’s Complement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.4.3.1 Arithmetic with Two’s Complement . . . . . . . . . . . . . . . . . . 34
1.5 Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2
Chapter 1
3
Note 1: In electrical engineering, two conductors are said to be inductively coupled or mag-
netically coupled when they are configured in a way such that change in current through one
wire induces a voltage across the ends of the other wire through electromagnetic induction. A
changing current through the first wire creates a changing magnetic field around it by Ampere’s
circuital law. The changing magnetic field induces an electromotive force (EMF or voltage) in
the second wire by Faraday’s law of induction. The amount of inductive coupling between two
conductors is measured by their mutual inductance.
1.1.2.2 Digital
In digital signaling the electrical signal itself is not directly the information it represents; instead, the
information is encoded. The most common type of encoding is binary (1’s and 0’s). The 1’s and 0’s
are represented by the electrical signal. The simplest form of digital signaling is to define a threshold
voltage directly in the middle of the range of the electrical signal. If the signal is above this threshold,
the signal is representing a 1. If the signal is below this threshold, the signal is representing a 0. This type
of signaling is not considered continuous as in analog signaling; instead, it is considered to be discrete
because the information is transmitted as a series of distinct values. The signal transitions between a 1 to
0 and 0 to 1 are assumed to occur instantaneously. While this is obviously impossible, for the purposes
of information transmission, the values can be interpreted as a series of discrete values. This is a digital
signal and is not the actual information, but rather the binary encoded representation of the original
information. Digital signals are not represented using traditional mathematical functions; instead, the
digital values are typically held in tables of 1’s and 0’s.
Figure 1.1 shows an example of analog signal (left) and an example of digital signal (right). While
the digital signal is in reality continuous, it represents a series of discrete 1 and 0 values.
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Figure 1.1: Analog (left) vs. digital (right) signals.
In-class Question 1: If a digital signal is only a discrete representation of real information, how is
it possible to produce high-quality music without hearing "gaps" in the output due to the digitization
process? [8min]
1. The gaps are present, but they occur so quickly that the human ear can’t detect them.
2. When the digital music is converted back to analog sound, the gaps are smoothed out since an
analog signal is by definition continuous.
4. The gaps can be heard if the music is played slowly, but at normal speed, they can’t be.
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Figure 1.2: Analog vs. digital signals in the presence of noise.
Another reason that digital systems are preferred over analog ones is the simplicity of the circuitry.
In order to produce a 1 and 0, you simply need an electrical switch. If the switch connects the output to
a voltage below the threshold, then it produces a 0. If the switch connects the output to a voltage above
the threshold, then it produces a 1. It is relatively simple to create such a switching circuit using modern
transistors. Analog circuitry, however, needs to perform the conversion of the physical quantity it is
representing (e.g., pressure, sound) into an electrical signal all the while maintaining a direct correspon-
dence between the input and output. Since analog circuits produce a direct, continuous representation of
information, they require more complicated designs to achieve linearity in the presence of environmental
variations (e.g., power supply, temperature, fabrication differences).
Fig. 1.3 shows an example comparison between an analog-inverting amplifier and a digital inverter.
The analog amplifier uses dozens of transistors (inside the triangle) and two resistors to perform the in-
version of the input. The digital inverter uses two transistors that act as switches to perform the inversion.
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A final reason that digital systems are being widely adopted is their reduced power consumption.
With the advent of complementary metal-oxide transistors (CMOS), electrical switches can be created
that consume very little power to turn on or off and consume relatively negligible amounts of power to
keep on or off. This has allowed large-scale digital systems to be fabricated without excessive levels
of power consumption. For stationary digital systems such as servers and workstations, extremely large
and complicated systems can be constructed that consume reasonable amounts of power. For portable
digital systems such as smartphones and tablets, this means useful tools can be designed that are able
to run on portable power sources. Analog circuits, on the other hand, require continuous power to ac-
curately convert and transmit the electrical signal representing the physical quantity. Also, the circuit
techniques that are required to compensate for variances in power supply and fabrication processes in
analog systems require additional power consumption. For these reasons, analog systems are being
replaced with digital systems wherever possible to exploit their noise immunity, simplicity, and low-
power consumption. While analog systems will always be needed at the transition between the physical
(e.g., microphones, camera lenses, sensors, video displays) and the electrical world, it is anticipated
that the push toward digitization of everything in between (e.g., processing, transmission, storage) will
continue.
In-class Question 2: When does the magnitude of electrical noise on a digital signal prevent the
original information from being determined? [8min]
1. When it causes the system to draw too much power.
2. When the shape of the noise makes the digital signal look smooth and continuous like a sine wave.
3. When the magnitude of the noise is large enough that it causes the signal to inadvertently cross the
threshold voltage.
4. It doesn’t. A digital signal can withstand any magnitude of noise.
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1.2.1 Learning Outcomes
• Describe the formation and use of positional number systems.
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particular number system often renames this radix point to reflect its base. For example, in the base 10
number system (i.e., decimal), the radix point is commonly called the decimal point; however, the term
radix point can be used across all number systems as a generic term. If the radix point is not present in a
number, it is assumed to be to the right of number. Fig. 1.4 shows an example number highlighting the
radix point and the relative positions of the whole and fractional numerals.
Next, we need to define the position of each numeral with respect to the radix point. The position of
the numeral is assigned a whole number with the number to the left of the radix point having a position
value of 0. The position number increases by 1 as numerals are added to the left (2, 3, 4...) and decreased
by 1 as numerals are added to the right (-1, -2, -3). We will use the variable p to represent position. The
position number will be used to calculate the value of each numeral in the number based on its relative
position to the radix point. Fig. 1.5 shows the example number with the position value of each numeral
highlighted.
In order to create a generalized format of a number, we assign the term digit d to each of the numerals
in the number. The term digit signifies that the numeral has a position. The position of the digit within
the number is denoted as a subscript. The term digit can be used as a generic term to describe a numeral
across all systems, although some number systems will use a unique term instead of digit which indicates
its base. For example, the binary system uses the term bit instead of digit; however, using the term digit
to describe a generic numeral in any system is still acceptable. Fig. 1.6 shows the generic subscript
notation used to describe the position of each digit in the number.
We write a number from left to right starting with the highest position digit that is greater than 0 and
ending with the lowest position digit that is greater than 0. This reduces the number of numerals that are
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written; however, a number can be represented with an arbitrary number of 0’s to the left of the highest
position digit greater than 0 and an arbitrary number of 0’s to the right of the lowest position digit greater
than 0 without affecting the value of the number. For example, the number 132.654 could be written as
0132.6540 without affecting the value of the number. The 0’s to the left of the number are called lead-
ing 0’s and the 0’s to the right of the number are called trailing 0’s. The reason this is being stated is
because when a number is implemented in circuitry, the number of numerals is fixed, and each numeral
must have a value. The variable n is used to represent the number of numerals in a number. If a number
is defined with n = 4, that means 4 numerals are always used. The number 0 would be represented as
0000 with both representations having an equal value.
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< 6 < 7 < 8 < 9 < A < B < C < D < E < F. We use the generic term digit to describe the numerals
within a hexadecimal number.
At this point, it becomes necessary to indicate the base of a written number. The number 10 has an
entirely different value if it is a decimal number or binary number. In order to handle this, a subscript
is typically included at the end of the number to denote its base. For example, 1010 indicates that this
number is decimal "ten". If the number was written as 102 , this number would represent binary "one
zero." Table 1.2 lists the equivalent values in each of the four number systems just described for counts
from 010 to 1510. The left side of the table does not include leading 0’s. The right side of the table
contains the same information but includes the leading zeros. The equivalencies of decimal, binary, and
hexadecimal in this table are typically committed to memory.
In-class Question 3: The base of a number system is arbitrary and is commonly selected to match a
particular aspect of the physical system in which it is used (e.g., base 10 corresponds to our ten fingers;
base 2 corresponds to the two states of a switch). If a physical system contained three unique modes and
a base of 3 was chosen for the number system, what is the base 3 equivalent of the decimal number 3?
[5min]
1. 310 = 113
2. 310 = 33
3. 310 = 103
4. 310 = 213
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1.2.7.1 Converting to Decimal
The value of each digit within a number is based on the individual digit value and the digit’s position.
Each position in the number contains a different weight based on its relative location to the radix point.
The weight of each position is based on the radix of the number system that is being used. The weight
of each position in decimal is defined as:
In order to find the decimal value of each of the numerals in the number, its individual numeral value
is multiplied by its positional weight. In order to find the value of the entire number, each value of the
individual numeral-weight products is summed. The generalized format of this conversion is written as:
pmax
X
T otal Decimal V alue = di .(radix)i (1.2)
i=pmin
In this expression, pmax represents the highest position number that contains a numeral greater than
0. The variable pmin represents the lowest position number that contains a numeral greater than 0. These
limits are used to simplify the hand calculations; however, these terms theoretically could be +∞ to
−∞ with no effect on the result since the summation of every leading 0 and every trailing 0 contributes
nothing to the result.
As an example, let’s evaluate this expression for a decimal number. The result will yield the original
number but will illustrate how positional weight is used. Let’s take the number 132.65410 . To find the
decimal value of this number, each numeral is multiplied by its positional weight, and then all of the
products are summed. The positional weight for the digit 1 is (radix)p or (10)2 . In decimal this is called
the hundred’s position. The positional weight for the digit 3 is (10)1 , referred to as the ten’s position.
The positional weight for digit 2 is (10)0 , referred to as the one’s position. The positional weight for
digit 6 is (10)−1 , referred to as the tenth’s position. The positional weight for digit 5 is (10)−2 , referred
to as the hundredth’s position. The positional weight for digit 4 is (10)−3 , referred to as the thousandth’s
position. When these weights are multiplied by their respective digits and summed, the result is the
original decimal number 132.65410 . Fig. 1.8 shows this process step-by-step.
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Figure 1.8: Convert 132.65410 to Decimal.
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Figure 1.9: Convert 101.112 to Decimal.
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1.2.7.4 Hexadecimal to Decimal
Let’s convert 1AB.EF16 to decimal. The same process is followed with the exception that the base is
changed to 16. When performing the conversion, the decimal equivalent of the numerals A-F needs to
be used. Fig. 1.11 shows the step-by-step process converting a hexadecimal number to decimal.
In some cases, it is desired to specify a level of accuracy for the conversion in order to bound the
number of fractional digits in the final result. For example, if the conversion in Fig. 1.11 was stated as
"convert 1AB.EF16 to decimal with a fractional accuracy of 2 digits", the final result would be 427.9310 .
How rounding is handled can also be specified with the two options being with or without rounding.
In the case where the conversion is performed with rounding, additional fractional digits may need to
be computed to determine if the least significant digit of the new decimal fraction needs to be altered.
For example, let’s say the conversion in Fig. 1.11 is stated as "convert 1AB.EF16 to decimal with a
fractional accuracy of 4 digits with rounding". In this case, the final result would be 427.933610 . Notice
how rounding was applied to the digit in position p = −3 changing it from a 5 to a 6 based on the
value in position p = −4. Now let’s say the conversion in Fig. 1.11 is stated as "convert 1AB.EF16 to
decimal with a fractional accuracy of 4 digits without rounding." In this case, the final result would be
427.93351 0. Notice how without rounding simply drops all of the digits beyond the specified level of
accuracy.
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Figure 1.12: Convert 11.37510 to Binary.
Many times when converting to binary, the number of fractional bits that result from the conversion
is more than which is needed. In this case, rounding is applied to limit the fractional accuracy. The sim-
plest rounding approach for binary numbers is to continue the conversion for one more bit beyond the
desired fractional accuracy. If the next bit is a 0, then you leave the fractional component of the number
as is. If the next bit is a 1, you round the least significant bit of your number up. Often this rounding will
result in a cascade of roundings from the LSB to the MSB. As an example, let’s say that the conversion
in Fig. 1.12 was specified to have a fractional accuracy of 2 bits. If the bit in position p = −3 was a 0
(which it is not, but let’s just say it is for the sake of this example), then the number would be left as is,
and the final converted number would be 1011.012 . However, if the bit in position p = −3 was a 1 (as it
actually is in Fig. 1.12), then we would need to apply rounding. We would start with the bit in position
p = −3. Since it is a 1, we would round that up to a 0, but we would need to apply the overflow of this
rounding to the next higher-order bit in position p = −1. That would then cause the value of p = −1 to
go from a 0 to a 1. The final result of the conversion with rounding would be 1011.102 .
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with a zero fractional value has not been obtained. Fig. 1.13 shows the step-by-step process converting
a decimal number to octal with a fractional accuracy of 4 digits.
Rounding of octal digits uses a similar approach as when rounding decimal numbers, with the ex-
ception that the middle of the range of the numbers lies between digits 38 and 48 . This means that any
number to be rounded that is 48 or greater will be rounded up. Numbers that are 38 or less will be rounded
down, which means the fractional component of the converted number is left as in.
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Figure 1.14: Convert 254.65510 to Hexadecimal.
Rounding of hexadecimal digits uses a similar approach as when rounding decimal numbers, with
the exception that the middle of the range of the numbers lies between digits 716 and 816 . This means
that any number to be rounded that is 816 or greater will be rounded up. Numbers that are 716 or less will
be rounded down, which means the fractional component of the converted number is left as in.
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rightmost grouping does not have enough symbols, it is simply padded on the right with trailing 0’s.
Each of these groups is then directly substituted with their 2n base symbol.
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Figure 1.16: Convert 111011.111112 to Hexadecimal.
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Figure 1.17: Convert 347.128 to Binary.
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Figure 1.19: Convert 71.88 to Hexadecimal.
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In-class Question 4: A "googol" is the term for the decimal number 1e100. When written out manu-
ally, this number is a 1 with 100 zeros after it (e.g., 10,000,000,000,000,000,000,000,000,000,000,000,
000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000,000).
This term is more commonly associated with the search engine company Google, which uses a
different spelling but is pronounced the same. How many bits does it take to represent a googol in
binary? [15min]
1. 100 bits
2. 256 bits
3. 332 bits
4. 333 bits
When performing binary addition, the width of the inputs and output is fixed (i.e., n-bits). Carries
that exist within the n-bits are treated in the normal fashion of including them in the next higher position
sum; however, if the highest position summation produces a carry, this is a uniquely named event. This
event is called a carry out or the sum is said to generate a carry. The reason this type of event is given
special terminology is because in real circuitry, the number of bits of the inputs and output is fixed in
hardware and the carry out is typically handled by a separate circuit. Fig. 1.22 shows this process when
adding two 4-bit numbers. What is the sum of 1010.12 and 1110.12 ? Did this addition generate a carry?
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Figure 1.22: Multiple-bit binary addition.
The largest decimal sum that can result from the addition of two binary numbers is given by 2.(2n −1).
For example, two 8-bit numbers to be added could both represent their highest decimal value of (2n − 1)
or 25510 (i.e., 1111 11112 ). The sum of this number would result in 51010 or (1 1111 11102 ). Notice that
the largest sum achievable would only require one additional bit. This means that a single carry bit is
sufficient to handle all possible magnitudes for binary addition.
As with binary addition, binary subtraction is accomplished on fixed widths of inputs and outputs
(i.e., n-bits). The minuend and subtrahend are aligned at the radix point, and subtraction begins at the
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least significant bit position. Borrows are used as necessary as the subtractions move from the least
significant position to the most significant position. If the most significant position requires a borrow,
this is a uniquely named event. This event is called a borrow in or the subtraction is said to require a
borrow. Again, the reason this event is uniquely named is because in real circuitry, the number of bits
of the input and output is fixed in hardware and the borrow in is typically handled by a separate circuit.
Fig. 1.24 shows this process when subtracting two 4-bit numbers.
Notice that if the minuend is less than the subtrahend, then the difference will be negative. At this
point, we need a way to handle negative numbers.
In-class Question 5: If an 8-bit computer system can only perform unsigned addition on 8-bit inputs
and produce an 8-bit sum, how is it possible for this computer to perform addition on numbers that are
larger than what can be represented with 8 bits (e.g., 100010 + 100010 = 200010 )? [5min]
4. The computer keeps track of the carry out and uses it in a subsequent 8-bit addition, which enables
larger numbers to be handled.
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it is called a signed number. It is important to always keep track of the type of number we are using
as the same bit values can represent very different numbers depending on the coding mechanism that is
being used.
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magnitude and one’s complement that are rarely used but are studied to motivate the power of two’s
complement. When talking about a signed number, the number of bits and the type of encoding are
always stated. For example, we would say, "This is an 8-bit, two’s complement number."
Figure 1.26: Decimal values that a 4-bit, signed magnitude code can represent.
There are drawbacks of signed magnitude encoding that are apparent in Fig. 1.26. First, the value
of 010 has two signed magnitude codes (00002 and 10002 ). This is an inefficient use of the available
codes and leads to complexity when building arithmetic circuitry since it must account for two codes
representing the same number.
The second drawback is that addition using the negative numbers does not directly map to how dec-
imal addition works. For example, in decimal if we added (-5) + (1), the result would be -4. In signed
magnitude, adding these numbers using a traditional adder would produce (-5) + (1) = (-6). This is
because the traditional addition would take place on the magnitude portion of the number. A 510 is
represented with 1012 . Adding 1 to this number would result in the next higher binary code 1102 or 610 .
Since the sign portion is separate, the addition is performed on |5|, thus yielding 6. Once the sign bit
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is included, the resulting number is -6. It is certainly possible to build an addition circuit that works on
signed magnitude numbers, but it is more complex than a traditional adder because it must perform a
different addition operation for the negative numbers versus the positive numbers. It is advantageous to
have a single adder that works across the entire set of numbers. Due to the duplicate codes for 0, the
range of decimal numbers that signed magnitude can represent is reduced by 1 compared to unsigned
encoding. For an n-bit number, there are 2n unique binary codes available, but only 2n − 1 can be used
to represent unique decimal numbers. If we use the notation NSM to represent any possible value that an
n-bit, signed magnitude number can take on, the range would be defined as:
Fig. 1.27 shows how to use this expression to find the range of decimal values that an 8-bit, signed
magnitude code can represent.
The process to determine the decimal value from a signed magnitude binary code involves treat-
ing the sign bit separately from the rest of the code. The sign bit provides the polarity of the decimal
number (0 = positive, 1 = negative). The remaining bits in the code are treated as unsigned numbers
and converted to decimal using the standard conversion procedure described in the prior sections. This
conversion yields the magnitude of the decimal number. The final decimal value is found by applying
the sign. Fig. 1.28 shows an example of this process.
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Figure 1.28: Finding the range of a signed magnitude number.
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Figure 1.29: Decimal values that a 4-bit, one’s complement code can represent.
Again, we notice that there are two different codes for 010 (00002 and 11112 ). This is a drawback of
one’s complement because it reduces the possible range of numbers that can be represented from 2n to
(2n −1) and requires arithmetic operations that take into account the gap in the number system. There are
advantages of one’s complement, however. First, the numbers are ordered such that traditional addition
works on both positive and negative numbers (excluding the double 0 gap). Taking the example of (-5)
+ (1) again, in one’s complement the result yields +4, just as in a traditional decimal system. Notice
in one’s complement, −510 is represented with 10102 . Adding 1 to this entire binary code would result
in the next higher binary code 10112 or −410 from the above table. This makes addition circuitry less
complicated, but still not as simple as if the double 0 gap was eliminated. Another advantage of one’s
complement is that as the numbers are incremented beyond the largest value in the set, they roll over and
start counting at the lowest number. For example, if you increment the number 01112 (710 ), it goes to
the next higher binary code 10002 , which is −710 . The ability to have the numbers roll over is a useful
feature for computer systems.
If we use the notation N10 scomp to represent any possible value that an n-bit, one’s complement
number can take on, the range is defined as:
Fig. 1.30 shows how to use this expression to find the range of decimal values that a 24-bit, one’s
complement code can represent.
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Figure 1.30: Finding the range of a 1’s complement number
The process of finding the decimal value of a one’s complement number involves first identifying
whether the number is positive or negative by looking at the sign bit. If the number is positive (i.e.,
the sign bit is 0), then the number is treated as an unsigned code and is converted to decimal using the
standard conversion procedure described in prior sections. If the number is negative (i.e., the sign bit is
1), then the number sign is recorded separately, and the code is complemented in order to convert it to its
positive magnitude equivalent. This new positive number is then converted to decimal using the standard
conversion procedure. As the final step, the sign is applied. Fig. 1.31 shows an example of this process.
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1.4.3 Two’s Complement
Two’s complement is an encoding scheme that addresses the double 0 issue in signed magnitude and 1’s
complement representations. In this approach, the negative number is obtained by subtracting its positive
equivalent from 2n . This is identical to performing a complement on the positive equivalent and then
adding one. If a carry is generated, it is discarded. This procedure is called taking the two’s complement
of a number. The procedure of complementing each bit and adding one is the most common technique to
perform a two’s complement. In this way, the most significant bit of the number is still the sign bit (0 =
positive, 1 = negative), but all of the negative numbers are in essence shifted up so that the double 0 gap
is eliminated. Taking the two’s complement of a positive number will give its negative counterpart and
vice versa. Let’s look at the decimal values that a 4-bit, two’s complement number can take on. These
are shown in Fig. 1.32.
Figure 1.32: Decimal values that a 4-bit, two’s complement code can represent.
There are many advantages of two’s complement encoding. First, there is no double 0 gap, which
means that all possible 2n unique codes that can exist in an n-bit number are used. This gives the largest
possible range of numbers that can be represented. Another advantage of two’s complement is that addi-
tion with negative numbers works exactly the same as decimal. In our example of (-5) + (1), the result is
(-4). Arithmetic circuitry can be built to mimic the way our decimal arithmetic works without the need
to consider the double 0 gap. Finally, the roll over characteristic is preserved from one’s complement.
Incrementing +7 by +1 will result in -8. If we use the notation N2comp to represent any possible value
that an n-bit, two’s complement number can take on, the range is defined as:
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Range of a T W O0 S COM P LEM EN T number : −(2n−1 ) ≤ N2comp ≤ +(2n−1 − 1) (1.5)
Fig. 1.33 shows how to use this expression to find the range of decimal values that a 32-bit, two’s
complement code can represent.
The process of finding the decimal value of a two’s complement number involves first identifying
whether the number is positive or negative by looking at the sign bit. If the number is positive (i.e.,
the sign bit is 0), then the number is treated as an unsigned code and is converted to decimal using the
standard conversion procedure described in prior sections. If the number is negative (i.e., the sign bit
is 1), then the number sign is recorded separately, and a two’s complement is performed on the code in
order to convert it to its positive magnitude equivalent. This new positive number is then converted to
decimal using the standard conversion procedure. The final step is to apply the sign. Fig. 1.34 shows an
example of this process.
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Figure 1.34: Finding the decimal value of a two’s complement number.
To convert a decimal number into its two’s complement code, the range is first checked to determine
whether the number can be represented with the allocated number of bits. The next step is to convert
the decimal number into unsigned binary. The final step is to apply the sign bit. If the original decimal
number was positive, then the conversion is complete. If the original decimal number was negative, then
the two’s complement is taken on the unsigned binary code to find its negative equivalent. Fig. 1.35
shows this procedure when converting −9910 to its 8-bit, two’s complement code.
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Figure 1.35: Finding the two’s complement code of a decimal number.
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1310 − 410 = 910 , this is the same as performing 1310 + (−410 ) = 910 . This allows us to use a single
adder circuit to perform both addition and subtraction as long as we have the ability to take the two’s
complement of a number. Creating a circuit to perform two’s complement can be simpler and faster than
building a separate subtraction circuit, so this approach can sometimes be advantageous.
There are specific rules for performing two’s complement arithmetic that must be followed to en-
sure proper results. First, any carry or borrow that is generated is ignored. The second rule that must
be followed is to always check if two’s complement overflow occurred. Two’s complement overflow
refers to when the result of the operation falls outside of the range of values that can be represented by
the number of bits being used. For example, if you are performing 8-bit, two’s complement addition,
the range of decimal values that can be represented is −12810 to +12710 . Having two input terms of
12710 (0111 11112 ) is perfectly legal because they can be represented by the 8 bits of the two’s comple-
ment number; however, the summation of 12710 + 12710 = 25410 (1111 11102 ). This number does not fit
within the range of values that can be represented and is actually the two’s complement code for −210 ,
which is obviously incorrect. Two’s complement overflow occurs if any of the following occurs:
• The sum of like signs results in an answer with opposite sign (i.e., positive + positive = negative
or negative + negative = positive) like for a 4-bit number: (+7) + (+2) = -7 ← Wrong result as it is
overflowed:
0111
+ 0010
1001
The right answer of (+7) + (+2) is (+9), but +9 cannot be fit into 4-bit (therefore, it overflows)!
• The subtraction of a positive number from a negative number results in a positive number (i.e.,
negative – positive = positive) like for a 4-bit number: (-8) - (+2) = +6 ← Wrong result as it
is overflowed (Remember to convert all subtraction to addition as digital circuits do not have
subtraction circuit!):
1000
− 0010
1000
+ 1110
0110
The right answer of (-8) - (+2) is (-10), but -10 cannot be fit into 4-bit (therefore, it overflows)!
• The subtraction of a negative number from a positive number results in a negative number (i.e.,
positive – negative = negative) like for a 4-bit number: (+1) - (-7) = -6 ← Wrong result as it
is overflowed (Remember to convert all subtraction to addition as digital circuits do not have
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subtraction circuit!):
0001
− 0111
0001
+ 1001
1010
The right answer of (+1) - (-7) is (+8), but +8 cannot be fit into 4-bit (therfore, it overflows)!
Computer systems that use two’s complement have a dedicated logic circuit that monitors for any of
these situations and lets the operator know that overflow has occurred. These circuits are straightforward
since they simply monitor the sign bits of the input and output codes. Fig. 1.36 shows how to use two’s
complement in order to perform subtraction using an addition operation.
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Figure 1.36: Two’s complement addition.
In-class Question 6: A 4-bit, two’s complement number has 16 unique codes and can represent
decimal numbers between −810 and +710 . If the number of unique codes is even, why is it that the range
of integers it can represent is not symmetrical about zero?
1. One of the positive codes is used to represent zero. This prevents the highest positive number from
reaching +810 and being symmetrical.
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3. It isn’t asymmetrical if zero is considered a positive integer. That way there are eight positive
numbers and eight negatives numbers.
1.5 Assignments
1. What is the radix of the binary number system? What is the radix of the decimal number system?
What is the radix of the hexadecimal number system?
2. For the number 261.367, what position (p) is the number 2 in? what position (p) is the number
leftmost 6 in? what position (p) is the number 7 in?
3. What is the name of the number system containing 102 ? What is the name of the number system
containing 1010 ? What is the name of the number system containing 1016 ? What is the name of
the number system containing 108 ?
4. Which of the four number systems covered in week 0 (i.e., binary, decimal, hexadecimal, and
octal) could the number 22 be part of? Give all that are possible. Which of the four number
systems (i.e., binary, decimal, hexadecimal, and octal) could the number 1F be part of? Give all
that are possible.
5. If the number 101.111 has a radix of 2, what is the weight of the position containing the leftmost
1? what is the weight of the position containing the rightmost 1?
6. If the number 261.367 has a radix of 10, what the weight of the position containing the numeral
2? what is the weight of the position containing the numeral 7?
7. If the number 261.367 has a radix of 16, what is the weight of the position containing the numeral
3? what is the weight of the position containing the numeral 7?
9. Convert 0.11112 to decimal. Provide the full answer without limiting its accuracy or rounding.
Treat all numbers as unsigned.
10. Convert 0.11112 to decimal with a fractional accuracy of 2 digits without rounding. Treat all
numbers as unsigned.
11. Convert 1001.10012 to decimal with a fractional accuracy of 3 digits with rounding. Treat all
numbers as unsigned.
13. Convert 0.7778 to decimal. Provide the full answer without limiting its accuracy or rounding. Treat
all numbers as unsigned.
15. Convert 0.F F16 to decimal with a fractional accuracy of 4 digits without rounding. Treat all
numbers as unsigned.
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16. Convert 0.F F16 to decimal with a fractional accuracy of 4 digits with rounding. Treat all numbers
as unsigned.
18. Convert 31.6562510 to binary with a fractional accuracy of 3 bits without rounding. Treat all
numbers as unsigned.
21. Convert 10.664062510 to hexadecimal with a fractional accuracy of 1 digit without rounding. Treat
all numbers as unsigned.
22. Convert 10.664062510 to hexadecimal with a fractional accuracy of 1 digit with rounding. Treat
all numbers as unsigned.
23. Compute 112 + 012 by hand. Treat all numbers as unsigned. Provide the 2-bit sum, and indicate
whether a carry out occurred.
24. Compute 1111 11112 + 0000 00012 by hand. Treat all numbers as unsigned. Provide the 8-bit
sum, and indicate whether a carry out occurred.
25. Compute 1010.10102 +1011.10112 by hand. Treat all numbers as unsigned. Provide the 8-bit sum,
and indicate whether a carry out occurred.
26. Compute 1111 11112 − 0000 00012 by hand. Treat all numbers as unsigned. Provide the 8-bit
difference, and indicate whether a borrow in occurred.
27. Compute 1111 1111.10112 − 0000 0001.11002 by hand. Treat all numbers as unsigned. Provide
the 12-bit difference, and indicate whether a borrow in occurred.
28. What range of decimal numbers can be represented by 8-bit, two’s complement numbers?
29. What range of decimal numbers can be represented by 16-bit, two’s complement numbers?
30. What range of decimal numbers can be represented by 32-bit, two’s complement numbers?
31. What range of decimal numbers can be represented by 64-bit, two’s complement numbers?
35. Compute 11102 + 10112 by hand. Treat all numbers as 4-bit, two’s complement codes. Provide
the 4-bit sum and indicate whether two’s complement overflow occurred.
36. Compute 1101 11112 + 0000 00012 by hand. Treat all numbers as 8-bit, two’s complement codes.
Provide the 8-bit sum, and indicate whether two’s complement overflow occurred.
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37. Compute 410 − 510 using 4-bit two’s complement addition. You will need to first convert each
number into its 4-bit two’s complement code and then perform binary addition (i.e., 410+(−510)).
Provide the 4-bit result, and indicate whether two’s complement overflow occurred. Check your
work by converting the 4-bit result back to decimal.
38. Compute 6410 − 10010 using 8-bit two’s complement addition. You will need to first convert
each number into its 8-bit two’s complement code and then perform binary addition (i.e, 6410 +
(−10010 )). Provide the 8-bit result and indicate whether two’s complement overflow occurred.
Check your work by converting the 8-bit result back to decimal.
39. Compute (−99)10 − 1110 using 8-bit two’s complement addition. You will need to first convert
each decimal number into its 8-bit two’s complement code and then perform binary addition (i.e.,
(−9910 ) + (−1110 )). Provide the 8-bit result, and indicate whether two’s complement overflow
occurred. Check your work by converting the 8-bit result back to decimal.
40. Compute 5010 + 10010 using 8-bit two’s complement addition. You will need to first convert each
decimal number into its 8-bit two’s complement code and then perform binary addition. Provide
the 8-bit result, and indicate whether two’s complement overflow occurred. Check your work by
converting the 8-bit result back to decimal.
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