Addressing modes: register, immediate, absolute, relative, indexed, implied, direct, bit assembler

directives - EQU, ORG, END Define byte, Word, String, conditional, macros.

INSTRUCTION SET AND ADDRESSING

MODES FOR 8086 MICROPROCESSOR
Introduction
An instruction is a basic command given to a microprocessor to perform a specified operation with
given data. Each instruction has two groups of bits. One group of bits is known as operation code
(opcode), which defines what operation will be performed by the instruction. The other field is
called operand, which specifies data that will be used in arithmetic and logical operations. The
addressing mode is used to locate the operand or data. There are different types of addressing
modes depending upon the location of data in the 8086 processor.
The instruction format should have one or more number of fields to represent instruction. The first
field is called operation code or opcode fields, and other fields are known as operand fields. The
microprocessor executes the instruction based on the information of opcode and operand fields.

Addressing Modes
An instruction is divided into operation code (opcode) and operands. The opcode is a group of bits which
indicates what operation can be performed by the processor. An operand is also known as data (datum)
and it can identify the source and destination of data. The operand can specify a register or a memory
location in any one of the memory segments or I/O ports. Figure 1 shows a general instruction format
which consists of six bytes. Some instructions have only an opcode and such instructions are called
single-byte instructions. Some instructions contain one- or two-or three- or four-byte operands.

Figure 1: General 8086 instruction format.

There are different ways to specify an operand. Each way of how an operand can be specified is
called an addressing mode. The different addressing modes of 8086 microprocessors are as
follows:
 Immediate addressing
 Register addressing
 Memory addressing
 Branch addressing

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Immediate addressing
In this mode of addressing, the 8-bit or 16-bit operand is a part of the instruction. For example,
MOV AX, 4000H. In this instruction, the data 4000H can be loaded to the AX register
immediately. Some other examples are given below:
 MOV BX, 7000H; load 7000H in BX register
 MOV CX, 4500H; store 4500H in CX register
Register addressing
In the 8086 microprocessor, some instructions are operated on the general-purpose registers.
The data is in the register specified by the instruction. The format for register addressing is:
MOV Destination, Source
In this instruction, the data from the source register can be copied into the destination register.
The 8-bit registers (AL, AH, BL, BH, CL, CH, DL, DH) and 16-bit registers (AX, BX, CX, DX, SI, DI, SP,
BP) may be used for this instruction. The only restriction is that both operands must be of the
same length. For example,
 MOV AL, BL; Copies the value of BL into AL
 MOV AX, BX; Copies the contents of BX into AX
Memory addressing
Memory addressing requires determination of physical address. The physical address can be
computed from the content of segment address and an effective address. The segment address
identifies the starting location of the segment in the memory and effective address represents
the offset of the operand from the beginning of this segment of memory. The 16-bit effective
address can be made up of base, index, and displacement.
The basic formula for the 16-bit effective address (EA) and the 20-bit physical address (PA) is
given below:
 16-bit EA = Base + Index + Displacement
 20-bit PA = Segment × 10 + Base + Index + Displacement
Memory addressing has the following combinations:
 Direct addressing
 Register indirect addressing
 Based addressing
 Indexed addressing
 Based Indexed addressing
 Based Indexed with displacement addressing
 String addressing

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Direct addressing
In this mode of addressing, the instruction operand specifies the memory address where data is
located. The displacement-only addressing mode consists of an 8-bit or 16-bit constant that
specifies the offset of the actual address of the target memory location. For example, MOV AX,
[5000] copies 2 bytes of data starting from memory location DS × 10 + 5000H to the AX register.
The lower byte is at the location DS × 10 + 5000H and the higher byte will be at the location DS
× 10 + 5001H.
Another example is MOV AL, DS: [5000H]. In this instruction, the content of the memory location
DS × 10 + 5000H loads into the AL register.
The instruction MOV DS: [2000H], AL means that the content of the AL register will move to
memory location DS × 10 + [2000H]. The computation of memory location for the operand is
illustrated in Fig. 2. In this figure, the effective address (EA) is 2000H and the physical address
(PA) is PA = DS × 10 + EA = 4000 × 10 + 2000 = 42000. The physical address (PA) computation for
other segment registers with same effective address is given below:
PA = CS × 10 + EA, PA = SS × 10 + EA, and PA = ES × 10 + EA.

Figure 2: Direct memory addressing

Generally, all displacement values or offsets are added with the data segment to determine the
physical address. If something other than a data segment is required, we must use a segment
override prefix before the address. For example, to access memory location 4000H in the Stack
Segment (SS), the instruction will be MOV AX, SS: [2000H]. Similarly, to access the memory
location in the Extra Segment (ES), the instruction will be written as MOV AX, ES: [2000H].
Register indirect addressing
This instruction specifies a register containing an address, where data is located. The effective
address of the data is in the base register BX or an index register that is specified by the
instruction. This addressing mode works with index registers SI, DI, and base registers BX and BP
registers.
The examples of this addressing mode in the 8086 microprocessor are as follows:
 MOV AL, [BX]

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  MOV AH, [DI]
 MOV AL, [SI]
 MOV AH, [BP]
The BX, SI, or DI registers are using the DS segment by default. The base pointer uses stack
segment by default. The segment override prefix symbols are used to access data in different
segments. The examples of segment override instructions are as follows:
MOV AL, CS: [BX]
MOV AL, DS: [BP]
MOV AL, SS: [SI]
MOV AL, ES: [DI]
The effective address EA may either be in a base register (BX or BP) or in an index register (SI and
DI). The physical address can be computed based on contents of segment register, BX, BP, SI and
DI registers as given below:
PA = CS × 10 + BX, PA = DS × 10 + BP, PA = SS × 10 + DI, and PA = ES × 10 + SI.
The general physical address expression for register indirect memory operand is depicted in
Fig.3. The content of BX is 1000H and CS is 2000. Then the physical address is CS × 10 + BX = 2000
× 10 + 1000 = 21000H. After executing the MOV AL, [BX] instruction, the contents of the memory
location 21000H is 44H which will be stored in the AL register.

Figure 3: Register indirect addressing

Based addressing
The 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP), the
resulting value is a pointer to the location where the data resides. The effective address in based
addressing mode is obtained by adding the direct or indirect displacement to the contents of
either the base register BX or the base pointer BP. The effective address and physical address
computation are given below:
 EA = BX + 8-bit displacement
 EA = BP + 8-bit displacement
 EA = BX + 16-bit displacement
 EA = BP + 16-bit displacement

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PA = Segment × 10 + BX + 8-bit displacement, PA = Segment × 10 + BP + 8-bit displacement
PA = Segment × 10 + BX + 16-bit displacement, PA = Segment × 10 + BP + 16-bit displacement
Segment will be any one of the segments CS, DS, SS and ES.
Figure 4 shows the physical address computation in base addressing mode.

Figure 4: Based addressing

When 16-bit displacement DISP = 0025H, the contents of the BX register are 0500H and the
contents of the DS register is 4000H, the physical address = DS × 10 + BX + DISP = 4000H × 10 +
0500 + 0025 = 40525H. After execution of MOV AL, DS: [BX+DISP] instruction, the contents of
the memory location 40525H will be copied into the AL register.
The examples of base addressing mode instructions in the 8086 microprocessor are:
 MOV AL, [BX+8-bit DISP]
 MOV AH, [BX+8-bit DISP]
 MOV AL, [BP+8-bit DISP]
 MOV AH, [BP+8-bit DISP]
Indexed addressing
These addressing modes can work similar to the based addressing mode. The 8-bit or 16-bit
instruction operand is added to the contents of an index register (SI or DI), and the resulting
value is a pointer to the location where the data resides.
The displacement value is used as a pointer to the starting point of an array of data in memory
and the contents of the specified register is used as an index. The EA and PA in the indexed
addressing are as follows:
 EA = SI + 8-bit displacement
 EA = DI + 8-bit displacement

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  EA = SI + 16-bit displacement
 EA = DI + 16-bit displacement
PA = Segment × 10 + SI + 8-bit displacement, PA = Segment × 10 + DI + 8-bit displacement
PA = Segment × 10 + SI + 16-bit displacement, PA = Segment × 10 + SI + 16-bit displacement
Segment will be any one of segment registers (CS, DS, SS and ES).
The index addressing modes generally involve BX, SI, and DI registers with the data segment. The
[BP+DISP] addressing mode uses the stack segment by default. In the register indirect addressing
modes, the segment override prefixes can be used to specify different segments. The examples
of these instructions are as follows:
 MOV AL, SS: [BX + DISP],
 MOV AL, ES: [BP + DISP]
 MOV AL, CS: [SI + DISP],
 MOV AL, SS: [DI + DISP]
Figure 5 shows the physical address computation in index addressing mode.

Figure 5
When 16-bit displacement DISP = 0055H, the contents of SI are 0100H and the contents of DS
register is 4000H, the physical address = DS × 10 + SI + DISP = 4000H × 10 + 0100 + 0055 = 40155H.
If MOV AL, DS: [SI + 0025] is executed, the contents of the memory location 40155H, FF will be
loaded into the AL register.
Based Indexed addressing
The contents of a base register (BX or BP) is added to the contents of an index register (SI or DI),
the resulting value is a pointer to the location where the data resides. The effective address is
the sum of a base register and an index register which are specified in the instruction. The based
indexed addressing modes are simply combinations of the register indirect addressing modes.

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These addressing modes form the offset by adding together a base register (BX or BP) and an
index register (SI or DI). The EA and the PA computation are given below:
 EA = BX + SI, EA = BX + DI
 EA = BP + SI, EA = BP + DI
 PA = Segment × 10 + BX + SI
 PA = Segment × 10 + BX + DI
 PA = Segment × 10 + BP + SI
 PA = Segment × 10 + BP + DI
Figure 6 shows the physical address computation in based indexed addressing mode.

Figure 6
For example, if the content of BX register is 0200H and SI contains 0100H. Then the instruction
MOV AL, [BX + SI] loads the content of the memory location DS × 10 + BX + SI into the AH register.
If DS = 4000H, the memory location address is 4000 × 10 + 0200 + 0100 = 40300H whose content
66H will be loaded into the AH register.
The examples of this addressing mode instruction are as follows:
 MOV AL, [BX + DI]
 MOV AL, [BX + SI]
 MOV AL, [BP + SI]
 MOV AL, [BP + DI]
Based Indexed with displacement addressing
The 8-bit or 16-bit instruction operand is added to the contents of a base register (BX or BP) and
index register (SI or DI), the resulting value is a pointer to the location where the data resides.
The effective address is the sum of an 8-bit or 16-bit displacement and based index address. The
computation of EA and the PA are given below:
 EA = BX + SI + 8-bit or 16-bit instruction
 EA = BX + DI 8-bit or 16-bit instruction
 EA = BP + SI + 8-bit or 16-bit instruction

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  EA = BP + DI 8-bit or 16-bit instruction
 PA = Segment × 10 + BX + SI + 8-bit or 16-bit instruction
 PA = Segment × 10 + BX + DI + 8-bit or 16-bit instruction
 PA = Segment × 10 + BP + SI + 8-bit or 16-bit instruction
 PA = Segment × 10 + BP + DI+ 8-bit or 16-bit instruction
Figure 7 shows the physical address computation in based indexed with displacement addressing
mode.

Figure 7
When 16-bit displacement DISP = 0020H, the contents of BX register are 4000H, the contents of
SI are 0300 and the contents of DS register is 5000H, the physical address = DS × 10 + BX + SI +
DISP = 5000H × 10 + 4000 + 0300 + 0020 = 54320H. When MOV AL, DS: [BX + SI + DISP] is
executed, the content of the memory location 54320H will be copied into the AL register. The
examples of this addressing mode instruction are as follows:
 MOV AL, [BX + DI + DISP]
 MOV AL, [BX + SI + DISP]
 MOV AL, [BP + SI + DISP]
 MOV AL, [BP + DI + DISP]
String addressing
String is a sequence of bytes or words which are stored in memory. Stored characters in word
processors and data table are examples of string. Some instructions are designed to handle a
string of characters or data. These instructions have a special addressing mode where DS: SI is
used as a source of string and ES: DI is used to locate the destination address of the string. For
example, MOV SB instruction is used to move a string of source data to the destination location.
Branch addressing
The basic types of branch addressing are shown in Fig. 8. The intrasegment mode is used to
transfer the control to a destination that lies in the same segment where the control transfer
instruction itself resides. In the intersegment mode, address is used to transfer the control to a
destination that lies in a different segment.

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For the branch-control transfer instructions, the addressing modes depend upon whether the
destination location is within the same segment or in a different one. It depends upon the
method of passing the destination address to the processor. There are two types of branch
control instructions: intersegment and intrasegment addressing modes.
During execution of program instruction, when the location to which the control to be
transferred lies in a different segment other than the current one, the mode is called
intersegment mode. If the destination location lies in the same segment, the mode is called
intrasegment mode.

Figure 8
Intrasegment direct addressing
The effective branch address is sum of an 8-bit or 16-bit displacement and the current contents
of IP. When the displacement is 8-bit long, it is referred to as a short jump. Intrasegment direct
addressing is what most computer books refer to as relative addressing because the
displacement is computed ‘relative’ to the IP. It may be used with either conditional or
unconditional branching, but a conditional branch instruction can have only 8-bit displacement.
Figure 9 shows intrasegment direct addressing. In the intrasegment direct mode, the destination
location to which the control is transferred lies in the same segment where the control-transfer
instruction lies and appears directly in the instruction as an immediate displacement value. The
displacement is relative to the contents of the IP. The expression for effective address in which
the control is transferred is given below:
 EA = Contents of IP + 8- or 16-bit displacement.

Figure 9

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Intrasegment indirect addressing
The effective branch address is the contents of a register or memory location that is accessed
using any of the above data-related addressing modes except the immediate mode. The
contents of IP are replaced by the effective branch address. This addressing mode may be used
only in unconditional branch instructions. Figure 10 shows intrasegment indirect addressing.
In this mode, the control to be transferred lies in the same segment where the control
instruction lies and is passed indirectly to the instruction. It uses unconditional branch
instructions. The effective branch address is that of the register or memory location that is
accessed using any of the above data-related addressing modes except the immediate mode.
The contents of the IP are replaced by the effective branch address.

Figure 10
Intersegment direct addressing
This replaces the contents of IP with a part of the instruction and the contents of CS with
another part of the instruction. The purpose of this addressing mode is to provide a means of
branching from one code segment to another. Figure 11 shows intersegment direct addressing.
If the location to which the control is to be transferred lies in the different segment than in
which the control transfer instruction lies, it is called intersegment. This addressing mode
provides the facility of branching from one segment to another segment. The CS and IP specify
the destination address directly in the instruction. It replaces the contents of IP with the part of
the instruction and the contents of CS with another part of the instruction.

Figure 11
Intersegment indirect addressing
This mode replaces the contents of IP and CS with the contents of two consecutive words in
memory that are referenced using any of the above data-related addressing modes except the
immediate and register modes. Figure 12 shows intersegment indirect addressing.

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The location to which the control is to be transferred lies in the different segment than the
segment where the transfer control instruction lies and is passed to the instruction indirectly,
i.e., it replaces the contents of IP and CS with the contents of 2 consecutive words in the
memory. The starting address of the memory block may be referred using any of the
addressing modes except immediate.

Figure 12

I/O Port addressing mode

The 8086 microprocessor does not communicate directly with input/output (I/O) devices
because they are often electromechanical hence operating at speeds below electronic speeds.
Eight bit registers are used to interface the microprocessor with the I/O devices. These are the
ones known as ports.
There are two types of I/O port addressing:
 Fixed (direct) port addressing,
 Variable (indirect) port addressing.

Fixed port addressing

In this mode, one-byte port address is provided after the opcode byte. It is used for ports
whose address are between 0H (0d) and 0FFH (255d). The total area set aside for the port is 64
kilobytes, that is, 0H to 0FFFFH. Therefore, if in a given program, the microprocessor is required
to access a port whose address is above 0FFH, then all the other ports shall be addressed
indirectly.

Examples
IN AL, 83H ; read data at port whose port address is 83H and
; store in register AL
IN AX, 83H ; read data from ports whose port addresses are 83H
; and 84H and store content of 83H into register AL
; and those of 84H into AH.

Variable port addressing

In this mode the port address is not provided explicitly in the instruction. The address of the
port is implied to be the contents of the D register always. In this form of addressing, the

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program can change the port address as the execution of the program proceeds. Always, 16-bit
address is assumed and register AX is used to copy the port contents into.

Examples
IN AX, DX ; copy content of port whose address is specified by
; value in register DX, into register AX.
Out DX, AX ; copy content of register AX into port whose address
; is specified by value in register DX.

Review Questions

a. With respect to input/output ports of Intel 80X86 microprocessor:

i. state the two ranges used
ii. differentiate between direct and indirect addressing
b. briefly describe the need for addressing modes in a processor
c. using examples explain the following addressing modes:
i. immediate
ii. register
iii. direct
d. given the following assembly language instructions (𝑖 − 𝑣𝑖𝑖𝑖), state:
I. the addressing mode for each
II. the class of instruction for each
III. the instruction being performed by each line

MOV CL, AL
IN AX, DX
ROL AX, 1
SUM: ADD AX, 23H
DEC CL
JMP SUM
RET
END
e. Given that the value from port is 67 and AX initially contains 17, determine the value in AX after:
i. performing each instruction in part “d” for the first iteration
ii. end of program execution.
f. The contents of different registers are AX = 1000H, BX = 2000H, SI = 3000H, DI = 4000H, BP =
5000H, SP = 6000H, CS = 8000H, DS = 1000H, SS = 2000H, IP = 7000H.

Determine the 16-bit effective addresses and 20-bit physical address for the following addressing
modes:

i. Direct addressing
ii. Register indirect addressing

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 iii. Based Indexed addressing
iv. Based Indexed with displacement addressing

Assume Offset (displacement) = 0500H

Solution
i. Direct addressing mode
MOV AX, [0100H] is the example of direct addressing mode instruction. The 16-bit effective
addresses = 0500 and 20-bit physical address = CS × 10 + 0500 = 8000 × 10 + 0500 = 80500H
ii. Register indirect addressing
MOV AX, [BX] is the example of register indirect addressing mode instruction. The 16-bit
effective addresses are the content of BX register = 2000 and 20-bit physical address = CS × 10 +
BX = 8000 × 10 + 2000 = 82000H
iii. Based indexed addressing
MOV AX, DS: [BX + SI] is the example of base indexed addressing mode instruction. The 16-bit
effective addresses are the content of BX plus SI register = BX + SI = 2000 + 3000 = 5000H and
20-bit physical address = DS × 10 + BX + SI = 1000 × 10 + 2000 + 3000 = 15000H
iv. Based indexed with displacement addressing
MOV AX, DS: [BX + SI + DISP] is the example of base indexed addressing mode instruction. The
20-bit physical = DS × 10 + BX + SI + DISP = 1000 × 10H + 2000H + 3000H + 0500H = 15500H

Exercise
1. For each of the following 8086 assembly instruction, state the:
a. addressing mode,
b. class of instruction it belongs to.
i. MOV DS, AX
ii. SUB [BP+SI], BL
2. With respect to the following instructions, state the:
a. difference between the two instructions in each pair of the following lines of code,
b. addressing mode of each instruction.
i. ADD AX, BX and
ii. ADC AX, BX.
iii. SUB AX, BX and
iv. SBB AX, BX

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