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Analog Circuit HOD

The document outlines the procedures and objectives for using an OP-AMP trainer kit to study inverting and non-inverting amplifiers, as well as integrator circuits. It includes equipment lists, theoretical background, and detailed steps for conducting experiments, along with observation tables for recording results. The conclusions drawn from the experiments confirm the operational characteristics and performance metrics of the designed circuits.

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17 views25 pages

Analog Circuit HOD

The document outlines the procedures and objectives for using an OP-AMP trainer kit to study inverting and non-inverting amplifiers, as well as integrator circuits. It includes equipment lists, theoretical background, and detailed steps for conducting experiments, along with observation tables for recording results. The conclusions drawn from the experiments confirm the operational characteristics and performance metrics of the designed circuits.

Uploaded by

choudharyvanshshankar1234
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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OPT.01: OP-AMP TRAINER OPAMP AS AN PaO) 1 ou: OPAMP TRaNER 1 INVERTING AMpLpypycEDURE for inverting AC Ar OBJECTIVE: - To study the operation of OPAMP as an inverting amplifier EQUIPMENT:- OPT-01 Trainer kit. Power Supply. Patch cords. Oscilloscope. Multi-meter. Function generator. aren ‘THEORY:- Inverting amplifier ‘Make the connections o Apply 488mVp-p, 1 KHz ‘Apply #15 V to op-amp. ‘Switch on power supply it ‘Observe the waveform Vary ilp frequency fro jegative feedback to invert and amplify a voltage. The fesistor allows some of the output signal to be returned to the input. Since the outpie 480" out of phase, this amount is effectively subtracted from the input, thereby reducing 4) Voltage Gain input into the operational amplifier. This reduces the overall ‘gain of the ampliier an AF = “NE ( ‘dubbed negative feedback + Za= Rua (because V - is a virtual ground) + Rihird wesistor, of value, added between the non-inverting input and ground, whic not necessary, minit ‘errors due to input bias currents. (om e gain of the amplifier is determined by the ratio of Rito Ri. That is es feesback C presence of the negative sign is a convention indicating that the outow = inverted. Fple, if Ry is 10,000, and Riis 1,000 0, then the gain would be -100000/10000, ‘An inverting amplifier uses n¢ 3) Input Resistance Rit Re Ss IR eA 4) Output Resistance Rr OR aA 5) Bandwidth EXPT NO, q yo: crane rranen VERTI ING AMPLIp)pR0CEDURE for Invert AC Amplifier out. 14 amplify a voltage. The Make the connections on OPT-01 boat ‘Apply 488mVp-p, 1 KHz sine wave as ‘Apply #15 V to op-amp. ‘Switch on power Supply. ‘Observe the waveform on CRO. Vary ilp frequency from 1 KHz and voltage Vo. Plot freq. response Vo Vs Frequency the input. Since the outpvormulas:- he input, thereby reducing) i gain of the amplifier anc ing input and ground, while nts. That is at the output is inverted. F wuld be -100000/10009, Voltage Gain APs oAF Se ao) Reet ARs Re eat) Ry 2) Gain of the feedback Circuit Ri 3) Input Resistance Rr Rit Re HR aA 4) Output Resistance Ref 4H 5) Bandwidth shown in practical circuit ‘input to op-amp. note down the corresponding readings of ofp 1d find out the 3db response of afaPN OPT-01: OP-AMP TRAINER ®) Total Voltage oftset _OP-AMP TRAINER Voot ea 1+AB OBSERVATION TABLE:. =1K(@9112M) = 4 Input Output | GAIN, ] Frequency | Vottage, | vorin Frequency Response tor invenng ora neeeenncs ae Vo (mv) Amplifior Ror oD 1.967213 | eeew es | = 1000 F v a 1.92623 = %0 sy Ppa = ew 67.66 192623 | | = 20 Mcassaae 2 ee ; 500 ars ai | 3 F=f" (1+AB)= UG: ea ao 1.92623 g 4 : 4 aa % 6 300 y Ar 00, a0) 1.92623 200 300 400 500 = 1M aa Input Frequency (Kitz) are a. Sau esatars) 200 a Bz 0.672131 | | 6) Total Voltage offse Vest = + Vex Calculations:- FOR Ic 741 and for our design values are 1+ AB A=200 R=2M R= 750 = £0192V Rietk RF=2K able: 1) Voltage Gain Are A(Ri#Re) Parameters Gain of the feed Circuit | Input Resistano Output Resistar Bandwidth | Total Voltage 0 CONCLUSION: Thus Gain for the design found from the graph. )) lnput Resistance ee —|iR a!) Re = 1K (9.911.2M) = 1K se for Inve 4, Output Resistance peeuemeerong) | | me CONCLUSION: : oh the designed IN ris vetfied and its cutof frequency is us Gain for the found from the g°2PP ering AC Ampli OPT-01: OP-AMP TRAINER PRACTICAL CIRCUIT DIAGRAM FOR INVERTING Dc AMPLIFIER, Re 3 _ at 2 DESIGN:- R; =1K9 resistor. Re = 2K resistor. Ri = 1KQ resistor. Calculated gain =2 Do the calculation using design formulas. URE for Inverting DC Amplifier: the connections on OPT-01 board as shown in practical circuit. Apply 1.4 VDC using VRtas input to op-amp. ply £15 V to op-amp. itch on power supply. JECTIVE: - Study the operatio UIPMENT:- ‘OPT-01 Tr Power Sup Patch cord: Oscilloscog Mutti-meter Function gf PARONS EORY:- m-inverting amg 1plifies a voltage ( Input impedanc Vary ip DC voltage from 1.4 to 5V and note down the corresponding readings i Vo. Input DC voltage, | Output Voltage, | GAIN, Av Vin Vo (V) (Vo/Vin) 1.418 -2.830 -1.99577 “ 4 2 25 5 “2 3 4 -2 5 ~10 -2 DC Amplifier is verified, © The input i inverting (-) i from the inves © Because ne: match, the in Although this current. © The non-inve operational z © These input unmodeled ¢ ‘© Assuming th <_ ensuring the The voltage p with the eq impedances ¢ bias currents + Aresis betwee impede + The mi effect | o o Ve . ai i in ~ expTNO. 2 iNVE AMPLIFIER > INVERTING OPAMP AS AN NON pIEcTIVE: - Baty the operation of OPAMP inverting ampli as an non- ‘QupMeENT:- 4, OPT-01 Trainer kit Power Supply Patch cords. Oscilloscope Multi-meter. 6. Function generator HEORY=- irinverting amplifier Vi Vout , Sa Ry nutiplies by a constant greater than 1) eon non-inverting g readings of rn oe input puts, which iS PICS the impedance ay (ie, Fain parallel wit Ra) Fd inverting inputs from the inverting B opecause match, the input impedance I ‘afnough this ciroutt has ° Targe input current. inverting er. wig suffers from error of input bias ait eakage currents ito Ine The non rational ampiier These input currents generate vollages act ike unmodeled INDE offsets. These ‘effects can lead tO Noise on the output (€-S offsets or drift. te are matched, ther ect can be mitigated PY (9) and inverting ©) inputs draw sm ‘at each input im rence betwee! ips is the eauvaleny Vesistance of Rx in Par non-inverting it will ensure ret Bee stor fA fev source and (@) input will be mat offeet wotages, and thet betwee! Papedances ooking ed bi ‘currents will ‘then gen va n gene plier which acts O° the difference Sputs) $0 1009 25 Ne I are not matched fers provide Some method of balancing the two ofan external potentiometer) ‘be added to the operational amplifier le . { OPT-01: OP-AMP TRAINER _ input to nullify the effect “for * Another solution is to insert a variable resistor betwee L the non-inverting (+) input. The iH a P-AMP TRAINER resistance can ' Vi so44 =a voltages at eacit input are matched be tuned un ty Frequency Respons * Operational amplifiers with MOSFET-based input a Currents that are so smal hat they often can be nega 30° Ng DESIGN for Non-inverting AC Amplifier:- Ry = 1KQ, Rr = 1KQ, consider Ro = 75Q. Gain = 2 Do the calculation using design formulas. PROCEDURE for non-inverting AC Amplifier: uP. at O”P aoe In y RI RF d 1 P-impedance AW : nulas:- + Voltage Gain Parameter J, Make the connections on OPT-01 board as shown in Practical circuit. Age A(RitRe) % Apply 220mVp-p, 1 KHz sine wave as input to op-amp 3. Apply +15 V to op-amp. 4. Switch on power supply. Ee poser the waveform on CRO. » Naty ip frequency from 1 KHz and note down the c \ding readings ¢ i wn the corresponding reading ars 1+Re & (i % Ri Plot freq, response Vo Vs Frequency and find out the 3db response of graph. Gain of the feedback Circu B= Rt Frequency (KHz) | Output Voltage, Vo (mv) GAIN, (VolVin) | aa ¥ | RytRe aa 3 | _ Input resistance a 2 Re = Ri(1+AB) 440 2 i ae 7.96363636 Out Put Resistances a 2.18181818 or = Ro 2 ree 1+AB ; 460 JF eea8ee Bandwidth i ——] fF =f (1+A8) ea 1.81818182 JF = 1° (14AB) z 1454548 = UGS a 0.92727273 om peeab364 Total Voitage offset Voot = + Vest 1+AB MP TRAINER ifier or inverting AMP! aa wy tween the Vane Frequency Response for Nom be tuned uN S0u ant ae input stag, peut stages lectegs Mave GAIN) mula veitage Gain Parameter actical circuit. Peace) (exact) Ae = (deal) Circuit Input Re = ‘out Put Resistances = Ro _— 4408 Bandwidth + (+A) mB = vcs ee iS Total Voltage offset —— 44+ AB i prot: OPAMP TRAINEN: and for oe aoe values are “Ne oan: -FORIC pa calculations com ee / ake ow 1K 4, 0P-AMP-TRAINER 4) Voltage Gain ies te (Rt) ee RytRrt AR = 200 (2K) =1.98 4K+1K+200.1K 2) Gain of the feedback Circuit Bd Ry yciusi ae 5.Gain forthe desi RytRe id from the graph B Spit inverting DC Amp ——=05 2k 3) _ Input resistance Re = Ri(1+AB) 2M (1+200 x 0.5) et 2M (1+100) 202M BIGN for Non-ir 4KQ, Re= 1K ONCLUS aus Gait 3: OP AMP TRAINER [Parameters | Calcula Voltage Gain Galeulated 1.98 Gain of the feedback | 0.5 Circuit Input Resistance 202M0___ Output Resistance | 0.750 Bandwi | S05KHz__ Total Voltage offset_ | #0.128V -LUSION:: Sera for the designed non-inverting AC Amplifier is verified and ts cutoff frequency iS from the graph. vinverting DC Amplifier:- ak ¢ caleulation using design formulas. fie Stake the 2f non-nyered poi boat as shown in practical EC ake tne 7 DC using VRtas input to oP-amP ‘Apply £15 V to op-amp. y0e ee 4,4 to SV and note down the corresponding readings of o/P - Vary ip DC vol "voltage Vo. oi (OPT-01: OP-AMP TRAINER, opt EXPT NO, 3] [5°%®] Ionut oBsective } To design and test integrator circuit using op-amp and to find useful freq integrator EQUIPMENT:- OPT.O1 Trainer kit Power Supply Patch cords. Oscilloscope. Multi-meter. lL = Function generator, lr THEORY: Itpertains mathematical operation of integration Le, output vollage Vo is the integrated voltage Ii. The circuit is basically an inverting amplifier in which feedback resistor Ri replaced by capacitor CF. The output voltage of integrator is given as vonage 1 Vat | “RGF ° Where C = constant of integration [prop. To the value of Vo at t= o] Thus Vo is directly proportional to the negative integral of Vi & inversely proportional to time constant RiCr. But when Vin = 0 the integrator works as an open loop amplifies acts as open circuit to the i/p offset voltage Vio. So the op-amp output tends to satura Vsat or - Vsat. Therefore in practical integrator, a resistor Re is connected across Cr. which limits the| frequency roll off problem can be corrected by addition of Re. The low frequency gai Rel The frequency response of integrator is as shown. The circuit acts as an integrator bety frequencies F. (gain limiting Freq.) & Fe (zero dB gain frequency) P Ps al =" 4 2aRiCr 2aReCe PROCEDURE: GAIN (Av) Fe DESIGN:- Ry= 1KO, Re = 10 KO, Cr = 0.01yf f,=1.591KHz < 3dB a f= 15.91KHz «048 Do the calculation using design formulas. 2 OBSERVATION TABLE: Vin = 1 Vp-p Sine wave Vout = Cosine wave oh OPAMP TRAINER Input Frequency(tiz) | Output Voltage, a 1°, Vop | (WVotsy | Gain | _Av=201og¢Vorvin) 1 20 \ 20 { 20 eee t000 $ |“Teeasazaes 4500 (3db) — | 1827627705 2000 [16 2019608 5000 { 02501 410000 45000 (Odb) 20000 25000 Frequency Response of Integrator s the integrated pack resistor RA tional to proportional en loop amplifier i tends to satura -. which fimits the: oe iow frequency 92! co) Input Frequency OFT-O1 OP AMP TRAINER Connect the ckt as per ckt diagram on OPT-O & Vaty ip frequency from 10 Hz to KHz Note down corresponding ofp voltage Vo Calculate gain in dB as Av = 20 logis (VolVin) ie Plot freq. response [Av in dB Vs Frequency] on semi log pape Find slop, F., Fs from graph, ip signal of VIVA QL OBSERVATION TABLE: Parameter | ‘Theoretical Value | Practical Value Fs | , | “T50TkHz ———~Y T.5KHz } | “T15KHz 15.91KHz DESIGN FORMULAS: iff,=f/ 10, then Re = 10R, f= 1/ (2m Ry Cy) fh=1/(2nRyCy) Row = Ry Il Rp CONCLUSION: Thus the integrator is de: rained using op-amp and component and difference between Theoretical and practical values is observed due te non-ic ideal components, a we 4A eux ou Yongn ye Kouendayy ® St 2H 205 asodsay, equaLeyp sniyy | SNOISNTDNO9 } 2M BUS09 = ino, nem ous dtp push "TNBV1 NOUWAYasE0 1oded Bo} wes uo [ary sp gp un "9A o640A do Guppuodsaio> unon ors 2H 0121 0} woy Aovenbay dp Ain» dns yous dh fe YOEN LO-LdO vo WeIBEP INDIO 10d separ ou owe ‘AWNVdO Busn ynau9 soyenuasayi -:,anB14 on sungz00ud IL 10 30MLUSNISHI paniasqo s} San|er JeOH2t -gquauodwioo je9p-uOU O} ANP vwopt voenioq sousseyid “Ly/01 due-do Bujsn pawousréu 5! enor uIP :NOISMTONO: Seelam oe 21901 sojauesed avi Linsai sug = MOF sorst=| sata =!9 ha ph Conzastat fouanbay, Suryuny wes omn sit (Cosuxa)/b=t {9p0 51 wes aun uot ye Aouanboy} © sit ‘SV INWOS NOISA (ay) fowonbais anduy (ap) ay ‘Nive | soyenuasoyia 4940) 2804504 jad By mos wo | zeny oor 04 amet 101.0 ¥ sav Bus AjuowWOd ysou pasn s! 10} J9}IP BY) Bay “E a peur 19 JOINUALAYIP a4 SEW $0298} YDIYM duse-do oyBuss & Bust (OPT.01: OP-AMP TRAINER __ EXPT NO. 7 OPAMP AS A CLIPPER CIRCUIT OBJECTIVE: - Study to design IC741 as a Positive and Negative Clipper Circuit EQUIPMENT:- 4, OPT-01 Trainer Kit. Power Supply. Patch cords. DSO. Function Generators. . Multi-meter. OOEoNn THEORY:- Clipping circuits are used for removing a portion of the input signal. Clippers can be posity or negative depending on which part of the input signal is clipped off. Prouigve Clipper: - Practical figure 1 shows the circut diagram for a positive clipper usir OPAMP. The potentiometer P is used to adjust the reference voltage. (b) Waveforms for Vyer> The reference voltage Vier has been adjusted to say +1V, By using the pot. When \ positive but less than Vie, the diode D will conduct as it is forward biased. If the diod postimed to be identical, it will act as a short circuit & force the circuit to operate ¢ voltage follower. Vy =Vag 100 Vin Vr During the negative hatf cycle of the input, the diode is forward biased & hence condu! make, =Vn 1:Vy =Vg ——— an $9 ‘Thus the positive hatf cycle of the input is clipped particularly or fully depending ° amplitude of Vet " a= 0, we get only the negative half cycle at the output. gemma e Positive clipper is converted nging the polarity of into a negative clipper by si rsing diode D1 and it figure 2. Feference voltage V ref The resutant cuit is ahown in practical negative clipper pitage .Diode Ore the negative parts of the input signal below the reference lows the input Vin. Hower When Vin >-Vref and therefore during this period output VO ped off because Di moter ee antv pation of the output voltage below —Vref is rect (HSno eRe MNT RR ee cul of It -Vro changed to *Vrof by i e +Vco; the output voltage below +Vref will be clipp i. The diode D1 must be on for Vin >+Vref and itor Vin < YViet Figure 1: Positive Clipper Circuit Using OPAMP. ake the connections on OPT-O1 board as shown in practical Aguret as per your I. 18Vtopin7 andve 15V to pin 4 of op-amp. SuPFaine wave from Function Generator as a Vin input to non- . Keep Vref = +1V. rve the positive clipper circuit output wave form. the output waveform signal. ve the output waveform signal, ‘OPT: OP-AMP TRAINER _ Negative Clipper: Figure 2: Negative Clipper Circuit Using OPAMP. 4. Make the connections on OPT-O1 board as shown in practical figure2 as per yo design. ‘Apply +ve 15V to pin 7 and —ve 15V to pin 4 of op-amp. ‘Switch on power supply. ‘Apply 1 KHz, 4Vpp Sine wave from Function Generator as a Vin input to non inverting terminal of op-amp- Apply Vief by adjusting Pot P. Keep Vref = a Beene waveform on CRO. Observe the positive cIPEct circuit output wave form. Now Change Vref = OV and observe the output signal. Now Change Vref =+1V and observe the output waveform signal. PEN er 9e DESIGN: - Consider P = 10KQ Pot. Ri = 10K0 Resistor. D = 1N4007 Diode. Do the caloulation as per design formula. 'WAVEFORMS:- ating ne a | 0P-AMP TRANER 1 = | = pron ee oe | wyeform 4:- Negative CHPPEr | waveform 3:- hive Clipper Waveform ive 4 ‘w= AV When Vref = +1V gate aipper circu using °F” -Vref he design of postive and Ne 1, - Went to neo Using OPAMP. sson OPT. board es shown i Precieal uaa perv 2: Negative Clipper Circuit ae 18V to pin 4 of op-amP- P Sine wave ea from Function Generate! sing Pot P. Keep Vref = -1V, CRO, "0 Otene he gostecipparefeut gus NV ond eh tpt eS signal. re the output wawerorm sig%9) | OPT-01: OP-AMP TRAINER ——_——— orT-01: 0P- AME EXPT No, OPAMP AS A CLAMBER ¢ \ OBJECTIVE: - Study to design IC741 as a Positive and Negative ct IRy s lamper Circui, EQUIPMENT:- ‘ 4. OPT-01 Trainer kit. 2, Power Supply. 3. Patch cords. 4. DSO. 5. Function Generators. 6. Multi-meter. THEORY:- re In clamper circuits, a predetermined dc level is added to the input voltage the output is clamped to a desired dc level. If the clamped de level is Be as i caled a postive camper. On the other hand, i the clamped de level svepaiea? called a negative clamper. The other equivalent terms for clamper are de ineter a restorer. 7 A clamper circuit with a variable dc level is shown in Practical figutet. Here the input wave form is clamped at +Vref and hence the circuit is called a positive cclamper. The input and ‘output wave forms are shown in following. a.oU SEL>> 4, 09-1-—____\w 2 VI(UIH) 100 (\ 7A a 1 Tie 2 UICRL) The output voltage of the clamper is a net result of ac and de input inverting and non-inverting input terminals fespectively. Therefore, to operation, each input must be considered separatcly, Fist, 60 inverting input. Since this voltage is positive, is +VO is positive, voltage. voltage Vin at the inveing input is concemed during its charging C1 to the negative peak val Vin diode D1 is reverse biased and hease ie , Hewat during the negative halt-cycle is Sit peak voltage VP, the output peak voltage negative peak of 2VP is at Vref, For precision clamping C1Rd<

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