Computer Organization and Architecture

Code: SEng3022

Set by :
Molla K.
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 Chapter 5
Basic Computer Organization and Design

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 Out Lines
 Instructional Code

 Computer Registers

 Computer Instructions

 Timing and Control

 Memory Reference Instructions

 Design of Basic Computer

 Design of accumulator Logic

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 Instruction Code
 The organization of the computer is defined by its internal registers, the timing
and control structure, and the set of instructions that it uses.

 A computer instruction is a binary code that specifies a sequence of micro

operations for the computer.

 An instruction code is a group of bits that instruct the computer to perform a

specific operation.

 Instruction code is usually divided into two parts:

 Operation part: a group of bits that define such operations as add, subtract,
multiply, shift, and complement.

 Address part: Contains registers or memory words where the address of

operand is found or the result is to be stored.

 Each computer has its own instruction code format. 4

 Cont’d
The internal organization of a digital system is defined by the sequence of micro-
operations it performs on data stored in its registers.

The general purpose digital computer is capable of executing various micro-

operations and instructed what specific sequence of operations it must perform.

The user of the computer can control the process by means of a program.

A program is a set of instructions that specify the operations, operands, and the
sequence by which processing has to occur.

Depending on the complexity and the functions a computer may be classified as:

 A Special Purpose Computer is constructed to perform one or very few

functions.
 A General Purpose Computer is constructed to perform many different
functions.
A computer instruction is a binary code that specifies a sequence of micro-operations
for the computer. 5
 Cont’d
 Instruction codes together with the data are stored in memory.

 The computer reads each instruction from memory and places it in a control

register.

 The control then interprets the binary code of the instruction and proceeds

to execute it by issuing a sequence of micro-operations.

 Instruction code is usually divided into parts, each having its own particular

interpretation.

 The most basic part of an instruction code is its operation part.

 The operation code of an instruction is a group of bits that defines such

operations as Add, Subtract, Multiply, Shift and Complement.

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 Computer Registers
 Computer instructions are usually stored in consecutive memory locations
and executed sequentially one at a time.
 The control reads an instruction from specific address in memory and
executes it.
 The control continues by reading the next instruction in sequence and
executes it and so on.
 This type of instruction sequencing needs a counter to calculate the address of
the next instruction after execution of the current instruction is completed.
 It is also necessary to provide a register in a control unit for storing the
instruction code after it is read from the memory.
 The computer needs processor registers for manipulating data and a register
for holding a memory address.
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 Cont’d
 The memory word has a capacity of 4096 words and each word contains
16 bits. 12 bits of an instruction word are needed to specify the address of
the operand.
 The operation part of the instruction and a bit to specify a direct or
indirect address.
1. The data register (DR) holds the operand read from memory.
2. The accumulator (AC) register is a general purpose processing
register.
3. The instructions read from memory are placed in instruction register
(IR).
4. The temporary register (TR) is used for holding temporary data
during the processing. 8
 List of registers for the basic computer
Register Number of Bits Register Name Function
Symbol

DR 16 Data register Holds memory operand

AR 12 Address Register Holds address of memory

AC 16 Accumulator Processor register

IR 16 Instruction Register Holds instruction code

PC 12 Program Counter Holds address of instruction

TR 16 Temporary Register Holds temporary data

INPR 8 Input Register Holds input character

OUTR 8 Output Register Holds Output character

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 Cont’d

Basic Computer Registers and Memory

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 Computer Instructions
 The operation of the processor is determined by the instructions it executes, referred to as machine

instructions or computer instructions.

 The collection of different instructions that the processor can execute is referred to as the

processor’s instruction set.

 The basic computer has three instruction code formats, each format has 16 bits.

 The operation code (opcode) part of the instruction contains three bits and the meaning of the

remaining depends on the operation code encountered.

 A Memory-Reference Instruction uses 12 bits to specify an address and one bit to specify the

Addressing Mode I (I = 0 for Direct Address and I = 1 for Indirect Address).

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 Cont’d
Symbol Operation Decoder Symbolic Description

AND D0 AC  AC  M[AR]

ADD D1 AC  AC + M[AR], E  Cout

LDA D2 AC  M[AR]

STA D3 M[AR]  AC

BUN D4 PC  AR

BSA D5 M[AR]  PC, PC  AR + 1

ISZ D6 If (M[AR] + 1= 0) then PC  PC + 1

Table : Memory-reference instructions 12

 Cont’d
 AND to AC: This is an instruction that performs the AND logic operation on pairs of bits in AC

and the memory word specified by the effective address. The result of the operation is transferred

to AC. The micro-operations that execute this instruction are:

D0T4: DR  M[AR]

D0T5: AC  AC  DR, SC  0

 The control function for this instruction uses the operation decoder D0 since this output of the

decoder is active when the instruction has an AND operation whose binary code value is 000.

 ADD to AC: This instruction adds the content of the memory word specified by effective address

to the value of AC. The sum is transferred into AC and the output carry Cout is transferred into E

(extended accumulator) flip-flop.

D1T4: DR  M[AR]

D1T5: AC  AC + DR, E  Cout, SC  0

D3T4: M[AR]  AC, SC  0

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 Cont’d
LDA: Load to AC: This instruction transfers the memory word specified by

effective address to AC.

 D2T4: DR  M[AR]

 D2T5: AC  DR, SC  0

STA: Store AC: This instruction stores the content of AC into the memory

word specified by the effective address. Since the output of AC is applied to the

bus and the data input of memory is connected to the bus, we can execute this

instruction with one micro operation.

 D3T4: M[AR]  AC, SC  0

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 Cont’d
 BUN: Branch Unconditionally:

 PC is incremented at T1 to prepare it for the address of the next instruction in the

program sequence.

 The BUN instruction allows the programmer to specify an instruction out of

sequence and we say that the program branches (jumps) unconditionally.

 The instruction is executed with one micro operation:

 D4T4: PC  AR, SC  0
 The effective address from AR is transferred through the common bus to PC.
Resetting SC to 0 transfers control to T0.

 The next instruction is then fetched and executed from the memory address given by
the new value in PC.

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 Cont’d
 BSA: Branch and save Return Address:

 This instruction is useful for branching to a portion of the program called subroutine
or procedure.

 The effective address plus one is then transferred to PC to serve as the address of the
first instruction in the subroutine.

 D5T4: M[AR]  PC, AR  AR + 1

 D5T5: PC  AR, SC  0

 Timing signal T4 initiates a memory write operation, places the content of PC onto the
bus, and enables the INR input of AR.

 The memory write operation is completed and AR is incremented by the time the
next clock transition occurs.

 The bus is used at T5 to transfer the content of AR to PC.

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 Cont’d
ISZ: Increment and Skip if Zero:

 This instruction increments the word specified by the effective address, and if the
incremented value is equal to 0, PC is incremented by 1.

 Since it is not possible to increment a word inside the memory, it is necessary to

read the word into DR, increment DR, and store the word back into memory.

 This is done with the following sequence of micro-operations:

 D6T4: DR  M[AR]
 D6T5: DR  DR + 1
 D6T6: M[AR]  DR, if (DR = 0) then (PC  PC + 1), SC  0

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 Computer Instructions
 The Register-Reference Instructions are recognized by the operation code 111 with a

0 in the left most bit (bit 15) of the instruction.

 A register-reference instruction specifies an operation on or a test of the AC register.

15 14 12 11 0

0 111 Register
operation

 Input-output Instructions do not need to refer to the memory and are recognized by

operation code 111 with a 1 in the leftmost bit of the instruction.

 The remaining 12 bits are used to specify the type of input-output operations or test

performed.
15 14 12 11 0

I Opcode Input-output operation

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 Instruction Cycle
 A program residing in the memory unit of the computer consists of a sequence of instructions.

 The program is executed by going through a cycle for each instruction is called fetch decode-

execute cycle.

 Each instruction cycle in turn is subdivided into a sequence of phases.

 In the basic computer each instruction cycle consists of the following phases:

o Fetch an instruction from memory

o Decode the instruction

o Read the effective address from memory if the instruction has an indirect address

o Execute the instruction

 Upon the completion of step 4, the control goes back to step 1 to fetch, decode and

execute the next instruction.

 This process continues indefinitely unless a HALT instruction is encountered.

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 Instruction Cycle

Instruction Fetch and Decode

 The instruction fetch unit is the responsible for feeding the

processor with instructions to execute,

 It is the first block where instructions are processed.

 The fetch unit mainly consists of an instruction cache and the

required logic to compute the fetch address.

 The CPU begins program execution by fetching them one at a time.

 Fetch, decode and execute cycle are the three steps that the CPU
repetitively performs to complete one program instruction.
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 Instruction Cycle
 A computer program comprises a series of program statements, also known as
program instructions.
 Each program instruction accomplishes a specific task.
 The program instructions are binary machine instructions that the CPU can
directly execute.

 The operating system loads the machine instructions into the main memory RAM
to begin program execution.

 In the instruction cycle, the essential operation of the CPU is the time required to
execute and fetch a complete instruction.

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 Instruction Cycle
 The instruction cycle comprises three main stages and is also addressed as the fetch-
decode-execute cycle or fetch-execute cycle because of the steps involved. They are as
follows:
1. Fetch stage
2. Decode stage
3. Execute stage.
Fetch, decode and execute cycle are the three steps that the CPU repetitively performs
to complete one program instruction.

Decode
 The instruction needs to be decoded. It is sent via the data bus to the control unit,
where it is split into two parts.
 The first part is the operation code or opcode, which in this example CPU is the first
four bits. This is the command that the computer will carry out.
 The second part, in this case the second four bits, is the operand.
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 This is an address in RAM where data will be read from or written to, depending on the operation
Instruction Cycle

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Cont’

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 Timing and Control
 Timing refers to the way in which actions are coordinated on the bus .

 The timing for all registers in the basic computer is controlled by a

master clock generator.

 The clock pulses are applied to all flip-flops and registers in the system,

including the flip-flops and registers in the control unit.

 This is a register that holds a count value, can be reset/cleared to zero

and can be incremented (or decremented) by one.

 Each instruction will require a specified number of time steps to complete

a sequence of micro-operations.

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 Cont’d
 The CU is a component of a cpu that interprets program instruction and
generates control signals that direct other parts of the computer to perform
specific micro operation necessary to execute those instruction.

 The timing and control unit is the component that determines what the

ALU should do at a give instant.

There are two kinds of control organization:

 Hardwired control

 Microprogrammed control

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 Cont’d
1. Hardwired Control: The control logic is implemented with

digital circuits (decoders, flip flops, etc.)

It has the advantage that it can be optimized to produce a fast

mode of operation but requires changes in the wiring among

the various components if the design has to be modified or

changed.

CU is made up of sequential and combinational circuits

to generate the control signal.

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 Cont’d

Hardwired control unit 28

 Timing Signal
0 1 2 3 4 5

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 Cont’d
2. Microprogrammed Control: Control information is stored in a control
memory.

 A control memory on the processor contains micro programs that activate the
necessary control signals.

 Required modifications can be done by updating the micro-program in control

memory.

 Similarly for the basic computer

A. The control inputs of the registers LD, INR, CLR must be known
B. The bus system must have control inputs to determine which component
to select
C. The current instruction must be decoded to determine what is to be done.
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 Cont’d

Microprogrammed Control unit 31

 Design of Accumulator Logic
 In computing, an accumulator is a register, or a memory location used to store the intermediate
results of arithmetic and logical operations.

 The adder and logic circuit has three sets of inputs.

○ 16 inputs comes from the outputs of AC.
○ 16 inputs comes from the data register DR.
○ Eight inputs comes from the input register INPR.
 The outputs of the adder and logic circuit provide the data inputs for the register.

Circuits associated with AC 16

Adder and
16 16 16
From DR logic AC
circuit To bus
From INPR 8

LD INR CLR Clock

Control
gates

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 Cont’d
Circuits associated with AC 16
Adder and
16 16 16
From DR logic AC
circuit To bus
From INPR 8

LD INR CLR Clock

Control
gates

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 Design of Basic Computer
 The basic computer consists of the following hardware components;

 A memory unit with 4096 words of 16-bits each

 Nine registers: AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC

 Seven flip-flops: I, S, E, R, IEN, FGI, and FGO

 Two decoders: a 3x8 operation decoder and a 4x 16 timing decoder

 A 16-bit common bus

 Control logic gates

 Adder and logic circuit connected to the input of AC.

 The memory unit is the standard component that can be obtained readily from a
commercial source.

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Design of Basic Computer

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 Thank You!!!
Any Questions ?

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