Claa170ea10-Chunghwa Picture Tubes
Claa170ea10-Chunghwa Picture Tubes
com
CPT TFT-LCD
CLAA 170EA10
ACCEPTED BYΚ
Product Planning
Kevin Chen May Shiao Management
Division
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Table Of Content
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1. OVERVIEW
CLAA170EA10 is 17.0” color TFT-LCD (Thin Film Transistor Liquid Crystal Display) module
composed of LCD panel, driver ICs, control circuit and backlight. By applying 8 bit digital data(6
bit+Hi-FRC),1280×1024, 16.7M-color images are displayed on the 17.0” diagonal screen. Input power
voltage is 5.0V for LCD driving. Inverter for backlight is not included in this module. General
specifications are summarized in the following table:
ITEM SPECIFICATION
Display Area(mm) 337.920(H)x270.336(V) (17.0-inch diagonal)
Number of Pixels 1280(H)x1024(V)
Pixel Pitch(mm) 0.264(H)x0.264(V)
Color Pixel Arrangement RGB vertical stripe
Display Mode normally white, TN
Number of Colors 16.7M (6 Bit+Hi-FRC)
Brightness(cd/m^2) 250cd/m2(Typ.)(Center point, Lamp current=8.0 mA)
Viewing Angle 170 / 160(Typ.)
Surface Treatment Anti-glare
Power consumption(W) 13.1 (Typ.)
Module Size(mm) 358.5(W)x296.5(H)x17.5(D)(max)
Module Weight(g) 1900g(typʼʳ ̈́˄˃˃
Backlight Unit CCFL, 2 tables, edge-light(top*1/bottom*1)
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3. ELECTRICAL CHARACTERISTICS
(1).TFT-LCD
Ta=25к
ITEM SYMBOL MIN TYP MAX UNIT Remark
Power Supply Voltage for LCD Vcc 4.5 5.0 5.5 V *1)
Power Supply Current for LCD Icc - 700 950 mA *2)
Permissive Input Ripple Voltage VRP - - 100 mVp-p Vcc=5.0V
Differential impedance Zm 90 100 110
Common
VCM 1.125 1.25 1.375 V
Mode Voltag
Differential
|VID| 250 350 450 mV
Logic input voltage Input Voltage
LVDS:IN+ΔIN- Threshold
VTH - - 100 mV
Voltage(High)
*3)
Threshold
VTL -100 - - mV
Voltage(Low)
LCD Inrush Current Inrush 3 A *4)
Power consumption P 3.5 4.75 W *2)
[Note]
1).VCC-turn-on conditions:
0.5msЉt1Љ10ms 1 secЉt4
0Іt2Љ20ms 200msЉt5
0Іt3Љ50ms 200msЉt6
Vin=5.0V
4.5V 4.5V
data
LCD Power Supply
Logic Signal㩷
0.5V 0.5V 0.5V
t1 t2 t3 t4
VL
t5 t6
Data: RGB DATA, DCLK, DENA
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VCC-dip conditions:
(1) When 3.6VЉVcc (min) <4.5V & tdЉ10 ms, module works well.
(2) When VCC <3.6 V, VCC-dip conditions should also follow the VCC-turn-on conditions.
2).Typical current situation: 64 gray scale level,1280 line mode, VCC=5.0V, Fh=64Khz,Fv=60Hz,
fCLK=54 MHz.
3).LVDS Signal definition:
VID = VIN+ – VIN- , VIN+ = Positive differential DATA & CLK Input
ϦVCM =ΨVCM+–VCM-Ψ, VIN- = Negative differential DATA & CLK Input
ϦVID =ΨVID+–VID-Ψ,
VID+ =ΨVIH+–VIH-Ψ,
VID- =ΨVIL+–VIL-Ψ,
VCM = (VIN+ +VIN-)/2,
VCM+ = (VIH+ +VIH-)/2,
VCM- = (VIL+ +VIL-)/2,
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(2).Backlight
1. Electrical specification
ITEM SYMBOL MIN TYP MAX UNIT REMARK
IL=8.0mA
B/L Voltage VL 540 600 649 Vrms
Ta=25к
B/L Current IL 3 8 8.5 mArms *1) Ta=25к
B/L operating current ILO 7.5 8 8.5 mArms *1) Ta=25к
IL=8.0mA
B/L power consumption WL Ё 9.6 Ё W
Ta=25к
Inverter Frequency FI 45 50 65 kHz *2) Ta=25к
Ё Ё 1600 Vrms Ta=0к
Starting Lamp Voltage VS
Ё Ё 1100 Vrms Ta=25к
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Continuous Operation
Lamp life Time Min. 50,000 Min. 40,000 hr
*3)
Rated time
Ё Min.100,000 time *4)
(turn on/off)
[Note ] Measuring inverter TypeΚCVT SIT-22FA3
If the waveform of light up-driving is asymmetric, the distribution of mercury inside the lamp
tube will become unequally or will deplete the Arm gas in it. Then it may cause the abnormal
phenomenon of lighting-up. Therefore, designers have to try their best to for fill the conditions
under the inverter designing-stage as below:
ΘThe degrees of unbalanceΚ І10%
ΘThe ratio of wave heightΚІ2 ±10%
1) Lamp Current measurement method (The current meter is inserted in cold line)
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2) a.Frequency in this range can mala the characterisitics of electric and optics maintain in +/- 10%
except hue.
b.If the lamp frequency can be maintain in 50~60KHz, the better charactristics of the electrical
and the optical can be presented.
c.If the operating frequency is 40~80 KHz, the life time and the reliability of the lamp will not be
affect.
d.Lamp frequency of inverter may produce interference with horizontal synchronous
frequency,and this may cause horizontal beat on the display.Therefore, please adjust lamp
frequency, and keep inverter as far from module as possible or use electronic shielding
between inverter and module to avoid the interference.
3) Definition of the lamp life timeΚ Luminance (L) under 50% of specification starting lamp
voltage or starting lamp voltage is more than 130% of the initial value
4) The condition of Turn-on and Turn-off operation is as below:
a. Lamp current is 8.0mA
b. Frequency is 10 sec.(on)/10 sec.(off)
c. Repeat it for 10 thousand times
d. The result of eye-etching of the lamp hue is normal, and can switch the lamp.
It should not have motion fail when starting lamp voltage is lower than 130% of the initial
value.
5) It is necessary to consider the maximal value when design inverterΔin order to assure lighting.
6) The equation of power consumption WL=IL x VL x 2.(IL=8.0mAΔTa=25к)
7) For keeping good lighting situation, when design the inverter, it must be considered that the
voltage large than starting lamp voltage.
8) WL=IL x VL x2Ζ(IL=8.0mAΔTa=25к)
9) The Starting Lamp Voltage (VS) of inverter must be driven large than one second.
10) The output voltage of inverter (Vn) must be the same phase of between any lamps.
11) The difference in voltage between any lamps(ϦV) must be smaller than 300V at the same time.
ExampleΚЮϦVЮІ300VΔϦVΚ =V1(t)-V2(t)
Vnrms − VL
≤ 15%
12) VL Δn=1Δ2… 4ΔnΚthe number of lamp
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ϦV
˩˄ʻ̇ʼ
˩˅ʻ̇ʼ
13) The lamp working current (Icyc) of any cycle of lighting driving wave can’t exceed maximum of
lamp standard working current (IL).Therefore, the inverter design should be avoided the state.
NoteΚ
1. VLΚThe lamp voltage(typical) of the standard working current.
2. The lamp working current (Icyc) is defined the RMS of current cycle from the oscilloscope.
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5. INTERFACE TIMING
(1) Timing Specifications
ITEM SYMBOL MIN TYP MAX UNIT
Frequency fCLK 45 54 70 MHz
DCLK
Period tCLK 14.3 18.5 22.2 ns
Horizontal Active Time tHA 640 640 640 tCLK
LCD Horizontal Blank Time tHB 45 204 390 tCLK
Timing Horizontal Total Time tH 685 844 1030 tCLK
DENA Vertical Active Time tVA 1024 1024 1024 tH
Vertical Blank Time tVB 12 42 376 tH
Vertical Total Time tV 1036 1066 1400 tH
Vertical Frame Rate Fr 50 60 75 Hz
[Note]
1) DENA should always be positive polarity as shown in the timing specification.
2) DCLK should exist during all blanking period.
3) LVDS IC or compatible
Receiver Transmitter
DS90C384MTD(NS) DS90C383MTD(NS)
SN75LVDS82(TI) SN75LVDS83(TI)
4) Pin assignment for FlatLink transmitter SN75LVDS83(TI)
Pin No. Pin Name Require Signal Pin No. Pin Name Require Signal
1 VCC Power Supply for TTL Input 29 GND Ground pin for TTL
2 D5 TTL Input (R7) 30 D26 TTL Input(DE)
3 D6 TTL Input (R5) 31 TxCLKIN TTL Level clock Input
4 D7 TTL Input (G0) 32 PWR DWN Power Down Input
5 GND Ground pin for TTL 33 PLL GND Ground pin for PLL
6 D8 TTL Input (G1) 34 PLL VCC Power Supply for PLL
7 D9 TTL Input (G2) 35 PLL GND Ground pin for PLL
8 D10 TTL Input (G6) 36 LVDS GND Ground pin for LVDS
9 VCC Power Supply for TTL Input 37 TxOUT3+ Positive LVDS differential data output 3
10 D11 TTL Input (G7) 38 TxOUT3- Negative LVDS differential data output 3
11 D12 TTL Input (G3) 39 TxCLKOUT+ Positive LVDS differential clock output
12 D13 TTL Input (G4) 40 TxCLKOUT- Negative LVDS differential clock output
13 GND Ground pin for TTL 41 TxOUT2+ Positive LDVS differential data output 2
14 D14 TTL Input (G5) 42 TxOUT2- Negative LVDS differential data output 2
15 D15 TTL Input (B0) 43 LVDS GND Ground pin for LVDS
16 D16 TTL Input (B6) 44 LVDS VCC Power Supply for LVDS
17 VCC Power Supply for TTL Input 45 TxOUT1+ Positive LVDS differential data output 1
18 D17 TTL Input (B7) 46 TxOUT1- Negative LVDS differential data output 1
19 D18 TTL Input (B1) 47 TxOUT0+ Positive LVDS differential data output 0
20 D19 TTL Input (B2) 48 TxOUT0- Negative LVDS differential data output 0
21 GND Ground pin for TTL 49 LVDS GND Ground pin for TTL
22 D20 TTL Input (B3) 50 D27 TTL Input (R6)
23 D21 TTL Input (B4) 51 D0 TTL Input (R0)
24 D22 TTL Input (B5) 52 D1 TTL Input (R1)
25 D23 TTL Input (LVDS) 53 GND Ground pin for TTL
26 VCC Power Supply for TTL Input 54 D2 TTL Input (R2)
27 D24 TTL Input (HSYNC) 55 D3 TTL Input (R3)
28 D25 TTL Input (VSYNC) 56 D4 TTL Input (R4)
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b. Vertical Timing
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6. BLOCK DIAGRAM
TFT-LCD Module
CN2
Lamp Unit in Backlight
CN3
LVDS receiver 2ch
Timing Source Driver
CN1 I/F Connector
Controller
Gate Driver
LCD Panel
CN4
Lamp Unit in Backlight
CN5
2
CCFL
CN3,5
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7. MECHANICAL SPECIFICATION
(1) Front side (Tolerance is ±0.5mm unless noted) Unit: mm
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8. OPTICAL CHARACTERISTICS
Ta=25кΔVCC=5.0V
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Left Right
Lower
White
90 % 90 %
Luminan
10 % 10 %
tr tf
Black
5) Definition of crosstalk:
CT=ЮYB-YAЮ/YA X 100 (%)
YA : The luminance of measured position at pattern A
YB : The luminance of measured position at pattern B with Gray level 0
Pattern A Pattern B
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6) Definition of Gamma (), follow VESA standard sampling every 16 gray level (0,16,32,…..224,240,255)
Tᔕ
̌ʳːӫ̋ˀ˾
%৫
L
O
ၸᓳLOG
Gray level (LOG)
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(3) ESD
POSITION CONDITION( MDL turn off)
1. 200 pFΔ0 Δ±250 V
Connector
2. contact mode for each pin
1. 150 pFΔ330 Δ±15K V
Module 2. Air mode, test 25 times for each test point
3. Contact mode, 25 times for each test point
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2) Please do not change variable resistance settings in LCD module. They are adjusted to the
most suitable value. If they are changed, it might happen LCD does not satisfy the
characteristics specification.
3) Please consider that LCD backlight takes longer time to become stable of radiation
characteristics in low temperature than in room temperature.
4) A condensation might happen on the surface and inside of LCD module in case of sudden charge
of ambient temperature.
5) Please pay attention to displaying the same pattern for very long time. Image might stick on
LCD. If then, time going on can make LCD work well.
6) Please obey the same caution descriptions as ones that need to pay attention to ordinary
electronic parts.
(3) PRECAUTFONSWITHELECTROSTATICS
1) This LCD module use CMOS-IC on circuit board and TFT-LCD panel, and so it is easy to be
affected by electrostatics. Please be careful with electrostatics by the way of your body
connecting to the ground and so on.
2) Please remove protection film very slowly on the surface of LCD module to prevent from
electrostatics occurrence.
(4) STORAGE PRECAUTIONS
1) When you store LCDs for a long time, it is recommended to keep the temperature between
0к ~40к without the exposure of sunlight and to keep the humidity less than 90%RH.
2) Please do not leave the LCDs in the environment of high humidity and high temperature such as
60к 90%RH.
3) Please do not leave the LCDs in the environment of low temperature; below -20к.
(5) SAFETY PRECAUTIONS
1) When you waste LCDS, it is recommended to crush damaged or unnecessary LCDs into pieces
and wash them off with solvents such as acetone and ethanol, which should later be burned.
2) If any liquid leaks out of a damaged-glass cell and comes in contact with the hands, wash off
thoroughly with soap and water.
(6) OTHERS
1) A strong incident light into LCD panel might cause display characteristics' changing inferior
because of polarizer film, color filter, and other materials becoming inferior. Please do not
expose LCD module direct sunlight Land strong UV rays.
2) Please pay attention to a panel side of LCD module not to contact with other materials in
preserving it alone.
3) For the. Packaging box, please pay attention to the followings:
a) Packaging box and inner case for LCD are designed to protect the LCDs from the damage or
scratching during transportation. Please do not open except picking LCDs up from the box.
b) Please do not pile them up more than 5 boxes. (They are not designed so.) And please do not
turn over.
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c) Please handle packaging box with care not to give them sudden shock and vibrations. And
also please do not throw them up.
d) Packing box and inner case for LCDs are made of cardboard. So please pay attention not to get them
wet. (Such like keeping them in high humidity or wet place can occur getting them wet.)
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