ECL 103:

Applied Electronics
 ECL 103: Applied Electronics
• Dr. Mayank Thacker
• Email: mthacker@iiitn.ac.in
• Office: R-24
• Office hours: Appointment by email
• Phone: 94237-32507

ECL 103 – Applied Electronics 2

Dr. Mayank Thacker
 ECL 103: Applied Electronics
• Lectures:
• Tuesday/Wednesday/Friday
• Time: 1 – 2 PM / 2 – 3 PM / 2 – 3 PM
• Room: CR 304
• Wednesday, Jan. 01, 2025 – Tuesday, April 29, 2025

• Exams
• Sessional 1: 6th – 11th Feb
• Sessional 2: 25th – 28th March
• End Semester Exam: 5th – 16th May

ECL 103 – Applied Electronics 3

Dr. Mayank Thacker
 ECL 103: Applied Electronics
• Course info. on Google Drive
• Assignments
• Course notes
• Examinations

• Laboratory:
• A1: Friday 10:00 AM – 12:00 Noon
• A2: Tuesday 8:00 AM – 10:00 AM

ECL 103 – Applied Electronics 4

Dr. Mayank Thacker
 ECL 103: Applied Electronics
• Evaluation: Component Weighting
Continuous Evaluation (8/9/10 labs) 50 %
Attendance 10 %
End Term / Viva 40 %
Total 100 %  25 %

Assignments 20 %
Sessional 1 + Sessional 2 30 %
Final Examination 50 %
Total 100 %  75 %

ECL 103 – Applied Electronics 5

Dr. Mayank Thacker
 ECL 103: Applied Electronics
Chapter/Section Lectures
Chapter 0: Introduction 1
Module 1: Electronic devices 7-8
Theory of P-N Junction Diode, Junction Transistors Theory of Operation, Static Characteristics, Break
Down Voltages, Current Voltage Power Limitations, Field Effect Transistor & MOSFET, Principle of
Operation & Characteristics.
Module 2: Applications of Electronic devices 8-9
Rectifiers, Zener Diode as Regulators, Biasing of BJT Different Biasing Arrangements, Stability Factor,
Small Signal Analysis & High Frequency Analysis of BJT, Power Amplifiers, Push Pull Configuration,
Complimentary Symmetry, Feedback Amplifiers, RC, LC & Crystal Oscillators.
Module 3: Combinational and Sequential Logic 8-9
Logic minimization using K-map method, multiplexers, de-multiplexers, decoders, encoders,
Arithmetic circuits, Adders, Combinational multiplier and code converters. Basic latches, master-slave
latch, Flip flops, Registers, Counters.
Module 4: Memories 3
Introduction to PLA, PAL and ROM, Programmable Logic Devices and FPGAs.
Module 5: Introduction to Microprocessors 6
Architecture, bus structure, timing diagrams, T-states, machine cycle, instruction cycle. Memory and
IO devices interfacing.

ECL 103 – Applied Electronics 6

Dr. Mayank Thacker
Chapter 0:

An Introduction to
Applied Electronics
 Silicon technology – “Nodes”
• Current technology (3-10 nm node) – uses 450 mm
(15”) silicon wafers

Image reprinted with permission from Rob Bulmahn

https://www.flickr.com/photos/rbulmahn/8028286354

ECL 103 – Applied Electronics 8

Dr. Mayank Thacker
 Moore’s “Law” - silicon scaling
• Scaling of the size and number of transistors/chip over the last 40
years – “doubling” every 18-24 months

ECL 103 – Applied Electronics 9

Dr. Mayank Thacker
 From PCs to transistors

Printed circuit boards (PCBs)

PC

Mother board

Images reprinted with permission from Rob Bulmahn

https://www.flickr.com/photos/rbulmahn/8028286354
ECL 103 – Applied Electronics 10
Dr. Mayank Thacker
 From PCs to transistors

ECL 103 – Applied Electronics 11

Dr. Mayank Thacker
 From PCs to transistors
• Field effect transistors (FETS) – “just a switch” Gate = 0
Source
• “GATE” – controls the switch Drain
Gate = 1
• OFF – no current flows Source Drain
• ON – current flows from “SOURCE” to “DRAIN” Current flows

Vgate → “1” Drain

Gate

Source
Silicon “fin” channel

ECL 103 – Applied Electronics 12

Dr. Mayank Thacker
 From transistors to “logic circuits”

In “series” In “parallel” …
“AND” function “OR” function

G1
G1 G2

G1 “OR” G2
G2
G1 “AND” G2

ECL 103 – Applied Electronics 13

Dr. Mayank Thacker
 From transistors to “logic circuits”
• Two type of FETs
• nFETs - “ON” when “G” is “ON” G1 G2 AND NAND
• pFETs - “OFF” when “G” is “ON” 0 0 0 1
Vdd = ‘1’
0 1 0 1
1 0 0 1
1 1 1 0
Output

G1
F= G1 “NAND” G2
“NAND” symbol

G2 Transistor
circuit

ECL 103 – Applied Electronics 14

Dr. Mayank Thacker
 From transistors to “logic circuits”

Sub circuits on a chip

Logic gates into a logic circuit

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Dr. Mayank Thacker
 Binary number representation
• Only have “ON” and “OFF” Decimal
(base 10)
Binary
(base 2)

• Two states – binary 0

1
0000
0001
• “ON” = 1 2 0010
3 0011
• “OFF” = 0 4 0100

• Representation of numbers in binary 5

6
0101
0110
7 0111
8 1000
9 1001
10 1010
11 1011
12 1100
13 1101
14 1110
15 1111

ECL 103 – Applied Electronics 16

Dr. Mayank Thacker
 Binary number representation
• Convert (857)10 into binary
Remainder
857 / 2 = 428 1 LSB (Least Significant Bit)
428 / 2 = 214 0
214 / 2 = 107 0
107 / 2 = 53 1
53 / 2 = 26 1 Base 10 (857)10 = Base 2 (11 0101 1001)2
26 / 2 = 13 0
13 / 2 = 6 1
6/ 2 = 3 0
3/ 2 = 1 1
1/ 2 = 0 1
MSB (Most Significant Bit)

ECL 103 – Applied Electronics 17

Dr. Mayank Thacker
 Binary “character” representation
Decimal Hex Octal Character Decimal Hex Octal Character
0 0 0 null 32 20 40 space
1 1 1 start of heading 33 21 41 !
2 2 2 start of text 34 22 42 "
3 3 3 end of text 35 23 43 #
4 4 4 end of trans 36 24 44 $
5 5 5 enquiry 37 25 45 %
6 6 6 acknowledge 38 26 46 &
7 7 7 bell 39 27 47 '
8 8 10 backspace 40 28 50 (
Decimal Hex Octal Character Decimal Hex Octal Character
9 9 11 horizontal tab 41 29 51 )
16 10 20 data link escape 48 30 60 0
10 A 12 new line 42 2A 52 *
17 11 21 device control 1 49 31 61 1
11 B 13 vertical tab 43 2B 53 +
18 12 22 device control 2 50 32 62 2
12 C 14 new page 44 2C 54 ,
19 13 23 device control 3 51 33 63 3
13 D 15 carriage return 45 2D 55 -
20 14 24 device control 4 52 34 64 4
14 E 16 shift out 46 2E 56 .
21 15 25 negative ack 53 35 65 5
15 F 17 shift in 47 2F 57 /
22 16 26 synchronous idle 54 36 66 6
23 17 27 end trans. block 55 37 67 7
24 18 30 cancel 56 38 70 8
25 19 31 end of medium 57 39 71 9
26 1A 32 substitute 58 3A 72 :
27 1B 33 escape 59 3B 73 ;
28 1C 34 file separator 60 3C 74 <
29 1D 35 group separator 61 3D 75 =
30 1E 36 record separator 62 3E 76 >
31 1F 37 unit separator 63 3F 77 ?

ECL 103 – Applied Electronics 18

Dr. Mayank Thacker
 Binary “character” representation
Decimal Hex Octal Character Decimal Hex Octal Character
64 40 100 @ 65 41 101 A
65 41 101 A 66 42 102 B
66 42 102 B 67 43 103 C
67 43 103 C 68 44 104 D
68 44 104 D 69 45 105 E
69 45 105 E 70 46 106 F
70 46 106 F 71 47 107 G
71 47 107 G 72 48 110 H
72 48 110 H 73 49 111 I
Decimal Hex Octal Character Decimal Hex Octal Character
73 49 111 I 74 4A 112 J
80 50 120 P 81 51 121 Q
74 4A 112 J 75 4B 113 K
81 51 121 Q 82 52 122 R
75 4B 113 K 76 4C 114 L
82 52 122 R 83 53 123 S
76 4C 114 L 77 4D 115 M
83 53 123 S 84 54 124 T
77 4D 115 M 78 4E 116 N
84 54 124 T 85 55 125 U
78 4E 116 N 79 4F 117 O
85 55 125 U 86 56 126 V
79 4F 117 O 80 50 120 P
86 56 126 V 87 57 127 W
87 57 127 W 88 58 130 X
88 58 130 X 89 59 131 Y
89 59 131 Y 90 5A 132 Z
90 5A 132 Z 91 5B 133 [
91 5B 133 [ 92 5C 134 \
92 5C 134 \ 93 5D 135 ]
93 5D 135 ] 94 5E 136 ^
94 5E 136 ^ 95 5F 137 _
95 5F 137 _ 96 60 140 `

ECL 103 – Applied Electronics 19

Dr. Mayank Thacker
 Binary “music” representation

4
4

4
4

ECL 103 – Applied Electronics 20

Dr. Mayank Thacker